TWI669783B - 低阻抗接觸窗插塞之形成方法 - Google Patents

低阻抗接觸窗插塞之形成方法 Download PDF

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TWI669783B
TWI669783B TW106120765A TW106120765A TWI669783B TW I669783 B TWI669783 B TW I669783B TW 106120765 A TW106120765 A TW 106120765A TW 106120765 A TW106120765 A TW 106120765A TW I669783 B TWI669783 B TW I669783B
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forming
space
mask layer
contact
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TW201838092A (zh
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許劭銘
李振銘
楊復凱
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台灣積體電路製造股份有限公司
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
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    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
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    • H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
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    • H01L29/7855—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET with at least two independent gates
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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

一種方法，包含形成第一與第二接觸窗開口，以分別顯露第一及第二源極/汲極區；形成罩幕層，其具有分別在第一和第二接觸窗開口中的第一部分和第二部分；分別形成第一和第二犧牲層間介電層於第一和第二接觸窗開口中；從第一接觸窗開口移除第一犧牲層間介電層；填入填充材至第一接觸窗開口中；及，蝕刻第二犧牲層間介電層。填充材保護罩幕層之第一部分，以避免被蝕刻。層間介電層形成於第二接觸窗開口中及罩幕層之第二部份上。使用濕式蝕刻移除填充材和罩幕層的第一部分，以顯露出第一接觸窗開口。接觸窗插塞係形成於第一接觸窗開口中。

Description

低阻抗接觸窗插塞之形成方法
本揭露是有關於一種低阻抗接觸窗插塞之形成方法，且特別是有關於一種在多個接觸孔形成過程中減少源極/汲極區損失之電晶體的製造方法。
在積體電路中，接觸窗插塞係用以連接至源極和汲極區，源極和汲極區可經由磊晶形成。源極/汲極接觸窗插塞典型地係連接至源極/汲極矽化物區。源極/汲極區的形成包括藉由蝕刻覆蓋住源極/汲極區的介電層，來形成接觸窗開口，其中被蝕刻的介電層可包括氮化矽層和位於氮化矽層上方的氧化層。因此源極/汲極區係被暴露至接觸窗開口。共形地形成額外的氮化矽層，以覆蓋接觸窗開口的側壁和底部。然後，進行第二蝕刻操作，以移除氮化矽層的多個底部，以顯露出磊晶源極/汲極區。然後，形成金屬層以延伸至接觸窗開口中，並進行退火以使金屬層與源極/汲極區產生反應，而造成形成之源極/汲極矽物化區。然後，以一或多種金屬填入接觸窗開口的剩餘部分中，以形成源極/汲極接觸窗插塞。
在用以形成接觸窗開口的習知製程中，用以暴露出源極/汲極區之多個介電層的蝕刻造成高摻雜磊晶源極/汲極區的損失。特別是，磊晶源極/汲極區拓樸形狀(topology)可能會有所損失，而磊晶源極/汲極區的頂面變得較平，造成源極/汲極矽化物區的面積變小。磊晶源極/汲極區的損失與縮小的接觸面積增加源極/汲極區的接觸阻抗。上述現象衝擊電路速度和效能。
根據本揭露之一些實施例，低阻抗接觸窗插塞之形成方法包含形成第一接觸窗開口與第二接觸窗開口，以分別顯露出第一源極/汲極區以及第二源極/汲極區；形成罩幕層，其具有分別在第一接觸窗開口和第二接觸窗開口中的第一部分和第二部分；分別形成第一犧牲層間介電層和第二犧牲層間介電層於第一接觸窗開口和第二接觸窗開口中；從第一接觸窗開口移除第一犧牲層間介電層；填入填充材至第一接觸窗開口中；以及，蝕刻第二犧牲層間介電層。填充材保護罩幕層之第一部分，以避免被蝕刻。層間介電層係形成於第二接觸窗開口中且於罩幕層之第二部份上。填充材和罩幕層的第一部分係使用濕式蝕刻移除，以顯露出第一接觸窗開口。接觸窗插塞形成於第一接觸窗開口中。
根據本揭露之一些實施例，低阻抗接觸窗插塞之形成方法包含形成罩幕層延伸至第一虛擬閘極堆疊和第二虛擬閘極堆疊之間的空間；於該空間中填入犧牲層間介電 層。犧牲層間介電層位於罩幕層之底部上方。方法更包含移除犧牲層間介電層以顯露出空間中的罩幕層；將填充材填入所述空間中，其中填充材位於空間中的罩幕層上；移除填充材與罩幕層，以顯露出源極/汲極區；以及，形成接觸窗插塞於所述空間中。
根據本揭露之一些實施例，低阻抗接觸窗插塞之形成方法包含形成罩幕層延伸至第一虛擬閘極堆疊和第二虛擬閘極堆疊之間的空間；於罩幕層上方以及空間中，填入犧牲層間介電層；移除犧牲層間介電層，以顯露出空間中的罩幕層；以及，使用濕式蝕刻自空間移除罩幕層。罩幕層之移除部分包含位於空間之底部的水平部分，以及延伸至第一虛擬閘極堆疊之頂面的垂直部分。接觸窗插塞形成於空間中。
10‧‧‧晶圓
20‧‧‧基材
22‧‧‧隔離區
22A‧‧‧頂表面
24‧‧‧半導體條
24’‧‧‧突出鰭
30‧‧‧虛擬閘極堆疊
32‧‧‧虛擬閘極介電層
34‧‧‧虛擬閘極電極
36‧‧‧硬式罩幕層
38‧‧‧閘極間隙壁
38A‧‧‧低介電常數介電層
38B‧‧‧非低介電常數介電層
40‧‧‧凹陷
41‧‧‧空隙
42‧‧‧凹陷
43‧‧‧空間
44‧‧‧磊晶罩幕層
44A、44B‧‧‧子層
45‧‧‧閘極介電層
46‧‧‧堆疊層
47‧‧‧金屬填充材
48‧‧‧金屬閘極電極
49‧‧‧犧牲層間介電層
52‧‧‧取代閘極堆疊
56‧‧‧凹陷
58‧‧‧硬式罩幕
60A、60B、60C‧‧‧凹陷
62‧‧‧填充材
64‧‧‧墊氧化層
66‧‧‧填充材
68‧‧‧光阻
70‧‧‧層間介電層
71‧‧‧凹陷
72‧‧‧接觸窗間隙壁
74‧‧‧間隙壁
75‧‧‧矽化物區
76‧‧‧金屬層
78‧‧‧導電阻障層
80‧‧‧金屬區
82‧‧‧下部源極/汲極接觸窗插塞
86‧‧‧介電層
88‧‧‧蝕刻停止層
90‧‧‧閘極接觸窗插塞
92‧‧‧上部源極/汲極接觸窗插塞
200‧‧‧方法
202、204、206、208、210、212、214、216、218、220、222、224‧‧‧操作
A-A、B-B、C-C‧‧‧線段
藉由以下詳細說明並配合圖式閱讀，可更容易理解本揭露。在此強調的是，按照產業界的標準做法，各種特徵並未按比例繪製，僅為說明之用。事實上，為了清楚的討論，各種特徵的尺寸可任意放大或縮小。
[圖1]至[圖20]係根據一些實施例繪示形成電晶體之中間製程的立體圖和剖面圖。
[圖21]係根據一些實施例繪示形成電晶體和接觸窗插塞的製程流程圖。
下面的揭露提供了許多不同的實施例或例示，用於實現本揭露的不同特徵。部件和安排的具體實例描述如下，以簡化本揭露之揭露。當然，這些是僅僅是例示並且不意在進行限制。例如，在接著的說明中敘述在第二特徵上方或上形成第一特徵可以包括在第一和第二特徵形成直接接觸的實施例，並且還可以包括一附加特徵可以形成第一特徵的形成第一和第二特徵之間的實施例，從而使得第一和第二特徵可以不直接接觸。此外，本公開可以在各種例示重複元件符號和/或字母。這種重複是為了簡化和清楚的目的，並不在本身決定所討論的各種實施例和/或配置之間的關係。
此外，空間相對術語，如“之下”、“下方”、“低於”、“上方”、“高於”等，在本文中可以用於簡單說明如圖中所示元件或特徵對另一元件(多個)或特徵(多個特徵)的關係。除了在圖式中描述的位向，空間相對術語意欲包含元件使用或步驟時的不同位向。元件可以其他方式定位(旋轉90度或者在其它方位)，並且本文中所使用的相對的空間描述，同樣可以相應地進行解釋。
根據多個示範的實施例提供電晶體及其製造方法。根據一些實施例繪示製造電晶體的中間過程。下述將討論一些實施例的一些變化。在多個圖式以及所繪示之實施例中，相似的元件符號用以代表相似的元件。在所繪示的示範實施例中，以鰭狀場效電晶體之製造做為例子，說明本揭露之概念。然而，平面電晶體也可採用本揭露之概念。
圖1至圖20係根據本揭露之一些實施例繪示鰭狀場效電晶體之形成的各個中間製程的剖面圖和立體圖。圖21所示之製程流程200也示意地反映如圖1至圖20所示之操作。
圖1繪示初始結構的立體圖。初始結構包括晶圓10，其可進一步包含基材20。基材20可為半導體基材，其可為矽基材、矽鍺基材或其他半導體材料所形成之基材。基材20可被p型雜質或n型雜質所摻雜。可形成如淺溝渠隔離區(STI)之隔離區22，並從基材20的頂面延伸至基材20中。於相鄰淺溝渠隔離區22之間的部分基材20可視為半導體條24。在一些示範的實施例中，半導體條24的頂面和淺溝渠隔離區22的頂面可實質為彼此等高。
淺溝渠隔離區22可包括襯氧化層(liner oxide；未繪示)，其可為基材20之表面層經熱氧化後所形成的熱氧化物。襯氧化層也可為沉積的氧化矽層，其例如使用原子層沉積、高密度電漿化學氣相沉積或化學氣相沉積來形成。淺溝渠隔離區22也可包括位於襯氧化層上方的介電材料，其中所述介電材料可使用可流動化學氣相沉積、旋轉塗佈或類似製程來形成。
請參考圖2，淺溝渠隔離區22係凹陷，使得半導體條24的上部分突出高於淺溝渠隔離區22的頂面，以形成突出鰭24’。可使用乾式蝕刻製程以進行上述蝕刻，其中氟化氫(HF3)和氨氣(NH3)可做為蝕刻氣體使用。在蝕刻製程中，可產生電漿。氬氣也可包括於其中。根據本揭露一些 其他的實施例，凹陷淺溝渠隔離區22可使用濕式蝕刻製程來進行。而蝕刻化學物質可例如包括氫氟酸(HF)。
請參考圖3，虛擬閘極堆疊30形成於(突出)鰭24’的頂面和側壁上。個別的操作悉如圖21之製程的操作202所示。虛擬閘極堆疊30彼此平行，而複數個虛擬閘極堆疊係與相同的一或多個半導體鰭24’相交。虛擬閘極堆疊30可包括虛擬閘極介電層32和位於虛擬閘極介電層32上方的虛擬閘極電極34。虛擬閘極介電層32可由氧化矽形成，且虛擬閘極電極34可例如由多晶矽形成。每個虛擬閘極堆疊30也可包括一(或複數個)硬式罩幕層36於個別的虛擬閘極電極34上方。硬式罩幕層36可由氮化矽、碳氮化矽(silicon carbo-nitride)或其類似物所形成。虛擬閘極堆疊30可與單一個或複數個突出鰭24’及/或淺溝渠隔離區22相交。虛擬閘極堆疊30也具有垂直於縱向之突出鰭24’的縱向方向。
接下來，閘極間隙壁38形成於虛擬閘極堆疊30的側壁上。根據本揭露的一些實施例，閘極間隙壁38由如碳氮化矽(SiCN)、氮化矽或其類似物之介電材料所形成，且閘極間隙壁38可具有單層結構或包含複數個介電層的多層結構。
根據一些實施例，每個閘極間隙壁38包括低介電常數介電層38A和非低介電常數介電層38B，每個低介電常數介電層38A和非低介電常數介電層38B之形成係透過毯覆式沉積操作與之後的非等向性蝕刻操作。低介電常數介電層38A可由具有介電常數(k值)低於約3.0或低於約2.5的 低介電常數材料形成，可藉由形成具有孔洞形成於其中的氮氧化矽(SiON)或氧碳氮化矽(SiOCN)，以達到預定的低介電常數值。非低介電常數介電層38B可例如由氮化矽形成。
接下來進行蝕刻操作(相當於後述凹陷源極/汲極之操作)，以蝕刻未被虛擬閘極堆疊30和閘極間隙壁38覆蓋的突出鰭24’之一部分，而造成如圖4所示之結構。凹陷可為非等向性，因此位於虛擬閘極堆疊30和閘極間隙壁38正下方之鰭24’的一部分係被保護而不被蝕刻。因此，凹陷40形成於淺溝渠隔離區22之間。凹陷40位於虛擬閘極堆疊30相對的側邊。根據一些實施例，所得之凹陷40的底表面可低於淺溝渠隔離區22的頂表面22A。
接下來，藉由選擇性地成長半導體材料於凹陷40中，以形成磊晶區(源極/汲極區)，造成如圖5所示之結構。個別的操作悉如圖21之製程的操作204所示。根據一些示範的實施例，磊晶區42包括矽鍺或矽。視所得之鰭狀場效電晶體為p型鰭狀場效電晶體或n型鰭狀場效電晶體，可在磊晶製程進行中原位摻雜p型雜質或n型雜質。例如：當所得之鰭狀場效電晶體為p型鰭狀場效電晶體，可生長矽鍺硼(SiGeB)。相反地，當所得之鰭狀場效電晶體為n型鰭狀場效電晶體，可生長磷化矽(SiP)或碳磷化矽(SiCP)。根據本揭露之其他實施例，磊晶區42可由第III族-第V族之化合物半導體形成，例如砷化鎵(GaAs)、磷化銦(InP)、氮化鎵(GaN)、砷化銦鎵(InGaAs)、砷化銦鋁(InAlAs)、鎵銻(GaSb)、鋁銻(AlSb)、砷化鋁(AlAs)、磷化鋁(AlP)、磷 化鎵(GaP)、上述之組合或多層。在磊晶區42填滿凹陷40後，繼續生長磊晶區42使得磊晶區42水平擴張，從而可形成多個小平面(facet)。
磊晶區42包括形成於淺溝渠隔離區22中的低部分和形成於淺溝渠隔離區22之頂面上方的上部分。低部分之側壁根據個別的凹陷型態而成形，因此低部分可具有(實質)平直的邊界，其也可實質為垂直邊界，實質垂直於基材20之主要頂面和底面。
圖6A、圖6B和圖6C繪示如圖5之結構的剖面圖。圖6A所示之頗面圖係沿圖5A之含有線段A-A的垂直平面而得。在圖6A、圖6B和圖6C以及後續的圖式中，圖號可包括文字”A”、”B”或”C”。文字”A”表明個別的圖式是同樣沿圖5中含有線段A-A的平面所得的剖面圖。文字”B”和”C”表明個別的圖式是沿類似於圖6A之含有線段B/C-B/C之平面且與源極/汲極區相交的垂直平面所得之剖面圖。同樣的，圖式之裝置區域的圖號有文字”B”以及圖式之裝置區域的圖號有文字”C”者可為不同的裝置區域。例如：圖號有文字”B”的圖式之裝置區域可為n型鰭狀場效電晶體，以及圖號有文字”C”者的圖式之裝置區域可為p型鰭狀場效電晶體，或上述之二者相反。具有相同數字但不同文字的圖式表明其為相同製程操作的不同視角。
如圖6A、圖6B和圖6C所示，藉由空間/開口43，使得虛擬閘極堆疊30彼此分開，也如圖5所示。圖6B和圖6C繪示沿圖6A之含有線段B/C-B/C之平面所得的剖 面圖，但圖6B繪示合併磊晶區42，而圖6C繪示分立(discrete)磊晶區42。圖6B繪示空隙(氣隙；air gap)41可形成於相鄰且彼此接觸的磊晶區42之間。
請參考圖7A、圖7B和圖7C，形成磊晶罩幕層44做為毯覆式介電層，磊晶罩幕層44因遮蔽磊晶區42而得其名。個別的操作係如圖21之製程的操作206所示。磊晶罩幕層44用以保護下方的磊晶區42，且在後續製程要移除磊晶罩幕層44時，磊晶罩幕層44對磊晶區42具有高蝕刻選擇比，使得磊晶區42的損害減少。磊晶罩幕層44共形地形成，且可使用原子層沉積或化學氣相沉積形成磊晶罩幕層44。根據本揭露的一些實施例中，磊晶罩幕層44可由均相氧化鋁(Al2O3)形成。根據其他實施例，磊晶罩幕層44包括由不同材料形成的子層。例如：磊晶罩幕層44可包括由氧化鋁形成的子層44A，以及位於子層44A上之由氮化矽形成的子層44B。如圖7B和圖7C所示，磊晶罩幕層44共形地形成於半導體鰭24’上。由於在多個鰭上之磊晶(EPI)的波浪性質(wavy nature)，在磊晶谷(EPI valley)中的層44之層44可較厚。上述現象減少了谷中犧牲層間介電層(圖8B之層49)的含量，因此在後續移除層49時，減少較長時間或強度較強之蝕刻的需求。
接著，形成犧牲層間介電層49以填充空間43，且犧牲層間介電層49係如圖8A、圖8B和圖8C所示。個別的操作係如圖21之製程的操作208所示。犧牲層間介電層49可由介電材料或其他種類的材料來形成，上述材料使犧牲層 間介電層可在後續操作中被選擇性地移除，而不損害閘極間隙壁38和磊晶罩幕層44。根據本揭露之一些實施例，犧牲層間介電層49是由氧化矽形成。接著，使用化學機械研磨或機械研磨進行平坦化，使得磊晶罩幕層44的水平部分可暴露出來而後被移除。在後續的操作中，移除虛擬閘極堆疊30，接著形成取代閘極堆疊52，其可包含取代閘極介電層45和金屬閘極電極48。所得之結構係如圖8A、圖8B和圖8C所示。個別的操作係如圖21之製程的操作208所示。
以下簡單說明取代閘極堆疊52之形成。首先，形成層45、層46和層47做為毯覆層。根據本揭露之一些實施例，閘極介電層45之每一者包括界面層(interfacial layer；IL)做為閘極介電層45的低部分。界面層形成於突出鰭24’暴露出的表面上，界面層可包含如氧化矽之氧化層，並可藉由突出鰭24’的熱氧化、化學氧化製程或沉積製程來形成所述界面層。每個閘極介電層45也可包括高介電常數介電層形成於界面層上方。高介電常數介電層可由如氧化鉿、氧化鑭、氧化鋁、氧化鋯或其類似物之高介電常數材料形成。高介電常數材料之介電常數(k值)可高於3.9，且可高於7.0。
金屬閘極電極48包括堆疊層46，其經由沉積形成。堆疊層46的子層並未分別繪示，但實際上，子層可彼此分明。可使用如原子層沉積或化學氣相沉積之共形沉積方法進行沉積，使得堆疊金屬層46(以及每個子層)之垂直部分和水平部分的厚度實質彼此相等。圖8B和圖8C繪示從源極 /汲極區42的剖線所得之剖面圖。
堆疊金屬層46可包括擴散阻障層以及在擴散阻障層上方之一(或多個)功函數層。擴散阻障層可由氮化鈦(TiN)形成，其可或可不被矽摻雜。功函數層決定金屬閘極的功函數，且功函數層包括至少一層或不同材料形成的複數層。根據個別的鰭狀場效電晶體為p型鰭狀場效電晶體或n型鰭狀場效電晶體，選擇功函數層的特定材料。例如：當鰭狀場效電晶體為n型鰭狀場效電晶體時，功函數層可包括氮化鉭(TaN)層和氮化鉭層上方的鈦鋁(TiAl)層。當鰭狀場效電晶體為p型鰭狀場效電晶體時，功函數層可包括氮化鉭層、位於氮化鉭層上方的氮化鈦層以及位於氮化鈦層上方的鈦鋁層。在沉積一或多個功函數層後，形成阻障層，阻障層可為另一層氮化鈦層。
金屬填充材47可例如由鎢或鈷形成。在沉積做為毯覆層的層45、層46和層47形成後，進行如化學機械研磨或機械研磨之平坦化操作，以移除在犧牲層間介電層49上方的層45、層46和層47之一部分。因此，形成金屬閘極電極48，其可包括層46和層47的剩餘部分，以及位於個別的金屬閘極電極48下方的閘極介電層45。剩餘部分的層45、層46和層47相當於後述之取代閘極堆疊52。
接著，凹陷取代閘極堆疊52，形成如圖8A所示的凹陷56。個別的操作係如圖21之製程的操作208所示。在接續的操作中，以硬式罩幕58填充凹陷56，且所得結構如圖9A、圖9B和圖9C所示。個別的步驟係如圖21之製程的 操作210所示。根據一些實施例，硬式罩幕58係由選自於與形成磊晶罩幕層44所選用的材料相同族群的材料來形成，上述材料包括氧化鋁。
在接續的操作中，從圖9A之頂部視角看，具有長條狀的取代閘極堆疊52被裁切為較短的塊狀(未繪示)，每個塊狀可用以形成一個鰭狀場效電晶體。經裁切(移除)的部分取代閘極52所留下的凹陷係以介電材料(未繪示，不在所繪示的平面中)填充，然後進行平坦化以移除過多的介電材料。所得之結構如圖10A、圖10B和圖10C所示，其中藉由平坦化來薄化硬式罩幕層58。
然後，例如以濕式蝕刻操作移除犧牲層間介電層49。開口60A、開口60B和開口60C因此暴露出來，如圖11A、圖11B和圖11C所示。個別的操作係如圖21之製程的操作212所示。因此，磊晶罩幕層44係暴露出來。
圖12A/圖12B/圖12C至圖16A/圖16B/圖16C繪示以填充材填充開口60B，以及以層間介電層(ILD)填充開口60A和開口60C。個別的操作係圖21之製程的操作214所示。請參考圖12A、圖12B和圖12C，填入填充材62，並進行如化學機械研磨或機械研磨的平坦化操作，以平坦化填充材62的表面。所得之填充材62的頂面高於硬式罩幕58的頂面。如圖12B和圖12C所示，磊晶源極/汲極區42埋設於填充材62中。根據本揭露之一些實施例，填充材62是由非晶矽或多晶矽形成。
在圖13A、圖13B和圖13C中，墊氧化層(pad oxide layer)64和硬式罩幕66形成於填充材62上。墊氧化層64可由氧化矽形成，以及硬式罩幕層66可由氮化矽形成。
在圖14A中，施加並圖案化光阻68，以覆蓋開口60B中的填充材62之一部分，而開口60A和開口60C(圖13A)中的填充材之一部分未被覆蓋。然後，圖案化硬式罩幕66，接著移除光阻68。圖案化的硬式罩幕66被用來蝕刻填充材62，使得開口60A和開口60C再次顯現，如圖14A所示。個別的操作係如圖21之製程的操作216所示。可使用含碳和氟之氣體，如四氟化碳(CF4)、二氟甲烷(CH2F2)、三氟甲烷(CHF3)或其類似物，進行蝕刻。因此，開口60A和開口60C中的磊晶罩幕層44暴露出來。如圖14B和圖14C所示，源極/汲極42在蝕刻後仍被覆蓋。
接著形成層間介電層(ILD)70以填充接觸窗開口60A和開口60C，如圖15A、圖15B和圖15C所示。個別的操作係如圖21之製程的操作218所示。層間介電層70可包括介電材料，並使用例如可流動式化學氣相沉積、旋轉塗佈、化學氣相沉積或其他沉積方法來形成。層間介電層也可由正矽酸乙酯(tetraethylorthosilicate；TEOS)氧化物、電漿加強化學氣相沉積氧化物(例如SiO2)、磷矽酸玻璃、硼矽酸玻璃、硼摻雜磷矽酸鹽玻璃(boron-doped phospho-silicate glass；BPSG)或其類似物來形成。層間介電層70完全覆蓋剩餘部分的硬式罩幕66和墊氧化層64。接下來，進行如化學機械研磨或機械研磨之平坦化操作，以移除硬式罩幕66、墊氧化層64和填充材62之一部分，造成 如圖16A、圖16B和圖16C所示之結構。如圖16A所示，填充材62填充開口60B，而層間介電層70填充開口60A和開口60C。
然後，經由例如使用四甲基氫氧化銨(tetra methyl ammonium hydroxide；TMAH)之濕式蝕刻，或是使用如四氟化碳之含碳及氟氣體的乾式蝕刻，移除填充材62。個別的操作係如圖21之製程的操作220所示。接下來，由開口60B暴露出的磊晶罩幕層44被移除，而所得的結構如圖17A、圖17B和圖17C所示。根據本揭露的一些實施例，上述移除之操作是經由蝕刻操作來進行，其中磊晶罩幕層44具有高的蝕刻選擇比(即磊晶罩幕層44的蝕刻速率對磊晶區42的蝕刻速率之比值)，例如，蝕刻選擇比高於約20或高於約50。若磊晶罩幕層44包括氮化矽層和氧化鋁層，氮化矽層先被移除，接著才移除氧化鋁層，其中氧化鋁相對於磊晶區42的蝕刻選擇比高。氧化鋁有利地提供相對於層間介電層70(如氧化矽)、磊晶區42(以及填充材62)之高濕式蝕刻選擇比，使得在移除磊晶罩幕層44時，層間介電層70和磊晶區42不受損害。因此，磊晶區42仍具有高的拓樸形狀(topology)，且磊晶區42不因磊晶罩幕層44之蝕刻被平坦化。根據一些示範的實施例，磊晶罩幕層44係由氧化鋁形成，其係使用丁氧基乙醇、羥胺(dydroxylamine)、二乙烯三胺五乙酸(diethylene triamine pentaacetic acid；DTPA)以及水之混合物加以蝕刻。如圖17A、圖17B和圖17C所示，磊晶區42在蝕刻後暴露出來。形成於所繪示的最 左邊和最右邊的源極/汲極區42正上方之磊晶罩幕層44的一部分也被蝕刻而形成凹陷71。然而，因為磊晶罩幕層44所暴露出的頂面較窄，故凹陷71較淺。
根據本揭露的一些實施例，經由開口60B，進一步以p型或n型雜質植入磊晶區42中，使得個別的源極/汲極區42具有增加的摻雜濃度。根據本揭露之另一些實施例，上述植入步驟係省略。
請參考圖18A，根據本揭露之一些實施例，接觸窗間隙壁72形成於開口60B中。接觸窗間隙壁72可由高介電常數(介電常數接近3.9)材料形成，使得接觸窗間隙壁72具有良好的隔離性能。適合的材料包含鋁氧化物(AlxOy)、氧化鉿(HfO2)、氮化矽(SiN)以及氧碳氮化矽(SiOCN)(不具有孔洞或內側實質未有孔洞)。接觸窗間隙壁72的形成可包括如化學氣相沉積或原子層沉積之共形沉積方法，以形成毯覆層。之後進行非等向性蝕刻，使得毯覆層之水平部分被移除。毯覆層的垂直部分留在開口60B上形成接觸窗間隙壁72，當從晶圓10之頂部看時，接觸窗間隙壁72形成環狀。與形成接觸窗間隙壁72相同之材料也填入凹陷71(圖17A)中，以形成間隙壁74。圖18B和圖18C繪示暴露出的磊晶區42。
圖19A繪示矽化物區75、金屬層76、導電阻障層78和金屬區80的形成。在所繪示的實施例中，繪示三個磊晶源極/汲極區42，並繪示一個源極/汲極接觸窗插塞與中間磊晶源極/汲極區42連接。在實際的製程中，也可有多個 源極/汲極接觸窗插塞與左邊和右邊的磊晶源極/汲極區42形成連接。然而，源極/汲極接觸窗插塞形成於與所繪不同的平面，因此未表示於圖式中。
根據一些實施例，沉積金屬層76(例如：鈦層)做為毯覆層，接著對金屬層76的上部分進行氮化製程，以形成金屬氮化層(例如金屬氮化層78)。金屬層76的下部分未被氮化。接著，進行退火(其可為快速熱退火)，以使下部分剩餘的金屬層76與上部分的源極/汲極區42反應，從而形成矽化物區75。在接觸窗間隙壁72之側壁上的部分金屬層76未反應。接著，移除最終產品所剩餘的金屬氮化層78或先形成之金屬氮化層78，並接著沉積薄於所移除之金屬氮化層之新的金屬氮化層(如另一氮化鈦層，也以元件符號78表示)。然後，例如藉由填入鎢、鈷或其類似物，形成金屬區80，並接續進行平坦化以移除過多的材料，以形成下部源極/汲極接觸窗插塞82。個別的操作係如圖21之製程的操作222所示。圖19B和圖19C係繪示下部源極/汲極接觸窗插塞82的另一剖面圖。
圖20繪示蝕刻停止層86、介電層88、閘極接觸窗插塞(接觸窗)90以及於蝕刻停止層86和介電層88中的上部源極/汲極接觸窗插塞(接觸窗)92之形成。個別的操作係如圖21之製程的操作224所示。蝕刻停止層86可由碳化矽、氮氧化矽、碳氮化矽或其類似物所形成，且可使用如化學氣相沉積之沉積方法來形成。介電層88可包括選自於磷矽酸玻璃、硼矽酸玻璃、硼摻雜磷矽酸玻璃、氟摻雜矽酸玻璃、 正矽酸乙酯或電漿加強化學氣相沉積氧化物(其可包括氧化矽)之材料。介電層88可使用旋轉塗佈、可流動化學氣相沉積或其類似方法形成，或使用如電漿加強化學氣相沉積或低壓化學氣相沉積之沉積方法形成。
蝕刻介電層88和蝕刻停止層86以形成開口(被插塞/接觸窗90和92佔用)。上述蝕刻可例如使用反應離子蝕刻(reactive ion etch；RIE)。在接續的操作中，形成插塞/接觸窗90和92。閘極接觸窗插塞90穿過硬式罩幕58以接觸閘極電極48。根據本揭露之一些實施例，插塞/接觸窗90和92包括阻障層和位於阻障層上方的含金屬材料層。插塞/接觸窗90和92的形成可包括形成毯覆阻障層和位於毯覆阻障層上方的含金屬材料層，以及進行平坦化以移除毯覆阻障層和含金屬材料層過多的部分。阻障層可由如氮化鈦或氮化鉭之金屬氮化物形成。
本揭露的實施例具有許多優點特徵。磊晶罩幕層相對於磊晶區具有高蝕刻選擇比，故在移除磊晶罩幕層時，不造成磊晶區過多的損失。再者，藉由形成犧牲填充材保護在一些源極/汲極接觸窗開口中的磊晶罩幕層的一些部分，而其他磊晶罩幕層可使用濕式蝕刻來移除，但不損害被保護的磊晶罩幕層。因此，磊晶源極/汲極具有減少形成源極/汲極接觸窗開口時的損失，使所得的接觸阻抗獲得改善。
根據本揭露之一些實施例，方法包含形成第一接觸窗開口與第二接觸窗開口，以分別顯露出第一源極/汲極區以及第二源極/汲極區；形成罩幕層，其具有分別在第 一接觸窗開口和第二接觸窗開口中的第一部分和第二部分；分別形成第一犧牲層間介電層和第二犧牲層間介電層於第一接觸窗開口和第二接觸窗開口中；從第一接觸窗開口移除第一犧牲層間介電層；填入填充材至第一接觸窗開口中；以及，蝕刻第二犧牲層間介電層。填充材保護罩幕層之第一部分，以避免被蝕刻。層間介電層係形成於第二接觸窗開口中且於罩幕層之第二部份上。填充材和罩幕層的第一部分係使用濕式蝕刻移除，以顯露出第一接觸窗開口。接觸窗插塞形成於第一接觸窗開口中。
根據本揭露之一些實施例，方法包含形成罩幕層延伸至第一虛擬閘極堆疊和第二虛擬閘極堆疊之間的空間；於該空間中填入犧牲層間介電層。犧牲層間介電層位於罩幕層之底部上方。方法更包含移除犧牲層間介電層以顯露出空間中的罩幕層；將填充材填入所述空間中，其中填充材位於空間中的罩幕層上；移除填充材與罩幕層，以顯露出源極/汲極區；以及，形成接觸窗插塞於所述空間中。
根據本揭露之一些實施例，方法包含形成罩幕層延伸至第一虛擬閘極堆疊和第二虛擬閘極堆疊之間的空間；於罩幕層上方以及空間中，填入犧牲層間介電層；移除犧牲層間介電層，以顯露出空間中的罩幕層；以及，使用濕式蝕刻自空間移除罩幕層。罩幕層之移除部分包含位於空間之底部的水平部分，以及延伸至第一虛擬閘極堆疊之頂面的垂直部分。接觸窗插塞形成於空間中。
前述內容概述多個實施例之特徵，以使於本技 術領域具有通常知識者可進一步了解本揭露之態樣。本技術領域具通常知識者應可輕易利用本揭露作為基礎，設計或潤飾其他製程及結構，藉以執行此處所描述之實施例的相同的目的及/或達到相同的優點。本技術領域具有通常知識者亦應可了解，上述相等的結構並未脫離本揭露之精神和範圍，且在不脫離本揭露之精神及範圍下，其可經潤飾、取代或替換。

Claims (10)

  1. 一種低阻抗接觸窗插塞之形成方法，包含：形成一第一接觸窗開口與一第二接觸窗開口，以分別顯露出一第一源極/汲極區以及一第二源極/汲極區；形成一罩幕層，該罩幕層包含分別在該第一接觸窗開口和該第二接觸窗開口中的一第一部分和一第二部分；分別形成一第一犧牲層間介電層和一第二犧牲層間介電層於該第一接觸窗開口和該第二接觸窗開口中；分別從該第一接觸窗開口和該第二接觸窗開口中移除該第一犧牲層間介電層和該第二犧性層間介電層；填充一填充材至該第一接觸窗開口中；形成一層間介電層於該第二接觸窗開口中並於該罩幕層之該第二部分上；使用濕式蝕刻移除該填充材與該罩幕層之該第一部分，以顯露出該第一接觸窗開口；以及形成一接觸窗插塞於該第一接觸窗開口中。
  2. 如申請專利範圍第1項所述之低阻抗接觸窗插塞之形成方法，其中形成該罩幕層之操作包含沉積氧化鋁層以及形成氮化矽層於該氧化鋁層上方，且該罩幕層之該第一部份係使用丁氧基乙醇、羥胺(dydroxylamine)、二乙烯三胺五乙酸(diethylene triamine pentaacetic acid；DTPA)以及水之一混合物來移除。
  3. 如申請專利範圍第1項所述之低阻抗接觸窗插塞之形成方法，其中該填充材包含矽，且填入該填充材至該第一接觸窗開口中之操作包含：填入該填充材至該第一接觸窗開口和該第二接觸窗開口中；以及自該第二接觸窗開口中移除該填充材，以暴露出該罩幕層之該第二部分，其中該填充材存留於該第一接觸窗開口中。
  4. 如申請專利範圍第1項所述之低阻抗接觸窗插塞之形成方法，更包含：形成一金屬閘極電極於該第一接觸窗開口和該第二接觸窗開口之間；凹陷該金屬閘極電極，以形成一凹陷；將一硬式罩幕填入該凹陷中；以及於形成該接觸窗插塞於該第一接觸窗開口中之前，形成一介電接觸窗間隙壁於該第一接觸窗開口中。
  5. 一種低阻抗接觸窗插塞之形成方法，包含：形成一罩幕層延伸至一第一虛擬閘極堆疊和一第二虛擬閘極堆疊之間的一空間；於該空間中填入一犧牲層間介電層，其中該犧牲層間介電層位於該罩幕層之一底部上方；移除該犧牲層間介電層以顯露出該空間中的該罩幕 層；將一填充材填入該空間，其中該填充材位於該空間中的該罩幕層上；移除該填充材與該罩幕層，以顯露出一源極/汲極區，其中該罩幕層使用丁氧基乙醇、羥胺(dydroxylamine)、二乙烯三胺五乙酸(diethylene triamine pentaacetic acid；DTPA)以及水之一混合物來移除；以及形成一接觸窗插塞於該空間中。
  6. 如申請專利範圍第5項所述之低阻抗接觸窗插塞之形成方法，更包含於形成該犧牲層間介電層後以及移除該犧牲層間介電層前，以一第一取代閘極堆疊和一第二取代閘極堆疊分別取代該第一虛擬閘極堆疊和該第二虛擬閘極堆疊，且其中形成該罩幕層之操作包含沉積氧化鋁層以及形成氮化矽層於該氧化鋁層上方。
  7. 如申請專利範圍第5項所述之低阻抗接觸窗插塞之形成方法，其中該罩幕層係使用具有實質高於20之一蝕刻選擇比的濕式蝕刻來移除，該蝕刻選擇比為該罩幕層之一第一蝕刻速率對該源極/汲極區之一第二蝕刻速率的一比值，且移除該罩幕層之操作係使用丁氧基乙醇、羥胺、二乙烯三胺五乙酸以及水之一混合物來進行。
  8. 一種低阻抗接觸窗插塞之形成方法，包含： 形成一罩幕層，包含：一第一部分，延伸至一第一虛擬閘極堆疊和一第二虛擬閘極堆疊之間的一第一空間；以及一第二部分，延伸至相鄰二個虛擬閘極堆疊之間的一第二空間；填入一犧牲層間介電層於該罩幕層上方，其中該犧牲層間介電層包含填入該第一空間的一第一部分和填入該第二空間的一第二部分；移除該犧牲層間介電層的該第一部分和該第二部分，以顯露出該罩幕層的該第一部分和該第二部分；將一層間介電層填入該第一空間中；將一填充材填入該第二空間中；移除該填充材，以顯露出該罩幕層的該第二部分；移除該罩幕層的該第二部分；以及形成一接觸窗插塞於該第二空間中。
  9. 如申請專利範圍第8項所述之低阻抗接觸窗插塞之形成方法，其中於移除該罩幕層的該第二部分後，該罩幕層之一第一閘極間隙壁與位於相對側之一第二閘極間隙壁的側壁暴露出來，且該第一閘極間隙壁和該第二閘極間隙壁分別位於該第一虛擬閘極堆疊和該第二虛擬閘極堆疊的側壁上，且其中形成該罩幕層之操作包含沉積氧化鋁層以及沉積氮化矽層於該氧化鋁層上方。
  10. 如申請專利範圍第8項所述之低阻抗接觸窗插塞之形成方法，其中將該層間介電層填入該第一空間中和將該填充材填入該第二空間中的操作包含：將該填充材填入該第一空間和該第二空間中，其中該填充材包含多晶矽或非晶矽；自該第一空間中移除該填充材，並使該填充材留於該第二空間中，其中在該填充材自該第一空間移除後，該層間介電層填入該第一空間中；以及平坦化該填充材和該層間介電層。
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US20200365450A1 (en) 2020-11-19
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US20230123827A1 (en) 2023-04-20
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