TWI628665B - 記憶體裝置電力管理器及其方法 - Google Patents

記憶體裝置電力管理器及其方法 Download PDF

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Publication number
TWI628665B
TWI628665B TW106114950A TW106114950A TWI628665B TW I628665 B TWI628665 B TW I628665B TW 106114950 A TW106114950 A TW 106114950A TW 106114950 A TW106114950 A TW 106114950A TW I628665 B TWI628665 B TW I628665B
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TW
Taiwan
Prior art keywords
memory
memory bank
memory device
power state
bank
Prior art date
Application number
TW106114950A
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English (en)
Chinese (zh)
Other versions
TW201729185A (zh
Inventor
M 傑德羅喬
Original Assignee
美商美光科技公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 美商美光科技公司 filed Critical 美商美光科技公司
Publication of TW201729185A publication Critical patent/TW201729185A/zh
Application granted granted Critical
Publication of TWI628665B publication Critical patent/TWI628665B/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215—Monitoring of peripheral devices
    • G06F1/3225—Monitoring of peripheral devices of memory devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/148—Details of power up or power down circuits, standby circuits or recovery circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G11C7/1012—Data reordering during input/output, e.g. crossbars, layers of multiplexers, shifting or rotating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Dram (AREA)
  • Memory System (AREA)
  • Power Sources (AREA)
  • Semiconductor Memories (AREA)
TW106114950A 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法 TWI628665B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/359,039 US9105323B2 (en) 2009-01-23 2009-01-23 Memory device power managers and methods
US12/359,039 2009-01-23

Publications (2)

Publication Number Publication Date
TW201729185A TW201729185A (zh) 2017-08-16
TWI628665B true TWI628665B (zh) 2018-07-01

Family

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Family Applications (3)

Application Number Title Priority Date Filing Date
TW106114950A TWI628665B (zh) 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法
TW099101838A TWI514409B (zh) 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法
TW104136077A TWI590255B (zh) 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法

Family Applications After (2)

Application Number Title Priority Date Filing Date
TW099101838A TWI514409B (zh) 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法
TW104136077A TWI590255B (zh) 2009-01-23 2010-01-22 記憶體裝置電力管理器及其方法

Country Status (7)

Country Link
US (2) US9105323B2 (https=)
EP (2) EP3223281B1 (https=)
JP (2) JP5762312B2 (https=)
KR (1) KR101609311B1 (https=)
CN (2) CN104699226B (https=)
TW (3) TWI628665B (https=)
WO (1) WO2010085657A2 (https=)

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CN111052134B (zh) * 2017-08-31 2024-04-26 快图有限公司 外围处理设备
TWI659308B (zh) * 2017-12-08 2019-05-11 旺宏電子股份有限公司 記憶體裝置及其操作方法
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KR102916491B1 (ko) 2020-08-27 2026-01-26 삼성전자주식회사 메모리 장치
CN116324707A (zh) * 2020-09-18 2023-06-23 拉姆伯斯公司 用于聚合处理单元和动态分配存储器的方法和电路
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Also Published As

Publication number Publication date
EP3223281A3 (en) 2017-12-13
US20150357010A1 (en) 2015-12-10
US20100191999A1 (en) 2010-07-29
CN104699226B (zh) 2017-11-14
EP2389633B1 (en) 2017-04-05
CN102292715B (zh) 2015-04-22
JP2015158948A (ja) 2015-09-03
JP2012515989A (ja) 2012-07-12
EP3223281A2 (en) 2017-09-27
JP6041928B2 (ja) 2016-12-14
KR20110115587A (ko) 2011-10-21
TW201604887A (zh) 2016-02-01
WO2010085657A3 (en) 2010-10-21
EP2389633A2 (en) 2011-11-30
TW201729185A (zh) 2017-08-16
CN102292715A (zh) 2011-12-21
US9583157B2 (en) 2017-02-28
TWI590255B (zh) 2017-07-01
KR101609311B1 (ko) 2016-04-05
TWI514409B (zh) 2015-12-21
EP3223281B1 (en) 2019-07-31
EP2389633A4 (en) 2012-10-31
US9105323B2 (en) 2015-08-11
CN104699226A (zh) 2015-06-10
WO2010085657A2 (en) 2010-07-29
JP5762312B2 (ja) 2015-08-12
TW201108241A (en) 2011-03-01

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