TWI612616B - 於半導體薄膜之應變鬆弛的異質磊晶中用於缺陷之有效深寬比捕捉之具傾角的溝槽之使用 - Google Patents

於半導體薄膜之應變鬆弛的異質磊晶中用於缺陷之有效深寬比捕捉之具傾角的溝槽之使用 Download PDF

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TWI612616B
TWI612616B TW104109217A TW104109217A TWI612616B TW I612616 B TWI612616 B TW I612616B TW 104109217 A TW104109217 A TW 104109217A TW 104109217 A TW104109217 A TW 104109217A TW I612616 B TWI612616 B TW I612616B
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inclination
angle
crystalline material
groove
trench
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TW201543613A (zh
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史林尼法森史瓦米奈森Ｔ
克哈嘉法林阿德尼
山契斯艾羅安東尼歐Ｃ
馬丁派翠克Ｍ
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應用材料股份有限公司
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Abstract

本揭示案之實施例係關於降低異質磊晶生長薄膜中之位錯密度，及包括位錯密度經降低之異質磊晶薄膜的裝置。根據本揭示案之實施例，高深寬比溝槽之側壁可傾斜或具有傾角，以容許形成於高深寬比溝槽中之結晶材料中之缺陷終止於傾斜側壁中，該等包括沿高深寬比溝槽之長度傳播之缺陷。本揭示案之實施例可用以減少微電子應用中矽(Si)上異質磊晶生長中之缺陷，如場效應電晶體中使用第III族-第V族元素之高遷移率通道。

Description

於半導體薄膜之應變鬆弛的異質磊晶中用於缺陷之有效深寬比捕捉之具傾角的溝槽之使用
本揭示案之實施例係關於具有高晶格失配之材料之異質磊晶生長。更特定而言，本揭示案之實施例係關於降低異質磊晶生長薄膜中之位錯密度，及包括位錯密度經降低之異質磊晶薄膜之裝置。
異質磊晶是在結晶基板上或不同材料薄膜上之結晶薄膜生長，異質磊晶具有諸多實際應用用途。例如，矽(Si)上之鍺(Ge)異質磊晶用作場效應電晶體(field effect transistor；FET)中之p型通道。然而，由於兩種不同結晶材料之間的晶格失配，異質磊晶薄膜易於產生缺陷，如位錯、反相晶界，及疊積缺層。
深寬比捕捉(aspect ratio trapping；ART)已經用以減少異質磊晶薄膜中之缺陷。在深寬比捕捉中，結晶材料在較 深之狹窄溝槽(亦即高深寬比溝槽)中生長，以使得由晶格失配所引起之一些位錯可終止於槽壁，由此，該等位錯可在高深寬比溝槽內被捕捉，而非達到結晶材料之有效區域。
然而，習用深寬比捕捉無法終止沿狹窄溝槽之長度所產生之位錯。第1圖示意地圖示習用深寬比捕捉之結構100。狹窄溝槽106在介電層104中形成於結晶材料102上方，使得異質磊晶薄膜可在狹窄溝槽106中形成。狹窄溝槽106沿x方向較為狹窄，且沿z方向長度延伸。在狹窄溝槽106底部110曝露之結晶材料102充當晶種結構，以用於外來材料在狹窄溝槽106中之磊晶生長。在異質磊晶期間，由外來材料與結晶材料102之晶格失配所引起之位錯自底部110產生且沿所有方向擴展。沿x-y平面(亦即垂直於狹窄溝槽106之長度)擴展之位錯可到達側壁108且終止。然而，沿x-y平面(亦即平行於狹窄溝槽106之長度)擴展之位錯可到達狹窄溝槽106之頂部112且對所欲有效區域產生負面影響。
因此，需要缺陷在異質磊晶薄膜中減少的方法及結構。
本揭示案之實施例係關於具有高晶格失配之材料之異質磊晶生長。更特定而言，本揭示案之實施例係關於降低異質磊晶生長薄膜中之位錯密度，及包括位錯密度經降低之異質磊晶薄膜之裝置。
一個實施例提供一種裝置，包括：第一結晶材料；及在第一結晶材料上方形成之非結晶層。具有傾角的溝槽貫 穿非結晶層而形成，以使得第一結晶材料位於具有傾角的溝槽之底部。裝置進一步包括在具有傾角的溝槽中藉由磊晶生長而形成之第二結晶材料。第一結晶材料及第二結晶材料具有失配之晶格尺寸。具有傾角的溝槽之側壁在第一結晶材料頂表面上之投影長於具有傾角的溝槽之底部在該頂表面上之投影。
本揭示案之另一實施例提供一種用於形成半導體裝置之方法。該方法包括在第一結晶材料上方形成非結晶層，貫穿非結晶層形成具有傾角的溝槽以在具有傾角的溝槽底部曝露第一結晶材料之一部分，及從具有傾角的溝槽底部起藉由磊晶生長形成第二結晶材料以填充具有傾角的溝槽，其中第一結晶材料及第二結晶材料具有失配之晶格尺寸。
本揭示案之另一實施例提供一種用於形成半導體裝置之方法。該方法包括在含矽結晶基板上方形成介電層，及貫穿介電材料形成具有傾角的溝槽以在具有傾角的溝槽底部曝露含矽結晶基板之一部分。具有傾角的溝槽之側壁與含矽 結晶基板之頂表面之間的傾角小於
Figure TWI612616BD00001
，其中h表示介電層 厚度，且w表示具有傾角的溝槽沿含矽結晶基板頂表面之寬度。該方法進一步包括在具有傾角的溝槽之底部蝕刻曝露之含矽結晶基板以沿(111)晶面方向產生一表面，及在具有傾角的溝槽中藉由磊晶生長形成結晶材料，該結晶材料包括第III族元素及第V族元素。
100‧‧‧結構
102‧‧‧結晶材料
104‧‧‧介電層
106‧‧‧狹窄溝槽
108‧‧‧側壁
110‧‧‧底部
112‧‧‧頂部
200‧‧‧結構
202‧‧‧結晶材料
202a‧‧‧頂表面
203‧‧‧邊緣
204‧‧‧非結晶層
206‧‧‧溝槽
208‧‧‧外來結晶材料
210‧‧‧側壁
212‧‧‧底部
300‧‧‧電漿製程腔室
301‧‧‧腔室主體
302‧‧‧製程空間
304‧‧‧電漿源
306‧‧‧基板支撐件
308‧‧‧基板
310‧‧‧電漿
310a‧‧‧電漿鞘
312‧‧‧絕緣板
314‧‧‧絕緣板
316‧‧‧間隙
318‧‧‧離子流
320‧‧‧絕緣修正器
322‧‧‧水平元件
324‧‧‧垂直元件
326‧‧‧基板表面
328‧‧‧製程帶
330‧‧‧致動器
332‧‧‧致動器
334‧‧‧傾角
350‧‧‧製程腔室
352‧‧‧腔室主體
354‧‧‧製程區域
356‧‧‧基板支撐件
358‧‧‧基板
360‧‧‧離子束源
362‧‧‧梳狀離子束
364‧‧‧中心軸
366‧‧‧基板軸
368‧‧‧傾角
400‧‧‧裝置
402‧‧‧基板
404‧‧‧淺溝槽隔離
406‧‧‧介電層
408‧‧‧遮罩層
410‧‧‧溝槽圖案
412‧‧‧溝槽
412a‧‧‧上部
412b‧‧‧側壁
414‧‧‧底表面
416‧‧‧V形槽
418‧‧‧晶種層
420‧‧‧結晶材料
422‧‧‧水平線
424‧‧‧垂直線
502‧‧‧介電材料
504‧‧‧狹窄溝槽
506‧‧‧底表面
508‧‧‧通道材料
600‧‧‧裝置
602‧‧‧頂表面
604‧‧‧遮罩
606‧‧‧平面表面
608‧‧‧通道材料
700‧‧‧方法
710‧‧‧步驟
720‧‧‧步驟
730‧‧‧步驟
740‧‧‧步驟
750‧‧‧步驟
760‧‧‧步驟
為詳細理解本揭示案之上述特徵，可藉由參考實施 例對上文中簡短概述之本揭示案進行更具體描述，該等實施例中之一些實施例在附圖中進行圖示。然而，將注意，附圖僅圖示本揭示案之典型實施例，因此將不被視作限制本揭示案之範疇，因為本揭示案可承認其他同等有效的實施例。
第1圖是藉由深寬比捕捉進行習用異質磊晶之結構之示意圖。
第2圖示意地圖示根據本揭示案之一個實施例的用於異質磊晶之具有傾角的溝槽。
第3A圖是根據本揭示案之一個實施例的用於形成具有傾角的溝槽之製程腔室之示意性剖面圖。
第3B圖是根據本揭示案之另一個實施例的用於形成具有傾角的溝槽之製程腔室之示意性剖面圖。
第4A-4D圖示意地繪示根據本揭示案之一個實施例的裝置之形成，該裝置在具有傾角的溝槽中具有異質磊晶薄膜。
第5圖示意地繪示根據本揭示案之一個實施例的替換磊晶線之形成。
第6A-6B圖示意地繪示根據本揭示案之一個實施例藉由回蝕進行的磊晶線之形成。
第7圖是根據本揭示案之一個實施例的異質磊晶生長方法之流程圖。
為便於理解，在可能之情況下已使用相同元件符號以指定圖式中共有之相同元件。預期在一個實施例中揭示之元件可有利地用於其他實施例，而無需特定詳述。
根據本揭示案之實施例，高深寬比溝槽之側壁可傾斜或具有傾角，以容許形成於高深寬比溝槽中之結晶材料缺陷將在傾斜側壁中終止，該等缺陷包括沿高深寬比溝槽之長度傳播之缺陷。本揭示案之實施例可用以減少藉由異質磊晶形成之任何結晶薄膜中之缺陷。例如，本揭示案之實施例可用以減少微電子應用中矽(Si)上異質磊晶生長中之缺陷，如場效應電晶體中使用第III族-第V族元素之高遷移率通道。本揭示案之實施例亦可用於形成其他磊晶薄膜，如形成於藍寶石上之氮化鎵(GaN)薄膜、形成於砷化鎵(GaAs)上或單結晶CVD鑽石上或銥上之磷化鋁鎵銦(AlGaInP)薄膜。
第2圖示意地圖示根據本揭示案之一個實施例的結構200，該結構200具有用於異質磊晶之具有傾角的溝槽206。結構200包括結晶材料202。結晶材料202可具有沿y-z平面之頂表面202a。非結晶層204可在結晶材料202之頂表面202a上形成。具有傾角的溝槽206在非結晶層204中形成以曝露結晶材料202之頂表面202a之一部分。具有傾角的溝槽206由側壁210及底部212界定，底部212是頂表面202a之一部分。側壁210及底部212在邊緣203處會合。為論述方便起見，具有傾角的溝槽206之傾角α是側壁210與底部212之間之傾角，具有傾角的溝槽206之寬度w由邊緣203之間的距離界定，且具有傾角的溝槽206之高度h由非結晶層204之厚度界定。外來結晶材料208在具有傾角的溝槽206中自底部212形成，且填充具有傾角的溝槽206。外來結晶材 料208及結晶材料202的晶格尺寸不同。結晶材料202與外來結晶材料208之間的晶格尺寸之失配導致外來結晶材料208中形成缺陷，如位錯、反相晶界及疊積缺層。可選擇具有傾角的溝槽206之傾角α、寬度w及高度h，以使得在結晶材料202與外來結晶材料208面接的位置處，自具有傾角的溝槽206之底部212起始之缺陷可在具有傾角的溝槽206之側壁210上終止。
在一個實施例中，傾角α經設定以使得在平行於x-z平面之平面內沿具有傾角的溝槽206之長度延伸之缺陷在具有傾角的溝槽之側壁210上終止。特定而言，選擇傾角α及寬度w以使得側壁210在y-z平面上之投影w'比具有傾角的溝槽206之寬度w長，
Figure TWI612616BD00002
 或
Figure TWI612616BD00003
在一個實施例中，選擇深寬比，亦即高度與寬度之比h/w，以使得自底部212產生且沿平行於x-y平面之平面傳播之缺陷可在側壁210上終止。應注意，高度與寬度之比h/w無單位。
在一個實施例中，具有傾角的溝槽206之高度h可為約100奈米或更小。具有傾角的溝槽206之寬度w可為約20奈米至約40奈米之間。具有傾角的溝槽206之傾角α可為約11度至約45度之間。在一個實施例中，具有傾角的溝槽206之傾角α可為約30度。
結晶材料202可為由結晶材料形成之基板，或在基板上形成之結晶層。在一個實施例中，結晶材料202可為含矽基板，該基板包括鍺(Ge)、碳(C)、硼(B)、磷(P)或其他可與矽材料共同生長、摻雜，及/或相關聯之已知元素。
非結晶層204可為介電材料，該材料包括以下各者中之一或更多者：氮化矽(SiN)、二氧化矽(SiO2)、氮氧化矽(SiON)或可用以形成介電層之其他適合材料。
外來結晶材料208可在具有傾角的溝槽206之底部212上自曝露之結晶材料202起藉由異質磊晶而形成。外來結晶材料208可包括二元或三元第III族-第V族元素中之一者。第III族元素可包括鎵(Ga)、鋁(Al)及銦(In)。第V族元素可包括氮(N)、磷(P)及砷(As)。
結構200可用於形成任何適合之需要異質磊晶溝槽材料之裝置，如場效應電晶體及光電子裝置。
結構200之具有傾角的溝槽206可由定向蝕刻製程形成。在一個實施例中，具有傾角的溝槽206可藉由修正電漿入射傾角及將經修正之電漿導引至基板而形成。第3A圖是根據本揭示案之一個實施例的用於形成具有傾角的溝槽之電漿製程腔室300之示意性剖面圖。電漿製程腔室300包括界定製程空間302之腔室主體301。基板支撐件306安置於製程空間302中以在操作期間支撐基板308。電漿製程腔室300進一步包括電漿源304以在製程空間302中在基板308上方產生並維持電漿310。
電漿製程腔室300進一步包括絕緣修正器320，以 在將電漿310導引至基板308之前修正電漿310之入射傾角。在一個實施例中，絕緣修正器320可包括兩個絕緣板312、314。該兩個絕緣板312及314經定位以使得在該兩者之間形成間隙316。在一個實施例中，兩個絕緣板312可安置於不同水平位準，以使得間隙316包括沿平行於基板表面326之方向的水平元件322及垂直於基板表面326之垂直元件324。絕緣修正器320之間隙316定位在接近基板308之電漿鞘310a附近。間隙316修正電漿鞘310a內之電場以控制電漿310與電漿鞘310a之間的邊界形狀。從間隙316吸至基板308之電漿310中之離子流318以一傾角334擊打基板308。
離子流318之傾角334賦能具有傾角的溝槽在基板308上之製程帶328上之形成。傾角334類似於正在形成之具有傾角的溝槽之傾角。可藉由調整間隙316之垂直元件324與水平元件322而微調傾角334。在一個實施例中，致動器330及332可連接至絕緣板312、314以分別移動絕緣板312、314，以調整間隙316之垂直元件324與水平元件322。
基板308及絕緣修正器320可相對於彼此移動以移動製程帶328，由此藉由掃描基板308上方之製程帶328而處理整個基板308。在一個實施例中，致動器330及332亦可相對於基板308移動絕緣板312、314，以移動製程帶328。
或者，具有傾角的溝槽206可藉由離子束蝕刻方法而形成，該方法例如離子束蝕刻(ion beam etching；IBE)、反應性離子束蝕刻(reactive ion beam etching；RIBE)，及化學輔助離子束蝕刻(chemical assisted ion beam etching；CABIE)。 第3B圖是根據本揭示案之另一個實施例的用於形成具有傾角的溝槽之製程腔室350之示意性剖面圖。製程腔室350可包括界定製程區域354之腔室主體352。基板支撐件356將基板358定位在製程區域354中。製程腔室350進一步包括離子束源360。離子束源360將梳狀離子束362導引向腔室主體352中之基板358。離子束362可沿中心軸364為梳狀。基板支撐件356將基板358定位在垂直於基板軸366之方向上。基板軸366相對於離子束362之中心軸364成傾角368，以使得離子束362以傾角368轟擊基板358，以產生具有傾角的溝槽。
第4A-4D圖示意地繪示根據本揭示案之一個實施例的裝置400之形成，該裝置在具有傾角的溝槽中具有異質磊晶薄膜。在一個實施例中，裝置400可為平面金氧半導體場效應電晶體(metal-oxide-semiconductor field effect transistor；MOSFET)之一部分。或者，裝置400可為FinFET之一部分，該FinFET亦即具有連接源極與汲極之薄鰭狀物的場效應電晶體。MOSFET之源極與汲極之間的通道或FinFET之薄鰭狀物可藉由根據本揭示案之實施例的異質磊晶而形成。
如第4A圖中所示，基板402上形成有介電層406。基板402由結晶材料形成。基板402可為矽基板，或具有以下各者之矽基板：鍺(Ge)、碳(C)、硼(B)、磷(P)或其他可與矽材料共同生長、摻雜及/或相關聯之已知元素。在一個實施例中，淺溝槽隔離(shallow trench isolation；STI)404可在基板402中形成以在相鄰裝置之間提供隔離。淺溝槽隔離404可由 氧化矽形成。
介電層406可包括以下各者中之一或更多者：氮化矽(SiN)、二氧化矽(SiO2)、氮氧化矽(SiON)或可用以形成非結晶介電層之其他適合材料。
溝槽圖案410可在介電層406上方之遮罩層408中形成。溝槽圖案410可用以形成根據本揭示案之實施例的具有傾角的溝槽。遮罩層408可為光阻劑層或硬遮罩層。遮罩層408可由光阻劑、氧化矽、氮化矽、玻璃上矽(silicon on glass；SOG)、保形碳層及其他適合之材料形成。
在第4B圖中，具有傾角的溝槽412貫穿介電層406而形成，以在具有傾角的溝槽412之底表面414曝露基板402之一部分。底表面414上之結晶基板可充當晶種以用於具有傾角的溝槽412中之磊晶生長。在具有傾角的溝槽412之形成之後可移除遮罩層408。
具有傾角的溝槽412可藉由乾式蝕刻而形成，例如藉由上文中第3A圖或第3B圖中描述之設備及方法而形成。在一個實施例中，蝕刻氣體之電漿或離子束可經導引至基板402以形成具有傾角的溝槽412。蝕刻氣體可包括SF6、C3F8、CF4、BF3、BI3、N2、Ar、PH3、AsH3、B2H6、H2、Xe、Kr、Ne、He、SiH4、SiF4、GeH4、GeF4、CH4、AsF5、PF3、PF5，或上述各者之組合。
根據本揭示案之實施例，具有傾角的溝槽412之深寬比傾角α經設定以使得缺陷延伸至具有傾角的溝槽412之 上部412a。在一個實施例中，傾角α小於
Figure TWI612616BD00004
，其中h是 介電層406之厚度或具有傾角的溝槽412之高度，且w是具有傾角的溝槽412之寬度。在一個實施例中，具有傾角的溝槽412之高度可為約100奈米或更少，且具有傾角的溝槽412之寬度w可在約20奈米至約40奈米之間。具有傾角的溝槽412之傾角α可在約11度至約45度之間。在一個實施例中，具有傾角的溝槽412之傾角α可為約30度。
在第4C圖中，可對基板402執行額外蝕刻以曝露具有更合乎磊晶生長需要之晶面定向之表面。例如，對於矽晶體而言，(111)晶面定向具有更緊密堆積密度，且更易於在其上生長磊晶薄膜。由於最常用矽基板具有(100)晶面定向，因此具有傾角的溝槽412之底表面414最有可能具有(100)晶面定向。如第4C圖所示，V形槽416可經蝕刻至基板402以產生具有(111)晶面定向之表面。V形槽416可藉由任何適合之蝕刻製程形成，如濕式或乾式蝕刻方法或電漿輔助蝕刻方法。
在一個實施例中，晶種層418可在V形槽416上形成。晶種層418可包括具有實現形槽416之優良覆蓋之能力之材料，該V形槽416具有含(111)晶面定向之表面。
在一個實施例中，當第III族-第V族結晶體將在具有傾角的溝槽412中形成時，晶種層418可包括第III族元素或第V族元素中之至少一者。在一個實施例中，第III族元素可包括鎵(Ga)或鋁(Al)，且第V族元素可包括砷(As)。一或更多個第III族或第V族來源材料可用於形成晶種層418。來源材料可為金屬有機前驅物或類似物。示例性第III族及第V族來源材料可包括第三丁基磷、第三丁基砷、三乙基銻、三甲 基銻、三乙基鎵、三甲基鎵、三乙基銦、三甲基銦、氯化銦、磷化銦、氯化鎵、三甲基鋁，或有機磷化合物。晶種層418可藉由任何適合之沉積方法形成，如減壓化學氣相沉積(chemical vapor deposition；CVD)、磊晶沉積，或任何其他適合之沉積方法。
在第4D圖中，結晶材料420在具有傾角的溝槽412中形成，且填充滿該具有傾角的溝槽。結晶材料420可藉由磊晶沉積而形成。在一個實施例中，結晶材料420可包括二元或三元第III族-第V族材料中之一者。在一個實施例中，結晶材料420可包括銦、鎵及砷。
在一個實施例中，結晶材料420之組成在沉積期間可變更。例如，二元或三元第III族-第V族元素之莫耳比率可經設定以在填充具有傾角的溝槽412之初期減少缺陷產生，且經設定以在填充具有傾角的溝槽412之後期提供合乎需要之裝置特性，如改良遷移率。
如第4B圖所示，垂直線424示意地圖示一方向，由晶格失配所產生之缺陷將沿該方向在平行於具有傾角的溝槽412之長度(進入紙內之方向)之平面中傳播。垂直線424與具有傾角的溝槽412之側壁相交，指示缺陷在具有傾角的溝槽412之側壁412b處終止。水平線422指示缺陷可到達之最高位準。換言之，水平線422上方之結晶材料420中可沒有源於晶格失配之缺陷。在一個實施例中，水平線422下方之結晶材料420可包括In0.53Ga0.47As(莫耳比率)以將缺陷降至最低，且水平線422上方之結晶材料420可包括 In0.53Ga0.47As(莫耳比率)以獲得改良遷移率。
可將額外結構增添至裝置400，以使得水平線422上方之結晶材料420充當操作區域。
或者，如第5圖所示，額外結晶材料可由結晶材料420形成，以產生目標裝置之操作範圍。可能在化學機械研磨製程之後，可在介電材料406及結晶材料420上方形成介電材料502。介電材料502可為氧化矽、氮化矽或其他適合之材料。狹窄溝槽504可貫穿介電材料502而形成以在底表面506處曝露結晶材料420之一部分。狹窄溝槽504大體上垂直於具有傾角的溝槽412且與該等溝槽412對準。狹窄溝槽504比具有傾角的溝槽412窄。通道材料508具有與結晶材料420大體上相同之晶格大小，該通道材料508隨後在狹窄溝槽504中由結晶材料420而形成。通道材料508可大體上不含疊積缺層、穿透位錯及其他缺陷。在一個實施例中，介電材料503可具有約60奈米或更少之厚度。狹窄溝槽504可具有約5奈米至約10奈米之間之寬度。
在另一實施例中，如第6A-6B圖所示，可藉由在具有傾角的溝槽412中回蝕結晶材料420而形成通道材料，以形成裝置600。執行化學機械研磨以曝露介電材料406及結晶材料420之平面表面602。與具有傾角的溝槽412之狹窄展寬(stretch)重疊之遮罩604可在平面表面602上方形成。
如第6B圖所示，執行蝕刻製程以在結晶材料420上部形成通道材料608。在一個實施例中，通道材料608可藉由異向性濕式蝕刻形成。例如，可向所曝露之頂表面602提 供異向性濕式蝕刻溶液，如硫酸(H2SO4)與過氧化氫(H2O2)，或檸檬酸(C6H8O7)與過氧化氫(H2O2)。在蝕刻製程之後，通道材料608可在新曝露之平面表面606上方延伸。平面表面606可位於水平線422上方以使得通道材料608由結晶材料420之部分組成，該部分大體上不含由晶格失配產生之缺陷。
第7圖是根據本揭示案之一個實施例的用於異質磊晶生長之方法700的一流程圖。方法700可用以形成包括根據本揭示案之具有傾角的溝槽之裝置。
在步驟710中，非結晶層可在第一結晶材料上方形成。第一結晶材料可為結晶基板或基板上之結晶層。例如，如第2圖所示，非結晶層204形成於結晶材料202之上。在一個實施例中，第一結晶材料可為矽或摻雜矽，且非結晶材料可為介電材料。
在步驟720中，具有傾角的溝槽可貫穿非結晶層而形成，且在具有傾角的溝槽之底部曝露第一結晶材料之一部分。例如，如第2圖所示，具有傾角的溝槽206形成於非結晶層204之中。
具有傾角的溝槽提供自第一結晶材料之曝露部分起的邊界，該等邊界用於諸如磊晶生長之結晶生長。具有傾角的溝槽之傾角經設定以使得缺陷將在具有傾角的溝槽之非結晶傾斜側壁處終止，該等缺陷在晶體生長期間發源於具有傾角的溝槽底部，且沿具有傾角的溝槽之長度平面而傳播。在一個實施例中，具有傾角的溝槽之側壁在第一結晶材料之頂表面上之投影比具有傾角的溝槽之底部的投影長。此外，具 有傾角的溝槽可為具高深寬比之狹窄溝槽，以使得缺陷將在具有傾角的溝槽之側壁處終止，該等缺陷發源於具有傾角的溝槽底部，且沿具有傾角的溝槽之寬度的平面內傳播。
具有傾角的溝槽可由任何適合之蝕刻方法形成。在一個實施例中，具有傾角的溝槽可由具有傾角的離子束藉由修正電漿鞘而形成，如第3A圖所示。在另一實施例中，具有傾角的溝槽可藉由相對於離子束源以一具有傾角的位置定位基板而形成，如第3B圖所示。
在步驟730中，可對具有傾角的溝槽底部執行可選蝕刻，以曝露第一結晶材料中之表面，該表面對結晶生長而言合乎需要。例如，如第4C圖所示，V形槽可在具有傾角的溝槽底部中形成以曝露具有(111)晶面定向之晶體表面。濕式蝕刻方法可用以執行可選蝕刻。
在步驟740中，晶種層可自具有傾角的溝槽之底表面起形成，用於進一步的磊晶生長。晶種層可包括具有實現第一結晶材料之曝露表面的優良覆蓋之能力之材料。
在步驟750中，第二結晶材料可藉由磊晶生長而在具有傾角的溝槽中形成。在一個實施例中，第一結晶材料及第二結晶材料具有不同晶格尺寸，且在形成期間，由於晶格失配，第二結晶材料中可能產生缺陷。如步驟720中所論述，具有傾角的溝槽之側壁經定位以捕獲並終止由晶格失配所引起之缺陷。因此，具有傾角的溝槽之頂部部分附近之第二結晶材料大體上無缺陷，因此在半導體中用作功能結構是合乎需要的，該功能結構如FinFET中之鰭狀物。
視情況，功能結構可藉由額外製程在具有傾角的溝槽中由第二結晶材料而形成，如步驟750所述。在步驟760中，功能結構可藉由蝕刻第二結晶材料或在第二結晶材料上方沉積第三結晶材料而形成。在一個實施例中，功能結構可為垂直鰭狀物或奈米線，該功能結構比具有傾角的溝槽中之第二結晶材料更窄，以便在目標裝置中提供合乎需要的功能。在一個實施例中，第二結晶材料之頂部部分可經回蝕以形成更窄的功能結構，例如第6A-6B圖中所示。在另一實施例中，更窄的垂直溝槽可在第二結晶材料上方形成。第三結晶材料隨後形成於更窄的垂直溝槽中以作為功能結構，例如第5圖中所示。
儘管本揭示案之實施例在上文中結合在FinFET中製造磊晶鰭狀物而進行論述，但本揭示案可用以在任何適合之裝置中形成任何適當之結構。例如，本揭示案之實施例可用以形成奈米線，該線可用於FinFET之後的下一代裝置中。奈米線可藉由使用根據上文論述之實施例利用額外製程進行的具有傾角的深寬比捕捉而形成。
儘管前述內容係針對本揭示案之實施例，但可在不背離本揭示案之基本範疇之前提下設計本揭示案之其他及另外實施例，且本揭示案之範疇由隨附之申請專利範圍決定。
200‧‧‧結構
202‧‧‧結晶材料
202a‧‧‧頂表面
203‧‧‧邊緣
204‧‧‧非結晶層
206‧‧‧溝槽
208‧‧‧外來結晶材料
210‧‧‧側壁
212‧‧‧底部

Claims (12)

  1. 一種包括位錯密度經降低之異質磊晶薄膜的裝置，包括：一第一結晶材料；一非結晶層，在該第一結晶材料上方形成，其中一具有傾角的溝槽貫穿該非結晶層而形成，以使得該第一結晶材料處於該具有傾角的溝槽之一底部；一第二結晶材料，藉由磊晶生長而在該具有傾角的溝槽中形成，其中該第一結晶材料及該第二結晶材料具有失配晶格尺寸，且該具有傾角的溝槽之一側壁在該第一結晶材料之一頂表面上之一投影比該具有傾角的溝槽之該底部長；以及該第二結晶材料之一垂直部分在該具有傾角的溝槽上方延伸，其中該第二結晶材料之該垂直部分具有比該具有傾角的溝槽還要窄的一寬度。
  2. 如請求項1所述之裝置，其中該具有傾角的溝槽之該側壁與該第一結晶材料之該頂表面之間的一傾角小於，h表示該非結晶層之一厚度，且w表示該具有傾角的溝槽沿該第一結晶材料之該頂表面之一寬度。
  3. 如請求項1所述之裝置，其中該垂直部分藉由在磊晶生長之後蝕刻該第二結晶材料而形成。
  4. 如請求項1所述之裝置，其中該第一結晶材料與該第二結晶材料之間的一界面類似於一V形槽之形狀。
  5. 如請求項2所述之裝置，其中該傾角在約11度至約45度之間。
  6. 如請求項2所述之裝置，其中該具有傾角的溝槽之一深寬比h/w經設定以使得缺陷在該具有傾角的溝槽之該等側壁處終止，該等缺陷自該具有傾角的溝槽之該底部產生，且沿平行於該具有傾角的溝槽之該寬度的平面內傳播。
  7. 如請求項2所述之裝置，其中該第一結晶層包括矽或摻雜矽，且該第二結晶材料包括二元或三元材料，該二元或三元材料包括一第III族元素及一第V族元素。
  8. 如請求項5所述之裝置，其中該傾角為約30度。
  9. 如請求項7所述之裝置，其中該第III族元素包括鎵(Ga)、鋁(Al)及銦(In)中之一者，且第V族元素包括氮(N)、磷(P)及砷(As)中之一者。
  10. 如請求項7所述之裝置，其中該非結晶層是一介電材料。
  11. 如請求項7所述之裝置，其中該非結晶層之該厚度h小於約100奈米，且該具有傾角的溝槽之該寬度w為約20奈米至約40奈米之間。
  12. 如請求項10所述之裝置，其中該介電材料包括氮化矽(SiN)、二氧化矽(SiO2)及氮氧化矽(SiON)中之一者。
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