TWI590355B - Wafer testing fixture, wafer dynamic test fixture and wafer testing method - Google Patents

Description

Wafer test fixture, wafer dynamic test fixture, and wafer test method

The invention relates to a test fixture, a dynamic test fixture and a test method, and in particular to a wafer test fixture, a wafer dynamic test fixture and a wafer test method.

The Wafer Level Chip Scale Package (WLCSP) meets the requirements of power consumption, cost, and thinness and shortness of electronic products, especially in the increasingly popular application of Micro Electro Mechanical System (MEMS) components. It will become the main driving force for the growth of the wafer-level packaging industry, thus attracting large investments from wafer fabrication and packaging manufacturers.

The so-called wafer level wafer size package is performed on all or most of the package test procedures directly on the wafer, and then is singulated to form a single component, so there is no need to go through the wire bonding and filling process, and the packaged wafer The size is equal to the original size of the grain. However, traditional wafer-level package test procedures are unable to meet the requirements of MEMS products that require dynamic testing. Therefore, the industry has developed a method of placing the diced wafer on a special long carrier. Place it on a special dynamic test machine for Final Test.

However, the equipment of this dynamic test machine is expensive, and it is necessary to purchase a variety of matching machines, such as a loader, a handler, a tester, and an unloader. In order to organize a production line, and the number of dies that can be carried by the special carrier is too small, and the preparation and setting time before the test is too long. These problems make the current dynamic test method difficult to produce. Ascension, the cost is also difficult to reduce, so the current dynamic test methods are full of bottlenecks in mass production.

The invention provides a wafer test fixture, a wafer dynamic test fixture and a wafer test method, which can perform batch test, effectively improve the efficiency of general wafer test and dynamic test, and reduce the cost of the test.

A wafer test fixture of the present invention includes a carrier tray and a positioning mechanism. The carrier disk is configured to carry a portion of the wafer, wherein a portion of the wafer includes a plurality of wafers and is part of a wafer. The carrier tray includes a positioning groove, a first side, and a second side opposite the first side. The positioning groove is disposed on the first side and is adapted to receive a side edge of the partial wafer. The positioning mechanism is disposed on the second side and configured to clamp a portion of the wafer together with the positioning groove.

In an embodiment of the invention, the positioning mechanism includes one of the elastic pushing members, and the pushing member is disposed on the second side and protrudes from the second side.

In an embodiment of the invention, the pushing member comprises at least one pushing surface, and the partial wafer comprises an arc-shaped side edge adapted to abut against the inclined surface, so that the pushing member is pressed and pushed to the portion. The wafer moves toward the first side to engage with the positioning groove.

In an embodiment of the invention, the at least one of the at least one inclined surface is provided in plurality, and the curved side edge is adapted to abut against one of the inclined surfaces.

In an embodiment of the invention, the positioning mechanism includes a pushing member pivoted on the second side to move between an initial position and a clamping position.

In an embodiment of the invention, the pushing member includes a pivoting end and a pushing end connected to each other, and the pivoting end is elastically pivoted to the second side, and when the pushing member is in the initial position, the pushing The end protrudes from the second side.

In an embodiment of the invention, the partial wafer is adapted to abut against the pushing end, and the pushing end is pushed against the partial wafer to move to the first side to engage with the positioning groove.

In an embodiment of the present invention, the carrier tray includes a carrier substrate and a frame, and the frame frame surrounds an edge of the substrate to define a receiving space together with the carrier substrate, and a portion of the wafer is disposed in the receiving space. Inside.

In an embodiment of the invention, the positioning groove is disposed on the first side of the frame.

In an embodiment of the invention, the positioning mechanism is movably disposed on the second side of the frame.

In an embodiment of the invention, the wafer test fixture further includes at least one baffle disposed on the frame to partially cover an upper surface of the portion of the wafer.

In an embodiment of the invention, the positioning mechanism is a positioning groove.

A wafer dynamic test fixture of the present invention includes a carrier tray and a carrier tape. The carrier disk is configured to carry a portion of the wafer, wherein a portion of the wafer includes a plurality of wafers and is part of a wafer. The carrier tape is disposed on a carrier surface of the carrier tray to fix a portion of the wafer.

In an embodiment of the invention, the material of the carrier tray is selected from a glass or a germanium wafer.

In an embodiment of the invention, the carrier tray further includes a positioning groove disposed on the first side and adapted to receive a side edge of the partial wafer.

A wafer testing method of the present invention includes the following steps. A wafer test fixture is provided, wherein one of the plurality of partial wafers is carried and fixed on the wafer test fixture, and each of the partial wafers comprises a plurality of wafers and is part of a wafer. A wafer test is performed on a portion of the wafers fixed to the wafer test fixture.

In an embodiment of the invention, the wafer testing method further includes: providing a wafer; cutting the wafer into a partial wafer; and fixing one of the partial wafers to the wafer test fixture.

In an embodiment of the invention, the wafer test fixture includes a carrier tray and a positioning mechanism. The carrier tray carries a portion of the wafer, and the positioning mechanism fixes a portion of the wafer to the carrier tray.

In an embodiment of the invention, the step of fixing the partial wafer to the carrier tray further includes: placing a side edge of the partial wafer in a positioning groove of the carrier, wherein the positioning groove is disposed. On a first side of the carrier, the positioning mechanism is disposed on a second side of the carrier relative to the first side; the other side of the portion of the wafer is abutted against the positioning mechanism, so that the positioning mechanism pushes the partial wafer to The positioning grooves collectively hold a portion of the wafer.

In an embodiment of the present invention, the wafer testing method further includes: providing a wafer; disposing and fixing the wafer on a carrier tape, wherein the carrier tape is disposed on a carrier tray; and the fixed wafer and The carrier tape is cut into a plurality of wafer test units, and each wafer test unit includes a part of the wafer and a wafer test fixture, and some of the wafers are carried and fixed on the wafer test fixture.

In an embodiment of the invention, the wafer test fixture includes a carrier tray and a portion of the carrier tape.

In an embodiment of the invention, the wafer testing method further comprises: performing a debonding process on the wafer test fixture after performing wafer testing on a portion of the wafer fixed to the wafer test fixture.

In an embodiment of the invention, the carrier tape comprises an ultraviolet curing film, and the dissolving process comprises irradiating UV light.

In an embodiment of the invention, the wafer test described above includes a dynamic wafer test.

In an embodiment of the invention, the wafer comprises a Micro Electro Mechanical System (MEMS) wafer.

Based on the above, the present invention utilizes a wafer test fixture to carry a portion of the wafer so that a portion of the wafer can be easily fixed to the carrier of the wafer test fixture through the positioning mechanism. In this way, the wafer testing method of the present invention can load a part of the wafer into a dimensionally compatible wafer testing machine through the wafer testing fixture to simultaneously perform wafer testing on a plurality of wafers of a part of the wafer. Therefore, the present invention can significantly reduce the cost of wafer testing without the need to purchase additional expensive special carriers and machines that are compatible with the wafer testing machine. In addition, the wafer test method and the wafer test fixture of the present invention can also greatly save the preparation before testing, compared with the conventional method of placing the diced wafers on a special carrier and testing them one by one. And set the time, which in turn increases the efficiency of wafer testing.

The above described features and advantages of the invention will be apparent from the following description.

1 is a schematic diagram of a wafer in accordance with an embodiment of the present invention. 2 is a schematic diagram of a wafer test fixture carrying a portion of a wafer in accordance with an embodiment of the invention. Referring to FIG. 1 and FIG. 2 simultaneously, in the embodiment, the wafer test fixture 100 is adapted to carry a portion of the wafer 210 to load the wafer test fixture 100 together with a portion of the wafer 210 thereon. A round test machine is used to perform wafer testing on a portion of the wafer 210 described above. In detail, a part of the wafer 210 may include a plurality of wafers as shown in FIG. 1 , and a part of the wafers 210 is a part of the wafers 200 , which is obtained by cutting the wafers 200 , for example, the specific steps may be, for example, The wafer 200 is provided, and then the wafer 200 is diced into a plurality of partial wafers 210 as shown in FIG. 1, and then one of the partial wafers 210 is fixed to the wafer test fixture 100 as shown in FIG. on.

It should be noted that the partial wafer 210 shown in FIG. 1 is obtained by performing quarter-cutting of the wafer 200, that is, the partial wafer 210 is one of four quarters of the wafer 200, but The invention is not limited to this. In other embodiments, the partial wafer 210 may also be one of any other halving of the wafer 200, such as halving, octave, etc., as long as the partial wafer 210 is part of the wafer 200, and It suffices to include at least two or more wafers.

Accordingly, the wafer testing method of the present embodiment may include the following steps: First, the wafer testing fixture 100 shown in FIG. 2 is provided, wherein the wafer testing fixture 100 carries and fixes a plurality of partial wafers 210. One of the plurality of wafers 210 includes a plurality of wafers and is part of the wafer 200. Next, wafer testing is performed on a portion of the wafer 210 fixed to the wafer test fixture 100. For example, the wafer 200 may include a Micro Electro Mechanical System (MEMS) wafer, such as an accelerometer, a MEMS microphone, a magnetometer, or a gyroscope, and the aforementioned wafer test may include dynamic wafer testing. . Of course, the present invention is not limited thereto. In other embodiments, the wafer test can also be a general wafer test or a wafer mover in any wafer test process, and the wafer test of the embodiment can be utilized. Fixture 100 carries a portion of wafer 210 for wafer testing. The wafer test fixture 100 applied to the wafer test method described above may include a variety of different aspects, and several of them will be described in detail below.

3 is a schematic exploded view of a wafer test fixture according to an embodiment of the invention. 4 is a schematic view showing the assembly of the wafer test fixture of FIG. 3. FIG. 5 is a schematic diagram of the wafer test fixture carrying portion of the wafer of FIG. 4. FIG. Referring to FIG. 3 to FIG. 5 simultaneously, in the embodiment, the wafer test fixture 100a includes a carrier tray 110 and a positioning mechanism 120. The carrier disk 100 is configured to carry the aforementioned partial wafer 210. The carrier tray 110 includes a positioning groove 112, a first side S1 and a second side S2 opposite to the first side S1. The positioning groove 112 is disposed on the first side S1 and is adapted to receive a side edge of the partial wafer 210. The positioning mechanism 120 is disposed on the second side S2 and configured to clamp a portion of the wafer 210 together with the positioning groove 112. In this embodiment, the carrier 110 can be a rectangular carrier. Of course, the invention is not limited thereto, as long as the size of the carrier 110 is compatible with the specific size required for the wafer testing machine.

In such a configuration, after the wafer 200 is diced into a plurality of partial wafers 210, a portion of the wafers 210 can be easily fixed to the carrier 110 of the wafer test fixture 100 through the positioning mechanism 120. In this manner, the present embodiment can load a portion of the wafer 210 into the size-matched wafer testing machine through the wafer test fixture 100 to simultaneously perform wafer testing on a plurality of wafers, such as a general wafer test or wafer. Level dynamic terminal testing, etc. In this way, the embodiment does not require additional purchase of a special carrier and a machine that cooperate with the wafer testing machine, which can greatly reduce the cost of testing. Moreover, compared with the conventional method of placing the diced wafers on a special carrier and testing them, the present embodiment can greatly save the preparation and setting time before the test, and can increase the efficiency of the wafer test.

In detail, in this embodiment, the carrier tray 110 can include a carrying bottom plate 114 and a frame 116, wherein the frame 116 surrounds the edge of the bottom plate 114 to define an accommodating space together with the carrying bottom plate 114. The above partial wafer is disposed in the accommodating space. In this embodiment, the wafer test fixture 100a further includes at least one baffle 130 disposed on the first side S1 of the frame 116 to form a positioning groove 112 together with the carrier substrate 114. Of course, this embodiment is for illustrative purposes only, and the present invention does not limit the form and formation means of the positioning groove 112. In other embodiments, the positioning trenches 112 may also be formed directly on the frame of the frame 116. In a broad sense, as long as at least one side of the portion of the wafer 210 is fixed to the framed edge of the carrier substrate 114. The design, even if its appearance is concave, convex from the second side S2 or coplanar with the second side, can be considered as an equivalent technique for positioning the groove 112. The number of the baffles 130 may be plural. Specifically, the number of the baffles 130 may be, for example, two, which are respectively disposed on the first side S1 and the second side S2, respectively, and may be disposed in a separate component to the frame. 116 is either directly formed in the frame 116. The arrangement in the drawings is for illustrative purposes only and is not intended to limit the implementation of the present invention. In summary, the baffle 130 is used to partially cover the upper surface of the portion of the wafer 210a to further prevent the partial wafer 210a from falling from the wafer test fixture 100a, and also to limit the positioning mechanism 120 to the second side S2. Operate according to the scheduled path. It should be noted that the baffle 130 in FIGS. 4 and 5 is shown by a broken line in order to more clearly show the structure under the baffle 130. In the present embodiment, the positioning mechanism 120 may include one of the elastic pushing members 124, wherein the pushing member 124 is disposed on the second side S2 and protrudes from the second side S2.

Further, the carrier 110 of the present embodiment can be used, for example, to carry a portion of the wafer 210a of the edge region of the wafer 200 as shown in FIG. 2, which includes an arcuate side edge, and the pushing member 124 can include a corresponding At least one of the curved side edges pushes against the slopes 124a, 124b. As such, when the user wants to place part of the wafer 210 on the wafer test fixture 100a, the side edge of the partial wafer 210a may be first disposed in the positioning groove 112, and then the curved side of the other side may be disposed. The edge abuts against the inclined surfaces 124a and 124b, so that the pushing member 124 is pressed to generate an elastic restoring force, and the elastic restoring force is pushed to the partial wafer 210a to move to the first side S1 to be located on the first side S1. The positioning groove 112 is engaged, and the positioning mechanism 120 can clamp a part of the wafer 210a together with the positioning groove 112. It should be noted that the present embodiment is for illustrative purposes only, and the present invention does not limit the manner in which a portion of the wafer 210a is disposed on the wafer test fixture 100a. In other embodiments, the user may first push the one side edge of the partial wafer 210a against the pushing member 124 of the positioning mechanism 120, and then set the other side edge of the partial wafer 210a in the positioning groove 112. The portion of the wafer 210a is pushed to the first side S1 by the elastic restoring force of the pushing member 124 to be engaged with the positioning groove 112 at the first side S1.

In this embodiment, the number of the pushing slopes 124a, 124b of the pushing member 124 may be plural (illustrated as two), so that regardless of the direction in which the partial wafers 210a are disposed (the curved side edges are upward or Downwardly, the curved side edges can abut against one of the inclined surfaces 124a, 124b, thereby increasing the flexibility and convenience of the partial wafer 210a disposed on the wafer test fixture 100a. Certainly, the embodiment is only used for exemplification. The carrier 110 of the embodiment can be used to carry any part of the wafer 210, and is not limited to a part of the wafer 210a of the edge region of the wafer 200.

Since the partial wafer 210a is first engaged with the positioning groove 112 of the first side, and then the partial wafer 210a is clamped together with the positioning groove 112 by the pushing of the positioning mechanism 120, the position of the partial wafer 210a is set. The first side S1 is used as a positioning reference. In addition, the wafer test fixture 100a of the present embodiment may further include a positioning mark 140 disposed on the carrier tray 110 for use in aligning the machine.

6 is a schematic exploded view of a wafer test fixture in accordance with another embodiment of the present invention. 7 is a schematic view showing the assembly of the wafer test fixture of FIG. 6. 8 is a schematic diagram of the wafer test fixture carrying portion of the wafer of FIG. It should be noted that the wafer test fixture 100b of the present embodiment is similar to the wafer test fixture 100a of FIGS. 3 to 5, and therefore, this embodiment uses the component numbers and parts of the foregoing embodiments, wherein The same reference numerals are used to denote the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted part, reference may be made to the foregoing embodiment, and the description is not repeated herein. Referring to FIG. 6 and FIG. 8, the difference between the wafer test fixture 100b of the present embodiment and the wafer test fixture 100a of FIGS. 3 to 5 will be described below. It should be noted that the baffle 130 in FIGS. 7 and 8 is shown by a broken line to more clearly show the structure under the baffle 130.

In this embodiment, the positioning mechanism 120 includes an elastic pushing member pivotally disposed on the second side S2 to move to an initial position as shown in FIG. 7 and a clamping position as shown in FIG. between. The pushing member includes a pivoting end 126 and a pushing end 128 connected to each other, wherein the pivoting end 126 is elastically pivoted to the second side S2 to drive the pushing end 128 to be repositionably moved to the initial position and clamped Between locations. And, when the pushing member is in the initial position, the pushing end 128 protrudes from the second side S2. In this way, when the user wants to set part of the wafer 210b on the wafer test fixture 100b, the side edge of the partial wafer 210b can be first disposed in the positioning groove 112, and the side of the other side can be connected. The edge abuts against the pushing end 128 of the second side S2, and pushes the pushing end 128 to the first side S1 toward the first side S1 by the elastic restoring force of the pushing member to the first side S1 The movement is engaged with the positioning groove 112 located on the first side S1, and the positioning mechanism 120 can clamp the partial wafer 210b together with the positioning groove 112. Of course, this embodiment is for illustrative purposes only, and the present invention does not limit the manner in which part of the wafer 210b is disposed on the wafer test fixture 100b. In other embodiments, the user may first push the one side edge of the partial wafer 210b against the positioning mechanism 120, and then set the other side edge of the partial wafer 210b in the positioning groove 112, and pass through the pushing member. The elastic restoring force pushes the partial wafer 210b to move toward the first side S1 to engage with the positioning groove 112 located at the first side S1.

It should be noted that the wafer test fixture 100b of the present embodiment can be used, for example, to carry a portion of the wafer 210b of the intermediate portion of the wafer 200 as shown in FIG. 2, which has a portion of the wafer 210a compared to the edge region. More straight side edges, and less obvious directionality. Of course, this embodiment is only used for exemplification. The carrier 110 of the present embodiment can be used to carry any part of the wafer 210, and is not limited to the partial wafer 210b of the intermediate portion of the wafer 200.

9 is a schematic diagram of a wafer test fixture carrying a portion of a wafer in accordance with another embodiment of the present invention. It should be noted that the wafer test fixture 100c of the present embodiment is similar to the wafer test fixture 100a of FIGS. 3 to 5, and therefore, this embodiment uses the component numbers and parts of the foregoing embodiments, wherein The same reference numerals are used to denote the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted part, reference may be made to the foregoing embodiment, and the description is not repeated herein. Referring to FIG. 9, the difference between the wafer test fixture 100c of the present embodiment and the wafer test fixture 100a of FIGS. 3 to 5 will be described below. It should be noted that the baffle 130 in FIG. 9 is shown in dashed lines to more clearly show the structure under the baffle 130.

In this embodiment, the positioning mechanism 120 is a positioning groove, and the structure thereof can be similar to the positioning groove 112 of the first side S1, and a positioning groove is formed on the second side S2 by using a baffle 130. That is, the wafer test fixture 100c uses the positioning grooves 112 on the first side S1 and the positioning grooves on the second side S2 to collectively clamp the opposite side edges of the partial wafer 210 to partially crystallize The circle 210 is fixed to the wafer test fixture 100c. It should be noted that the above embodiments are for illustrative purposes only, and the present invention does not limit the actual structural aspect of the positioning mechanism 120 as long as the wafer test fixture 100 can be used to carry a portion of the wafer 210 and utilize the positioning mechanism 120. The mounting of the partial wafer 210 on the wafer test fixture 100 is within the scope of the present invention.

10 and FIG. 11 are schematic diagrams showing the flow of a wafer dynamic test fixture carrying a portion of a wafer according to another embodiment of the present invention. FIG. 12 is a schematic diagram of a wafer dynamic test fixture carrying portion wafer according to another embodiment of the present invention. The wafer test method may be performed by cutting the wafer 200 into a plurality of partial wafers 210 and then placing a portion of the wafers 210 on the wafer test fixture 100, as shown in FIG. A wafer 200 is provided, and the wafer 200 is disposed and fixed on a carrier tape 310 on a carrier 320, and the fixed wafer 200 and the carrier tape 310 are cut to form a plurality of layers as shown in FIG. Wafer test unit 10, after which wafer test is performed on wafer test unit 10.

In detail, each of the wafer measuring units 10 includes a partial wafer 210 and a wafer test fixture 300 as shown in FIG. 11 , wherein a portion of the wafer 210 is carried and fixed on the wafer test fixture 300 . It should be noted that the wafer test performed in this embodiment may be a dynamic test of the wafer. Therefore, the wafer test fixture 300 of the embodiment may also be a wafer dynamic test fixture 300. In detail, the wafer dynamic test fixture 300 may include a carrier tape 310 and a carrier tray 320 configured to carry the above-mentioned partial wafer 210, which may be made of glass, germanium wafer or the like. The carrier tape 310 is disposed on the surface of the carrier tray 320 to fix a portion of the wafer 210 by utilizing its adhesiveness. More specifically, since the wafer test fixture 300 is cut by the carrier tray 320 and the carrier tape 310 shown in FIG. 10, the carrier tray 320 of the wafer test fixture 300 is actually the carrier tray 320 before cutting. A portion of the carrier tape 310 of the wafer test fixture 300 is actually part of the carrier tape 310 prior to cutting. In addition, referring to FIG. 12 , the carrier 320 further includes a positioning trench 322 disposed on the first side S1 of the wafer test fixture 300 for accommodating the side edge of the portion of the wafer 210 to assist the partial crystal. The circle 210 is positioned to further fix a portion of the wafer 210 on the carrier tray 320. Of course, in other embodiments, the positioning trenches 322 can also be disposed on opposite sides of the carrier 320 as shown in FIG. 12 to fix a portion of the wafer 210 on the carrier 320 by using the positioning trenches 322 on both sides. And positioning with the carrying tape 310.

Under such a structural configuration, the wafer testing method of the present embodiment can perform a debonding process on the wafer testing fixture 300 after performing wafer testing on a portion of the wafer 210. In this embodiment, the carrier tape 310 may be an ultraviolet curing film. Thus, the dissolving process may include irradiating the carrier tape 310 with UV light to greatly reduce the viscosity of the carrier tape 310, so that a portion of the wafer is partially removed. 210 can be easily detached from the wafer test fixture 300. In this embodiment, the appearance of the carrier 320 is exemplified by a rectangle. Of course, the invention is not limited thereto, as long as the size of the carrier 320 is compatible with the specific size required for the wafer testing machine.

In summary, the wafer testing method of the present invention utilizes a wafer test fixture to carry a portion of the wafer, so that part of the wafer can be easily fixed to the carrier of the wafer test fixture through the positioning mechanism, to partially The wafer is wafer tested. In other words, the present invention can load a part of the wafer into a dimensionally compatible wafer testing machine through a wafer test fixture to simultaneously perform wafer testing on a plurality of wafers of a part of the wafer, for example, a general crystal. Round test or wafer level dynamic terminal test. In this way, the invention does not require the purchase of expensive special carriers and machines that are compatible with the wafer testing machine, thereby greatly reducing the cost of wafer testing. Moreover, compared with the conventional method of placing the diced wafers on a special carrier, the wafer test method and the wafer test fixture of the present invention can greatly save the preparation and set time before the test, and can further increase the crystal. The efficiency of the round test.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

10‧‧‧ Wafer Test Unit

100, 100a, 100b, 100c, 300‧‧‧ wafer test fixtures

110‧‧‧Loading tray

112‧‧‧ Positioning groove

114‧‧‧ carrying base plate

116‧‧‧Frame

124‧‧‧Parts

124a, 124b‧‧‧ pushed to the slope

126‧‧‧ pivot end

128‧‧‧Pushing end

130‧‧ ‧ baffle

140‧‧‧ Positioning Mark

200‧‧‧ wafer

210, 210a, 210b‧‧‧ part of the wafer

310‧‧‧ Carrying tape

320‧‧‧ Carrying tray

322‧‧‧Positioning groove

S1‧‧‧ first side

S2‧‧‧ second side

1 is a schematic diagram of a wafer in accordance with an embodiment of the present invention. 2 is a schematic diagram of a wafer test fixture carrying a portion of a wafer in accordance with an embodiment of the invention. 3 is a schematic exploded view of a wafer test fixture according to an embodiment of the invention. 4 is a schematic view showing the assembly of the wafer test fixture of FIG. 3. FIG. 5 is a schematic diagram of the wafer test fixture carrying portion of the wafer of FIG. 4. FIG. 6 is a schematic exploded view of a wafer test fixture in accordance with another embodiment of the present invention. 7 is a schematic view showing the assembly of the wafer test fixture of FIG. 6. 8 is a schematic diagram of the wafer test fixture carrying portion of the wafer of FIG. 9 is a schematic diagram of a wafer test fixture carrying a portion of a wafer in accordance with another embodiment of the present invention. 10 and FIG. 11 are schematic diagrams showing the flow of a wafer dynamic test fixture carrying a portion of a wafer according to another embodiment of the present invention. FIG. 12 is a schematic diagram of a wafer dynamic test fixture carrying portion wafer according to another embodiment of the present invention.

100, 100a, 100b‧‧‧ wafer test fixture

210, 210a, 210b‧‧‧ part of the wafer

Claims (24)

A wafer test fixture includes: a carrier tray configured to carry a portion of a wafer, wherein the portion of the wafer includes a plurality of wafers and is part of a wafer, the carrier tray includes a positioning trench, a first a positioning groove is disposed on the first side and is disposed to receive a side edge of the portion of the wafer; and a positioning mechanism is disposed on the second side, and a second side opposite to the first side The portion of the wafer is clamped together with the positioning groove. The wafer test fixture of claim 1, wherein the positioning mechanism comprises a resilient pushing member disposed on the second side and protruding from the second side. The wafer test fixture of claim 2, wherein the pushing member comprises at least one pushing slope, the partial wafer comprising an arcuate side edge adapted to abut the pushing slope, so that The pushing member is pressed to push the portion of the wafer to move to the first side to engage with the positioning groove. The wafer test fixture of claim 3, wherein the at least one of the plurality of slanting faces is plural, and the curved side edges are adapted to abut one of the push slanting faces. The wafer test fixture of claim 1, wherein the positioning mechanism comprises a resilient pushing member disposed on the second side to move between an initial position and a clamping position. The wafer test fixture of claim 5, wherein the pushing member comprises a pivoting end connected to each other and a pushing end, the pivoting end connecting the second side, when the pushing part In the initial position, the pushing end protrudes from the second side. The wafer test fixture of claim 6, wherein the portion of the wafer is adapted to abut against the pushing end, and the pushing end is pushed against the portion of the wafer to move to the first side to Position the groove to engage. The wafer test fixture of claim 1, wherein the carrier tray comprises a carrier substrate and a frame, the frame surrounding an edge of the carrier substrate to define an accommodation together with the carrier substrate The portion of the wafer is disposed in the accommodating space. The wafer test fixture of claim 8, wherein the positioning mechanism is movably disposed on the second side of the frame. The wafer test fixture of claim 1, further comprising at least one baffle disposed on the frame to partially cover an upper surface of the portion of the wafer. The wafer test fixture of claim 1, wherein the positioning mechanism is a positioning groove. A wafer dynamic test fixture includes: a carrier tray configured to carry a portion of a wafer, wherein the portion of the wafer includes a plurality of wafers and is part of a wafer, and the carrier tray includes a positioning trench, a first side and a second side opposite to the first side, the positioning groove is disposed on the first side and is adapted to receive a side edge of the partial wafer; A carrier tape is disposed on a carrier surface of the carrier tray to fix the portion of the wafer. The wafer dynamic test fixture of claim 12, wherein the carrier material is selected from a glass or a germanium wafer. The wafer dynamic test fixture of claim 12, wherein the carrier tray further comprises another positioning groove, the another positioning groove is disposed on the second side, and is adapted to receive the partial crystal The other side of the circle. A wafer testing method includes: providing a wafer test fixture, wherein the wafer test fixture carries and fixes one of a plurality of partial wafers, each of the wafers comprising a plurality of wafers and being a crystal a portion of the circle; and performing a wafer test on the portion of the wafer that is attached to the wafer test fixture. The wafer testing method of claim 15, further comprising: providing the wafer; cutting the wafer into the partial wafers; and fixing one of the partial wafers to the crystal Round test fixture. The wafer test method of claim 15, wherein the wafer test fixture comprises a carrier tray and a positioning mechanism, the carrier tray carries the portion of the wafer, and the positioning mechanism fixes the portion of the wafer On the carrier tray. The wafer testing method of claim 17, wherein the step of fixing the partial wafer to the carrier tray further comprises: One side of the portion of the wafer is disposed in a positioning groove of the carrier, wherein the positioning groove is disposed on a first side of the carrier, and the positioning mechanism is disposed on the first side of the carrier And a second side of the portion of the wafer; and the other side edge of the portion of the wafer abuts the positioning mechanism, the positioning mechanism is pushed against the portion of the wafer to clamp the portion of the wafer together with the positioning groove. The wafer testing method of claim 15, further comprising: providing the wafer; and disposing and fixing the wafer on a carrier tape, wherein the carrier tape is disposed on a carrier tray; The wafer and the carrier tape are cut into a plurality of wafer test units, and each of the wafer measurement units includes the partial wafer and the wafer test fixture, and the portion of the wafer is carried and fixed on the wafer test fixture. The wafer testing method of claim 19, wherein the wafer test fixture comprises a portion of the carrier tray and a portion of the carrier tape. The wafer testing method as described in claim 19, further comprising: after performing the wafer testing on the portion of the wafer fixed to the wafer test fixture, performing a solution on the wafer test fixture Glue process. The wafer testing method of claim 21, wherein the carrier tape comprises an ultraviolet curing film, and the dissolving process comprises irradiating UV light. The wafer test method of claim 15, wherein the wafer test comprises a dynamic wafer test. The wafer testing method of claim 15, wherein the wafer comprises a Micro Electro Mechanical System (MEMS) wafer.