TWI516777B - Chip testing method - Google Patents

Description

Grain test method

The present invention relates to a grain test method, and more particularly to a die test method capable of testing a non-complete wafer state.

In the wafer production and manufacturing process, when the wafer is shipped and the problem is discovered and returned by the customer (referred to as customer return), the customer usually returns all the grains in a single die or a die carrier. At this time, since the wafer related to the wafer has been cut, it can only be confirmed for the IC Failure mode of the single die, and cannot be retested for a large number of returned wafers. In addition, when the wafer of any product (Wafer) is cut (Die Saw) or not completely cut, if the circuit probe test abnormality occurs, the state of the complete wafer cannot be traced back to the wafer inspection machine. (Prober) re-tested, the entire wafer can only be disposed of. Products that are not shipped in a die can be wafer tested after the final package is completed to differentiate the grain. Since the cost of the package usually accounts for more than 30% of the single wafer, if the product is found to have a low yield after the completion of the package, the cost of the product will be greatly increased.

In the prior art, when the wafer is thrown away and needs to be tested to find the cause of the failure, one method is to manually place the single die to be tested on an uncut complete wafer. The wafer inspection machine was retested. As shown in FIG. 1, the method divides the middle portion of an uncut complete wafer 10 to form a notch 12, and the single die 14 to be tested and the wafer 10 The other dies 16 are aligned to fool the wafer inspection machine from performing wafer testing. However, it takes about 30 minutes to set up a die, so this method is very time consuming and labor intensive. Another method (such as the Republic of China Patent No. M358303) uses a piece of iron with long holes to set the die. By sliding the iron piece, the different sizes of the die are fixed to the long hole side edge and the horizontal and vertical positioning ribs by clamps. In order to facilitate the wafer detector to perform one-by-one detection, it can be used to test a large number of grains. However, if the sizes of the wafers are inconsistent, it is necessary to design different jigs, and this method is not effective for a driver IC having a large aspect ratio. In addition, as shown in FIG. 2, the small squares represent a die, and the conventional wafer inspection machine can only perform a block-level adjustment on the wafer as in the area 200 in FIG. 2, or Performing the Row-level adjustment of the area 202 in Figure 2 cannot be calibrated for a single die, so it is only suitable for testing Wafer-Level Chip Scale Packaging (WLCSP) or Wafers such as Quad Flat No-Lead Packaging (QFN Packaging).

Therefore, how to perform rapid testing on a cut non-complete wafer or a single wafer, and is not limited to the size of the wafer, is one of the important topics in the field.

One of the objects of the present invention is to provide a die test method capable of testing a cut non-complete wafer and a single die without being limited to the size and arrangement of the die, so as to be fast and effective. Find out the cause of the failure of the customer to retreat the wafer, and then adjust the specifications for the problem.

The present invention discloses a die test method for testing a plurality of dies of a wafer. The die test method includes placing the plurality of dies on a chip tray (Phip Tray); picking the plurality of dies from the carrier tray to a wafer frame by a pick and placer (Place and Pick) (Wafer Frame); verifying the plurality of crystal grains through a wafer inspection machine (Prober) to generate a verification result; and, according to the verification result, partially crystallizing the plurality of crystal grains The grain is picked into the carrier tray.

10‧‧‧ wafer

12‧‧‧ notch

14, 16, 402, 502, 602‧‧ ‧ grains

200, 202‧‧‧ area

30‧‧‧Process

300~310‧‧‧Steps

40‧‧‧Device under test

400‧‧‧ Wafer Frame

4002‧‧‧Frame

4004‧‧‧ Tape

500, 600‧‧‧ carrier tray

6002‧‧‧ Carrying ring

6004‧‧‧Adhesive tape

θ ₁ , θ ₂ , θ ₃ ‧‧‧ angle

Figure 1 is a schematic diagram of a wafer and die to be tested using a conventional die test method.

Figure 2 is a schematic diagram of the area range of each test of a conventional wafer inspection machine.

FIG. 3 is a schematic diagram of a die test flow according to an embodiment of the present invention.

Figure 4 is a schematic illustration of one of the components to be tested using the die test procedure of the present invention.

FIG. 5 is a schematic diagram of a carrier disk and a plurality of crystal grains thereof according to an embodiment of the present invention.

FIG. 6 is a schematic diagram of a carrier disk and a plurality of crystal grains thereof according to an embodiment of the present invention.

Figure 7 is a graphical representation of the Theta angular offset for each die.

Please refer to FIG. 3 , which is a schematic diagram of a die test flow 30 according to an embodiment of the present invention. The die test flow 30 is used to test a plurality of dies of a wafer, particularly for wafers or single dies of non-complete wafer states. The die test flow 30 can be applied to die of various sizes, so that a good test result can be obtained for a flat panel display driver (LCD Driver IC) having an aspect ratio of more than 10. In addition, the die test flow 30 can be tested before or after the wafer is shipped. The die test flow 30 includes the following steps: Step 300: Start.

Step 302: Place the plurality of dies on a carrier tray (Chip Tray).

Step 304: Picking the plurality of dies from the carrier to a Wafer Frame by a pick and place.

Step 306: Perform verification operations on the plurality of dies through a wafer detector (Prober) to generate a verification result.

Step 308: According to the verification result, select a part of the plurality of crystal grains to In the carrier tray.

Step 310: End.

According to the die test procedure 30, the die placed on the carrier disk is first picked up by the picker from the carrier tray to the wafer frame. The normal mode of operation of the general picker is to pick the die in the wafer frame into the carrier. In the die test flow 30, the picker needs to perform a reverse picking operation mode in which the die placed on the carrier tray is picked up by the carrier tray into the wafer frame. Please refer to FIG. 4, which is a schematic diagram of an element 40 to be tested using the die test flow 30 of the present invention. After the picking of step 304 is completed, the plurality of dies on the wafer frame are the components 40 to be tested of the wafer detector. The device under test 40 includes a wafer frame 400 and a plurality of crystal grains 402. The wafer frame 400 includes a frame 4002 and a tape 4004. The tape 4004 is attached to the frame 4002. The back surface of the plurality of die 402 is disposed on the tape 4004, so that the probe card detects the die 402. The die 402 does not slip. Then, using the wafer inspection machine, the plurality of crystal grains 402 disposed in the wafer frame 400 are tested and verified one by one to generate a verification result. The verification result may be an electronic file having a form type, but is additionally stored in the electronic device, but is not limited thereto. The verification results can also be input to the picker to pick the appropriate die (such as the die of the Pass Die) and pick it into the carrier according to the verification result. As shown in FIG. 5, FIG. 5 is a carrier disk 500 and a good die 502 thereof in the embodiment of the present invention, which can be used for shipment.

In general, after wafer production is completed, the wafer backing, cutting, picking, and placement of the die carrier tray are required to deliver the wafer product to the customer. Conventional wafer inspection and wafer testing processes can only test unpolished and uncut or ground but uncut wafers. In contrast, the die test flow 30 of the embodiment of the present invention may be directed to a wafer that has been cut but not cut, a wafer that has been cut but not picked, and that has been cut and has been picked to the grain carrier. The die of the disk (ie, a wafer or a single die in a non-complete wafer state) is tested and verified. For a wafer that has been cut but not cut, the wafer can be cut to separate a plurality of grains, and then A plurality of dies are placed on the carrier, and then connected to step 304 to complete the die test process 30, thereby achieving the purpose of testing the die-back wafer using the wafer inspection machine. The die test procedure 30 can be performed directly on wafers that have been cut but not picked. The die test procedure 30 can also be performed directly on the die that has been cut and picked to the die carrier. Therefore, the present invention is not limited to the state of the wafer, and the cause of the failure of the guest wafer can be quickly and efficiently found.

It should be noted that the present invention places the die on the carrier, and in the reverse picking step, the die is placed in the bezel to pass the test of the wafer inspection machine and pick out the plurality of crystal grains. . Those skilled in the art will be able to make various modifications, and are not limited thereto. For example, after finding a good product and picking it to the carrier tray, the carrier disk can be passed through an automated optical inspection (AOI) machine to check whether the die in the carrier disk meets a shipping specification. To further check the quality of the product.

The carrier tray used to carry the die in step 302 may be a carrier disk generally formed of plastic, but is not limited thereto. For example, as shown in FIG. 6, FIG. 6 is a schematic diagram of a carrier disk 600 and a plurality of die 602 thereof according to an embodiment of the present invention. The carrier tray 600 is composed of a carrier ring 6002 and a carrier tape 6004. The adhesive tape 6004 is disposed at the center of the carrier ring 6002 for fixing and carrying the cut plurality of crystal grains 602.

In addition, since the wafer picker is performing reverse picking operations, the accuracy of the instrument is limited, and the crystal grains picked up in the wafer frame may be arranged irregularly. Therefore, the present invention can correct the Theta angular offset (such as the angles θ ₁ , θ ₂ , θ _{3 of} FIG. 7 ) for each crystal grain by means of a soft body to generate a correction result. Then, the calibration result is fed back to the verification module of the wafer inspection machine to adjust the position and angle of the image, positioning rib, probe card, etc. of the die in the wafer inspection machine according to the calibration result. Accurate grain verification results.

In summary, the die test process of the present invention can test the cut non-complete wafer and a single die without being limited to the size and arrangement of the die, even if the aspect ratio is greater than 10. The flat panel driver IC (LCD Driver IC) can also effectively use the die test process for testing and verification. Therefore, when the wafer is retired and needs to be tested to find the cause of the failure, the cause of the failure of the customer rewinding wafer can be quickly and effectively found according to the flow and embodiment of the present invention, and the failure problem can be repaired, which can be greatly reduced. Manpower, material resources and time, no need to scrap wafers, re-production of wafers, it can help improve the competitiveness of products.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

30‧‧‧Process

300~310‧‧‧Steps

Claims (10)

A die test method includes: placing a plurality of cut and separated dies on a chip tray; and using the plurality of dies by a pick and place machine (Place and Pick) Picking up to a Wafer Frame; verifying the plurality of dies through a wafer inspection machine (Prober) to generate a verification result; and, according to the verification result, the plurality of dies A portion of the die is picked into the carrier tray. The die test method of claim 1, wherein the step of picking a portion of the plurality of dies into the carrier according to the verification result comprises: displaying the verification result as a good (Pass Die) The die is picked up into the carrier. The die test method of claim 1, further comprising: checking whether the portion of the die in the carrier disk conforms to a shipping specification through an automated optical inspection (AOI) machine. The die test method of claim 1, wherein the plurality of crystal grains are produced by re-cutting and separating from a cut wafer. The die test method of claim 1, wherein the wafer frame comprises a frame and a blue tape, the tape is attached to the frame, and the back surface of the plurality of crystal grains is attached to the tape. The die test method of claim 1, wherein the plurality of crystal grains have an aspect ratio greater than 10. The die test method of claim 1, wherein the plurality of dies are a plurality of flat panel display driver chips (LCD Driver ICs). The die test method of claim 1, wherein the plurality of dies are not aligned on the wafer frame. The die test method of claim 1, wherein the carrier disk comprises a carrier ring and a viscous tape disposed at a center of the carrier ring for fixing and carrying the cut number Grains. The die test method of claim 1, further comprising: correcting an angular offset of each of the plurality of crystal grains by a software manner to generate a calibration result; and obtaining a calibration result according to the calibration result , verifying the plurality of crystal grains.