TWI583619B - 半導體結構及其製造方法 - Google Patents
半導體結構及其製造方法 Download PDFInfo
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- TWI583619B TWI583619B TW104132458A TW104132458A TWI583619B TW I583619 B TWI583619 B TW I583619B TW 104132458 A TW104132458 A TW 104132458A TW 104132458 A TW104132458 A TW 104132458A TW I583619 B TWI583619 B TW I583619B
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- Prior art keywords
- nanowire
- sacrificial
- substrate
- semiconductor structure
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- 238000000034 method Methods 0.000 title claims description 96
- 239000004065 semiconductor Substances 0.000 title claims description 73
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- 238000010586 diagram Methods 0.000 description 6
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- 229910000422 cerium(IV) oxide Inorganic materials 0.000 description 5
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- 229910052731 fluorine Inorganic materials 0.000 description 3
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- 230000015572 biosynthetic process Effects 0.000 description 2
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- 229910052785 arsenic Inorganic materials 0.000 description 1
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- SHHIADHOJKLUIZ-UHFFFAOYSA-N azane;molecular hydrogen Chemical compound N.[H][H] SHHIADHOJKLUIZ-UHFFFAOYSA-N 0.000 description 1
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- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
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- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
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- 238000001039 wet etching Methods 0.000 description 1
Classifications
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Description
本揭露係有關於一種積體電路裝置及其製造方法,且特別是指一種具有奈米線的半導體裝置及其製造方法。
半導體裝置,例如:環繞式閘極(GAA)電晶體,在半導體工業中為一新興的研究領域。然而由於技術的限制,減小裝置的尺寸仍是一項挑戰。因此,有必要改進上述之不足。
根據一實施例,提供一種半導體結構,包含基板、犧牲突起物於基板之上、硬罩幕於犧牲突起物的頂部之上以及環繞犧牲突起物之奈米線。
根據另一實施例,提供一種奈米線的形成方法,包含:提供基板;提供犧牲材料於基板之上;提供鄰近於犧牲材料之奈米線材料;以及去除犧牲材料以暴露奈米線材料之內表面。
根據另一實施例,提供一種奈米線的形成方法,包含:提供基板;提供第一犧牲材料於基板之上;提供鄰近於第一犧牲材料之第二犧牲材料;去除第一犧牲材料以產生兩個分開的第二犧牲材料部份;提供鄰近於第二犧牲材料之奈米線材料;以及去除第二犧牲材料以產生四個分開的第二犧牲材料部份。根據另一實施例,提供一種奈米線的形成方法,包含:提供基板;提供用矽製成的犧牲材料於基板之上;藉由共形性磊晶成長法以提供用鍺化矽製成的奈米線材料,此奈米線材料鄰近於犧牲材料;以及藉由氫氧化銨去除犧牲材料以暴露奈米線材料之內表面,而不去除奈米線材料。
根據另一實施例,提供一種半導體結構,包含基板、第一奈米線於基板之上以及第二奈米線於基板之上且大致對稱於第一奈米線。
根據另一實施例,提供一種半導體結構,包含基板、環狀奈米線於基板之上且大致對稱於其中心。
100‧‧‧方法
102、104、106、108‧‧‧步驟
202‧‧‧基板
204‧‧‧犧牲突起物
206‧‧‧硬罩幕
302‧‧‧奈米線材料
502‧‧‧內表面
602‧‧‧環狀奈米線
604‧‧‧環狀奈米線
702‧‧‧基板
704‧‧‧犧牲突起物
706‧‧‧硬罩幕
802‧‧‧奈米線材料
1002‧‧‧內表面
1102‧‧‧裸形奈米線
1104‧‧‧裸形奈米線
1202‧‧‧基板
1204‧‧‧犧牲突起物
1206‧‧‧硬罩幕
1208‧‧‧淺溝渠隔離
1210‧‧‧犧牲突起物
1302‧‧‧溝渠
1304‧‧‧溝渠
1402‧‧‧奈米線材料
1602‧‧‧奈米線
1604‧‧‧奈米線
1606‧‧‧內表面
1702‧‧‧基板
1704‧‧‧犧牲突起物
1706‧‧‧奈米線材料
1708‧‧‧淺溝渠隔離
1710‧‧‧犧牲突起物
1802‧‧‧奈米線
1804‧‧‧奈米線
2002‧‧‧內表面
2102‧‧‧基板
2104‧‧‧犧牲突起物
2108‧‧‧淺溝渠隔離
2110‧‧‧犧牲突起物
2202‧‧‧小型突起物
2302‧‧‧奈米線材料
2402‧‧‧奈米線
2404‧‧‧奈米線
2502‧‧‧內表面
2504‧‧‧下表面
2602‧‧‧奈米線
2604‧‧‧奈米線
2606‧‧‧內表面
2700‧‧‧方法
2702、2704、2706、2708、2710、2712‧‧‧步驟
2800‧‧‧方法
2802、2804、2806、2808‧‧‧步驟
當讀到隨附的圖式時,從以下詳細的敘述可充分瞭解本發明的各方面。值得注意的是,根據工業上的標準實務,各種特徵不是按比例繪製。事實上,為了清楚的討論,各種特徵的尺寸可任意增加或減少。
第1圖為根據一些實施例,一種奈米線形成方法之流程圖。
第2A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第2B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意上視圖。
第3A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第3B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意上視圖。
第4A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第4B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意上視圖。
第5A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第5B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意上視圖。
第6A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第6B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意上視圖。
第7A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第7B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意上視圖。
第8A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第8B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意上視圖。
第9A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構示的意剖面圖。
第9B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意上視圖。
第10A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第10B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意上視圖。
第11A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第11B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意上視圖。
第12圖至第16圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第17圖至第20圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第21圖至第25圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。
第26圖為根據一些實施例,一種鰭片的製程中,某一階段之半導體結構的示意剖面圖。
第27圖為根據一些實施例,另一種奈米線形成方法之流程圖。
第28圖為根據一些實施例,另一種奈米線形成方法之流程圖。
以下的揭露內容提供許多不同的實施例或實例,以實現本發明的不同特徵。特定實例的組成及佈局敘述如下,以簡化本發明。當然這些僅是實例,並非用以限制。舉例而言,在敘述中,第一特徵形成於第二特徵上方或之上時,隨之而來可包含實施例,其中第一及第二特徵形成以直接接觸;且亦可包含實施例,其中額外的特徵可形成於第一及第二特徵之間,因此第一及第二特徵可不直接接觸。此外,本發明可在各實例中重複元件編號及/或文字。重複的目的在於簡化且明確,但不在其中決定介於所討論的多種實施例及/或組態之間的相對關係。
此外,空間上的相對用語,例如「在..之下」、「以下」、「下」、「上方」、「上」及其類,在此為了易於敘述可用以描述如圖所示的元件或特徵對於其他元件或特徵的相對關係。除了圖示所描繪的面向之外,空間上的相對用語意旨於圍繞所使用或操作的裝置的不同面向。要不然就是,設備可被導向(旋轉90度或於其他面向),且在此所用的空間上的相對描述符號可據此同樣的被解讀。
第1圖為根據一些實施例,一種奈米線形成方法
之流程圖。如第1圖所示,方法100起始於提供基板(例如:基板202)(步驟102),接著提供犧牲材料(例如:犧牲材料204)於基板上(步驟104),而後提供對稱於犧牲材料之奈米線材料(例如:奈米線材料302)(步驟106),最後去除犧牲材料以提供兩個由奈米線材料所製成的對稱奈米線(步驟108)。
第2A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意剖面圖。第2B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意上視圖。如第2A及第2B圖所示,提供基板202(例如:第1圖的步驟102)。基板202的材料可包含,例如:矽、矽鍺、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。
提供犧牲突起物204於基板202之上(例如:第1圖的步驟104),犧牲突起物204的材料可包含,例如:矽、矽鍺、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。在一些實施例中,犧牲突起物204為圓柱形,具有約30奈米至70奈米的高度與約17奈米的直徑。在一些實施例中,提供氮化碳化矽(SiCN)硬罩幕206於犧牲突起物204的頂部之上。
基板202、犧牲突起物204以及硬罩幕206的形成係透過:(1)由下而上形成多層狀結構,包含基板、氧化層、摻碳二氧化矽(SiOC)層、矽抗反射塗層以及光阻層;
(2)藉由光阻層圖案化矽抗反射塗層與摻碳二氧化矽(SiOC)層;(3)圖案化氧化層並去除摻碳二氧化矽(SiOC)層及矽抗反射層塗層;(4)於圖案化氧化層時所產生之溝渠中填入摻碳二氧化矽(SiOC)部分;(5)去除氧化層以暴露基板;以及(6)修剪摻碳二氧化矽(SiOC)部分並藉由硬罩幕回蝕基板以形成犧牲突起物。
第3A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意剖面圖。第3B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意上視圖。如第3A圖及第3B圖所示,提供一對稱於犧牲突起物204的奈米線材料302(例如:第1圖的步驟106)。在一些實施例中,奈米線材料302為環狀物,環繞於犧牲突起物204。在一些實施例中,除了硬罩幕206所覆蓋之犧牲突起物204以外的部分,可於犧牲突起物204和基板202上方,藉由共形性磊晶成長法(conformal epitaxial growth)以形成厚度為1奈米至20奈米的奈米線材料302。舉例來說,一種共形性磊晶成長法的操作條件包含:氣壓介於10托爾至20托爾、溫度介於攝氏570度至600度、甲鍺烷(GeH4)流量介於100sccm至600sccm、二氯矽烷(SiCl2H2)流量介於100sccm至600sccm和氯化氫(HCl)流量介於50sccm至200sccm。在一些實施例中,奈米線302為鍺化矽,而犧牲突起物204及基板202則是由矽所製成。
第4A圖為根據一些實施例,一種用於垂直式環
繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意剖面圖。第4B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意上視圖。如第4A圖及第4B圖所示,藉由乾式蝕刻法,例如:感應耦合電漿(ICP)、變壓耦合式電漿(TCP)、電子迴旋共振(ECR)或氟基或氯基之反應氣體的反應式離子蝕刻(RIE),去除硬罩幕206以暴露犧牲突起物204並作為軸心。
第5A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意剖面圖。第5B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意上視圖。如第5A圖及第5B圖所示,去除犧牲突起物204以暴露奈米線材料302之內表面502。在奈米線材料302是鍺化矽及犧牲突起物204是矽的情況下,可使用氫化銨(NH4OH)以選擇性去除犧牲突起物204而保留奈米線材料302。
第6A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意剖面圖。第6B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之環狀奈米線的製程中,某一階段之半導體結構的示意上視圖。如第6A圖及第6B圖所示,除了將形成環狀奈米線的部分602和604,藉由乾式蝕刻法,例如:感應耦合電漿(ICP)、變壓耦合式電漿(TCP)、電
子迴旋共振(ECR)或氟基或氯基之氣體反應物的反應式離子蝕刻(RIE),去除奈米線材料302。環狀奈米線602大致對稱於其中心且用於垂直式環繞式閘極電晶體之中。環狀奈米線602的材料異於基板202。在一些實施例中,可能在提供對稱於犧牲突起物204的奈米線材料302之前,先收縮犧牲突起物204(例如:第1圖的步驟106)。在一些實施例中,藉由等向性蝕刻法收縮環狀奈米線602可能在其形成後才進行。
在一些實施例中,可能不提供硬罩幕206,而是於犧牲突起物204(包含其上部)及基板202上方,藉由磊晶成長法以提供奈米線材料302。接著,進行化學機械拋光法或乾式蝕刻法以去除位於犧牲突起物204頂部的部分奈米線材料302,以暴露犧牲突起物204。
此外,複數個製程可能實行於半導體結構上,例如:提供鄰近於環狀奈米線602和604之閘極氧化物和提供鄰近於閘極氧化物之閘極金屬。
第7A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意剖面圖。第7B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意上視圖。如第7A圖及第7B圖所示,提供一基板702(例如:第1圖的步驟102)。基板702的材料可包含,例如:矽、矽鍺、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。
提供犧牲突起物704於基板702之上(例如:第1圖的步驟104)。犧牲突起物704的材料可包含,例如:矽、矽鍺、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。在一些實施例中,犧牲突起物704為裸型物,具有約30奈米至70奈米的高度與約17奈米的直徑。在一些實施例中,提供氮化碳化矽(SiCN)硬光罩於犧牲突起物204的頂部之上。
基板702、犧牲突起物704以及硬罩幕706的形成係透過:(1)由下而上形成多層狀結構,包含基板、氧化層、摻碳二氧化矽(SiOC)層、矽抗反射塗層以及光阻層;(2)藉由光阻層圖案化矽抗反射塗層與摻碳二氧化矽(SiOC)層;(3)圖案化氧化層並去除摻碳二氧化矽(SiOC)層及矽抗反射層塗層;(4)於圖案化氧化層時所產生之溝渠中填入摻碳二氧化矽(SiOC)部分;(5)去除氧化層以暴露基板;以及(6)修剪摻碳二氧化矽(SiOC)部分並藉由硬罩幕回蝕基板以形成犧牲突起物。
第8A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意剖面圖。第8B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意上視圖。如第8A圖及第8B圖所示,提供對稱於犧牲突起物704的奈米線材料802(例如:第1圖的步驟106)。在一些實施例中,奈米線材料802為裸型物,覆蓋於犧牲突起物704之側壁上。在一些實施例中,可於犧牲
突起物704和基板702上方,藉由共形性磊晶成長法(conformal epitaxial growth),以形成厚度為1奈米至20奈米的奈米線材料802。舉例來說,一種共形性磊晶成長法的操作條件包含:氣壓介於10托爾至20托爾、溫度介於攝氏570度至600度、甲鍺烷(GeH4)流量介於100sccm至600sccm、二氯矽烷(SiCl2H2)流量介於100sccm至600sccm和氯化氫(HCl)流量介於50sccm至200sccm。在一些實施例中,奈米線802為鍺化矽,而犧牲突起物704則是由矽所製成。
第9A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意剖面圖。第9B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意上視圖。如第9A圖及第9B圖所示,藉由稀釋氟化氫法或乾式蝕刻法,例如:感應耦合電漿(ICP)、變壓耦合式電漿(TCP)、電子迴旋共振(ECR)或氟基或氯基之氣體反應物的反應式離子蝕刻(RIE),去除硬罩幕706以暴露犧牲突起物704並作為軸心。
第10A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意剖面圖。第10B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意上視圖。如第10A圖及第10B圖所示,去除犧牲突起物704以暴露奈米線材料802之內表面
1002(例如:內側壁)。在奈米線材料802是鍺化矽及犧牲突起物704是矽的情況下,可使用氫化銨(NH4OH)選擇性去除犧牲突起物704而保留奈米線材料802。
第11A圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意剖面圖。第11B圖為根據一些實施例,一種用於垂直式環繞式閘極電晶體之裸型奈米線的製程中,某一階段之半導體結構的示意上視圖。如第11A圖及第11B圖所示,除了那些將於後形成裸形奈米線1102和1104的部分,藉由乾式蝕刻法,例如:感應耦合電漿(ICP)、變壓耦合式電漿(TCP)、電子迴旋共振(ECR)或氟基或氯基之氣體反應物的反應式離子蝕刻(RIE),去除奈米線材料802,以提供兩個由奈米線材料所製成的裸形對稱的奈米線1102和1104,用於垂直式環繞式閘極電晶體(例如:第1圖的步驟108)。在本實施例中,每個對稱的裸形奈米線1102和1104具有相同尺寸。
在一些實施例中,可能在提供對稱於犧牲突起物704的奈米線材料802之前,先收縮犧牲突起物704(例如:第1圖的步驟106)。在一些實施例中,收縮裸形奈米線1102可能在其形成後才實行。
此外,複數個製程可能實行於半導體結構上,例如:提供鄰近於裸型奈米線1102和1104之閘極氧化物和提供鄰近於閘極氧化物之閘極金屬。
第12圖為根據一些實施例,一種用於水平式環
繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第12圖所示,提供基板1202(例如:第1圖的步驟102)。基板1202的材料可包含,例如:矽、矽鍺、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。
提供犧牲突起物1204於基板1202之上(例如:第1圖的步驟104)。犧牲突起物1204的材料可包含,例如:矽、矽鍺、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。在一些實施例中,提供氮化碳化矽(SiCN)硬罩幕1206於犧牲突起物1204的頂部之上。在一些實施例中,形成淺溝渠隔離1208於犧牲突起物1204與另一犧牲突起物1210之間。
第13圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第13圖所示,選擇性去除部分犧牲突起物1204以產生兩個溝渠1302和1304。在犧牲突起物1204為矽的情況下,可藉由氫化銨(NH4OH)去除犧牲突起物1204。
第14圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第14圖所示,提供對稱於犧牲突起物1204的奈米線材料1402(例如:第1圖的步驟106)於溝渠1302和1304之中。在一些實施例中,可藉由共形性磊晶成長法(conformal epitaxial growth)以提供奈米線材料1402。舉例來說,一種共形性磊晶成長法的操作條件包含:氣壓介
於10托爾至20托爾、溫度介於攝氏570度至600度、甲鍺烷(GeH4)流量介於100sccm至600sccm、二氯矽烷(SiCl2H2)流量介於100sccm至600sccm和氯化氫(HCl)流量介於50sccm至200sccm。在一些實施例中,奈米線1402為鍺化矽,而犧牲突起物1204則是由矽所製成。
第15圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第15圖所示,藉由稀釋氟化氫法或乾式蝕刻法,例如:感應耦合電漿(ICP)、變壓耦合式電漿(TCP)、電子迴旋共振(ECR)或氟基或氯基之氣體反應物的反應式離子蝕刻(RIE),去除硬罩幕1206以暴露犧牲突起物1204。
第16圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第16圖所示,使用氫化銨(NH4OH)去除犧牲突起物1204以暴露奈米線材料1402之內表面1606,並產生兩個對稱的奈米線1602和1604(例如:第1圖的步驟108);其中氫化銨(NH4OH)能選擇性去除犧牲突起物1204而保留奈米線材料1402。在本實施例中,每個對稱的奈米線1602和1604具有相同尺寸。
第17圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第17圖所示,提供基板1702(例如:第1圖的步驟102)。基板1702的材料可包含,例如:矽、矽鍺、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦
鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。
提供犧牲突起物1704於基板1702之上(例如:第1圖的步驟104)。犧牲突起物1704的材料可包含,例如:矽、矽鍺、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。提供對稱於犧牲突起物1704的奈米線材料1706(例如:第1圖的步驟106)於犧牲突起物1704的頂部之上。在一些實施例中,可藉由共形性磊晶成長法(conformal epitaxial growth)以提供奈米線材料1706。舉例來說,一種共形性磊晶成長法的操作條件包含:氣壓介於10托爾至20托爾、溫度介於攝氏570度至600度、甲鍺烷(GeH4)流量介於100sccm至600sccm、二氯矽烷(SiCl2H2)流量介於100sccm至600sccm和氯化氫(HCl)流量介於50sccm至200sccm。在一些實施例中,奈米線1706為鍺化矽,而犧牲突起物1704則是由矽所製成。在一些實施例中,淺溝渠隔離1708形成於犧牲突起物1704與另一犧牲突起物1710之間。
第18圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第18圖所示,使用,例如:四甲基氫氧化氨(TMAH)或氫氧化鉀(KOH)的濕式蝕刻法去除奈米線材料1706的中央區域以產生兩個分開的奈米線1802和1804,並暴露犧牲突起物1704的頂部。
第19圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構
的示意剖面圖。如第19圖所示,蝕刻淺溝渠隔離1208以暴露犧牲突起物1704之側壁。
第20圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第20圖所示,使用氫化銨(NH4OH)去除犧牲突起物1204以產生兩個對稱的奈米線1802和1804(例如:第1圖的步驟108),並暴露奈米線材料1802之內表面2002(例如:下表面)。在本實施例中,每個對稱的奈米線1802和1804具有相同尺寸。
第21圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第21圖所示,提供基板2102(例如:第1圖的步驟102)。基板2102的材料可包含,例如:矽、矽鍺、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。
提供犧牲突起物2104於基板2102之上(例如:第1圖的步驟104)。犧牲突起物2104的材料可包含,例如:矽、矽鍺、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。在一些實施例中,淺溝渠隔離2108形成於犧牲突起物2104與另一個犧牲突起物2110之間。
第22圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第22圖所示,選擇性蝕刻部分犧牲突起物
2104以產生小型突起物2202。
第23圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第23圖所示,提供對稱於犧牲突起物2104之U型奈米線材料2302(例如:第1圖的步驟106),且圍繞小型突起物2202。在一些實施例中,可藉由共形性磊晶成長法(conformal epitaxial growth)以提供奈米線材料2302。舉例來說,一種共形性磊晶成長法的操作條件包含:氣壓介於10托爾至20托爾、溫度介於攝氏570度至600度、甲鍺烷(GeH4)流量介於100sccm至600sccm、二氯矽烷(SiCl2H2)流量介於100sccm至600sccm和氯化氫(HCl)流量介於50sccm至200sccm。在一些實施例中,奈米線2302為鍺化矽,而犧牲突起物2104則是由矽所製成。
第24圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。進行化學機械拋光法或乾式蝕刻法去除一部分的奈米線材料2302以暴露小型突起物2202,並產生兩個分開的奈米線2402和2404。
第25圖為根據一些實施例,一種用於水平式環繞式閘極電晶體之奈米線的製程中,某一階段之半導體結構的示意剖面圖。如第25圖所示,使用氫化銨(NH4OH)去除一部分犧牲突起物2104(包含小型突起物2202),以產生兩個對稱的奈米線2402和2404(例如:第1圖的步驟108),並暴露奈米線材料2402之內表面2502及下表面2504;其中氫
化銨(NH4OH)能選擇性去除犧牲突起物2104而保留奈米線材料2402和2404。每個對稱的奈米線2402和2404具有相同的尺寸。
第26圖為根據一些實施例,一種鰭片的製程中,某一階段之半導體結構的示意剖面圖。製造鰭片的步驟與第21圖至第24圖相似,故不在此重複。如第26圖所示,接續自第24圖,藉由氫化銨(NH4OH)去除小型突起物2202以產生兩個對稱的奈米線2602和2604(例如:第1圖的步驟108),並暴露奈米線材料2302之內表面2606;其中氫化銨(NH4OH)能選擇性去除犧牲突起物2104而保留對稱的奈米線2602和2604。在本實施例中,每個對稱的奈米線2602和2604具有相同尺寸。
第27圖為根據一些實施例,一種奈米線形成方法之流程圖。如第27圖所示,方法2700起始於提供基板(步驟2702),接著提供第一犧牲材料於基板上(步驟2704),提供對稱於第一犧牲材料之第二犧牲材料(步驟2706),去除第一犧牲材料以產生兩個分開的第二材料部份(步驟2708),提供對稱於第二犧牲材料之奈米線材料(步驟2710),去除第二犧牲材料以產生四個對稱的奈米線材料部分(步驟2712)。
第28圖為根據一些實施例,一種奈米線形成方法之流程圖。如第28圖所示,方法2800起始於提供基板(例如:基板202)(步驟2802),接著提供犧牲材料(例如:犧牲材料204)於基板之上(步驟2804),提供鄰近於犧牲材料
之奈米線材料(例如:奈米線材料302)(步驟2806),去除犧牲材料以暴露奈米線材料之內表面(步驟2808)。
在一些實施例中,提供鄰近於犧牲材料之奈米線材料的步驟,更包含藉由磊晶成長法以提供鄰近於犧牲材料之奈米線材料。在一些實施例中,提供犧牲材料於基板之上的步驟,更包含提供用矽製成的犧牲材料;且其中提供鄰近於犧牲材料之奈米線材料,更包含提供用鍺化矽複合材料製成的奈米線材料。
在一些實施例中,去除犧牲材料以暴露奈米線材料之內表面的步驟,更包含使用氫氧化銨(NH4OH)選擇性蝕刻犧牲材料而不去除奈米線材料。方法2800更包含形成硬罩幕於奈米線材料的頂部之上。在一些實施例中,提供鄰近於犧牲材料之奈米線材料的步驟,更包含提供鄰近於犧牲材料之奈米線材料於硬罩幕所覆蓋以外的區域。
方法2800更包含去除硬罩幕以暴露犧牲材料。方法2800更包含藉由等向性蝕刻法收縮奈米線材料。在一些實施例中,提供犧牲材料於基板之上的步驟,更包含提供與基板使用相同材料的犧牲材料。在提供鄰近於犧牲材料的奈米線材料之前,方法2800更包含蝕刻犧牲材料以提供至少兩個溝渠。在一些實施例中,提供鄰近於犧牲材料的奈米線材料的步驟,更包含於溝渠中分別提供至少兩個分開的奈米線材料部分,鄰近於犧牲材料。
在一些實施例中,提供鄰近於犧牲材料之奈米線材料的步驟,更包含蝕刻奈米線材料於其中心區域以提供
至少兩個分開的的奈米線材料部份。在提供鄰近於犧牲材料的奈米線材料之前,方法2800更包含,蝕刻犧牲材料以提供突起物。
在一些實施例中,去除犧牲材料以暴露奈米線材料之內表面的步驟,更包含去除犧牲材料以暴露奈米線材料之內側壁。在一些實施例中,去除犧牲材料以暴露奈米線材料之內表面的步驟,更包含去除犧牲材料以暴露奈米線材料之下表面。方法2800更包含提供鄰近於奈米線材料之閘極氧化物和提供鄰近於閘極氧化物之閘極金屬。
在一些實施例中,犧牲突起物是由矽所製成而奈米線是由鍺化矽所製成。在一些實施例中,奈米線為共形性的磊晶(conformal epitaxy)。奈米線材料或鰭片可能為但不侷限於矽、鍺化矽、鍺或III-V族(磷化銦、砷化鎵、砷化鋁、砷化銦、銦鋁砷、銦鎵砷、銻化銦、銻化鎵、銦鎵銻)。
請復參照第1圖,提供對稱於犧牲材料之奈米線材料的步驟,更包含藉由磊晶成長法以提供對稱於犧牲材料的奈米線材料。提供犧牲材料於基板之上的步驟,更包含提供使用矽製成的犧牲材料;且其中提供對稱於犧牲材料的奈米線材料,更包含提供使用鍺化矽複合材料製成的奈米線材料。
方法100更包含形成硬罩幕於奈米線材料的頂部之上。提供對稱於犧牲材料的奈米線材料的步驟,更包含提供對稱於犧牲材料的奈米線材料於硬罩幕所覆蓋以外的區域。方法100更包含去除硬罩幕以暴露犧牲材料。
在提供對稱於犧牲材料的奈米線材料之前,方法100更包含蝕刻犧牲材料以提供至少兩個溝渠。提供對稱於犧牲材料之奈米線材料的步驟,更包含分別提供至少兩個分開的奈米線材料部份,對稱於犧牲材料且位於溝渠中。
提供對稱於犧牲材料之奈米線材料的步驟,更包含蝕刻奈米線材料於其中心區域以提供至少兩個分開的奈米線材料部份。在提供對稱於犧牲材料的奈米線材料之前,方法100更包含蝕刻犧牲材料以提供突起物。
雖然本發明已以實施方式及實施例揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。體現本發明特徵與優點的典型實施方式已在以上的說明中詳細叙述。應理解的是本發明能夠在不同的實施例上具有各種的變化,其皆不脫離本發明的範圍,且其中的說明及附圖在本質上是當作說明之用,而非用以限制本發明。
1202‧‧‧基板
1204‧‧‧犧牲突起物
1208‧‧‧淺溝渠隔離
1402‧‧‧奈米線材料
1602‧‧‧奈米線
1604‧‧‧奈米線
1606‧‧‧內表面
Claims (7)
- 一種半導體結構,包含:一基板;一鰭片配置於該基板上,該鰭片具有一頂面;一第一奈米線和一第二奈米線配置於該鰭片的該頂面上且實體接觸該頂面;以及該第二奈米線大致對稱於該第一奈米線。
- 如請求項1所述之半導體結構,其中每個該第一奈米線與該第二奈米線具有相同的尺寸。
- 如請求項1所述之半導體結構,其中每個該第一奈米線與該第二奈米線用於一水平式環繞式閘極電晶體。
- 一種半導體結構,包含:一基板;一鰭片配置於該基板上;以及一第一奈米線和一第二奈米線配置於該鰭片上方,其中該第一奈米線和該第二奈米線懸吊在該鰭片上方,且與該鰭片之間存在一間隙。
- 一種製造半導體結構之方法,包含:提供一基板; 提供一犧牲材料於該基板之上;蝕刻該犧牲材料以形成一突起物,該突起物包含該犧牲材料;執行一磊晶生長製程以形成一對稱於該突起物之奈米線材料,該奈米線材料包含多個L形部份,該些L形部份包覆該突起物的側壁以及該基板的多個部份;去除該犧牲材料;以及移除該奈米線材料包覆該基板的部份以提供兩個用該奈米線材料製成之對稱的奈米線。
- 如請求項5所述之方法,其中提供該犧牲材料於該基板之上,更包含提供用矽製成的該犧牲材料;且其中提供對稱於該犧牲材料之該奈米線材料,更包含提供用鍺化矽複合材料製成的該奈米線材料。
- 如請求項5所述之方法,更包含形成一硬罩幕於該奈米線材料的頂部之上。
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2014
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- 2014-12-18 KR KR1020140183000A patent/KR101657802B1/ko active IP Right Grant
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2015
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2016
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US20110147697A1 (en) * | 2009-12-18 | 2011-06-23 | Uday Shah | Isolation for nanowire devices |
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US20160343804A1 (en) | 2016-11-24 |
KR20160040409A (ko) | 2016-04-14 |
TW201617283A (zh) | 2016-05-16 |
US10923566B2 (en) | 2021-02-16 |
US9437699B2 (en) | 2016-09-06 |
CN106206246B (zh) | 2020-10-27 |
CN106206246A (zh) | 2016-12-07 |
US20160099328A1 (en) | 2016-04-07 |
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