TWI524393B - 製造電子元件接觸區的方法 - Google Patents

製造電子元件接觸區的方法 Download PDF

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TWI524393B
TWI524393B TW099130983A TW99130983A TWI524393B TW I524393 B TWI524393 B TW I524393B TW 099130983 A TW099130983 A TW 099130983A TW 99130983 A TW99130983 A TW 99130983A TW I524393 B TWI524393 B TW I524393B
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aluminum
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艾克塞爾 曼茨
史帝芬 巴格斯
史帝芬 道威
托比亞斯 德洛斯特
彼得 羅斯
安德烈亞斯 泰普
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首德太陽能股份有限公司
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Description

製造電子元件接觸區的方法
本發明係有關於一種為一電子元件之基板建立至少一局部接觸區以便使該區域與一連接件接觸的方法,其中,該基板接觸側配有一由鋁構成或含鋁的燒結多孔層。
半導體製造特別是太陽能電池生產領域出於生產成本考慮在電池正面或背面採用燒結金屬接點。
矽太陽能電池背面通常存在大面積鋁層,其在太陽能電池製造過程中因熱處理而燒結,同時在背場(BSF)作用下,太陽能電池背面發生鈍化。
該鋁層與被稱作「第一層」之矽基板直接接觸,燒結時該鋁層在其與矽基板間的分界面上熔化並與該鄰接第一層熔合。冷卻時,高度摻鋁矽層在晶圓(即基板)背面磊晶凝固。與此同時,富矽鋁層在該鋁層上凝固,冷卻過程結束時,鋁矽共熔物在該高度摻鋁層與該富矽層之間凝固。太陽能電池背面鈍化根源在於該高度摻鋁之磊晶生長矽層。高度摻鋁使得該層之半導體材料內產生過量的帶負電荷之靜止鋁受體,該等鋁受體會產生反向驅動少數載子之電場,即所謂的背場。
但若該鋁層覆蓋太陽能電池或基板整個背面,則會產生焊接問題,因為鋁背面上無法直接焊接鍍錫或未鍍錫金屬連接件,尤其是銅連接件。為了實現必要的電接觸,一般須藉由網板印刷、移印或其他印刷方法直接在基板表面設置銅接觸導線或焊接點,再於其上焊接鍍錫銅帶。此措施會在焊接接點區域內造成鋁層缺失,從而使該區域內無背場產生,其結果為太陽能電池背面不完全電鈍化,因而局部產生較小光電流。
銀係昂貴原料,為降低生產成本起見應避免銀之使用。因此,理想者係完全放棄使用銀接點。
因多方面原因關係,很難在該鋁層上直接焊接銅帶。原因之一為鋁粒之氧化表面。另一原因在於燒結過程使鋁表面內聚性不足。在燒結過程中,摻矽合金層上產生一鋁層,其形式為燒結在一起的球狀鋁粒(燒結層),此為相當鬆散而非緊密之鋁燒結組合物,其孔隙度與鋁膏成分或燒結時的處理參數有關。
若能在該燒結鋁層上成功進行焊接,則此焊接結構亦會因該等孔隙之存在及其所引起的不穩定性而極其不堅固。此種不堅固性表現在大約2-8 N之較小保持力上,亦即,該燒結層內部開裂,從開裂點兩側可看到顆粒之球狀結構。
而當鋁層上該焊接連接受到模組工作條件下所產生的拉力作用時,亦同樣會發生上述情況。所形成之小裂痕會削弱焊接點耐久性,增大接觸電阻,抑或該連接整個脫落,從而使機械及電接點徹底損壞。
DE-A-10 2007 012 277揭示一種製造太陽能電池的方法。其中一處理步驟係在半導體基板背面大面積塗覆鋁並使其熔合到該基板中。未與矽熔合的鋁經蝕刻步驟至少被部分移除。該方法流程複雜,不適用於太陽能電池生產線。
EP-A-1 739 690係有關於一種太陽能電池,其中在背場形成後,以化學方式將此前所產生之燒結鋁層移除。
US-A-2003/0108664揭示一種藉塗覆前驅混合物以在太陽能電池上製造導電接點的方法。該前驅混合物可含鋁。可用脈波雷射束來燒結該材料。
關於在半導體基板上構建電接點,DE-B-10 2006 040 352提出如下解決方案:利用雷射束將覆於半導體基板上之金屬粉末燒結。而後再移除未燒結材料。
為了製造如EP-A-2 003 699所述之金屬半導體接點,須在覆於太陽能電池上之鋁燒結層內燒結一可焊接材料。
本發明之目的在於對開頭所述類型之方法進行改良,使其能提供機械穩定、可以恰當方式予以電連接(如焊接)的接觸區。同時,相關處理工藝與先前技術相比亦應得到簡化。
根據本發明,該目的之解決方案如下:藉由集中電磁輻射(較佳雷射輻射)以非接觸方式在該接觸區內壓縮及/或移除該燒結多孔層。
特定言之,為該區域施加集中電磁輻射,較佳雷射輻射。
在本發明之技術原理基礎上,本發明出人意料地發現,藉集中電磁輻射(較佳雷射輻射)之施加可將該燒結多孔層局部材料壓縮或移除,由此可構建一接觸區,在該接觸區內可透過習知連接技術(例如,超音波焊接)實現機械穩定的佈線。其中,該燒結多孔鋁層之優點在於,其經一定程度之壓縮後可形成機械附著性能優良的耐刮鋁表面。如此便無需用遮罩技術直接在基板上構建非鋁焊接接點,從而避免太陽能電池在接點區域內背場間斷之固有缺點。
經壓縮處理可產生一區域,其機械穩定性優於相同材料之多孔層。
特定言之,為該燒結多孔層施加波長λ為200 nmλ11000 nm的集中電磁輻射。
對該多孔層之區域進行非接觸式壓縮或移除處理時,較佳使用發射波長800 nm,較佳λ1000 nm,特定言之λ=1064 nm,特定言之近紅外範圍內之紅外輻射的雷射器。較佳採用如Nd:YVO4雷射器或Nd:YAG雷射器等固態雷射器。尤佳應採用雷射輻射波長λ為λ=1064 nm的固態雷射器。
構建該一或多個接觸區時,該雷射器應在脈波模式或Q切換模式下工作。為了使能量集中在特定區域上並且避免出現熱點,構建背電極層時應使雷射束具有禮帽形射束剖面。
作為替代或補充方案,可在雷射器與基板之間佈置如折射透鏡或繞射透鏡等射束整形設備或光圈來對該射束剖面施加影響。
特定言之,所用雷射輻射的波長應使得該多孔層之光學吸收率至少為0.5%,特定言之至少為10%。
所用波長應在燒結多孔層中被吸收以加熱該燒結多孔層,進而使得被施加雷射輻射區域內的層材料蒸發以形成該接觸區。
除雷射輻射外,亦可採用藉任意類型之非接觸式輻射能(如任意波長的透鏡或鏡面聚焦光)而實現的熱能。
「壓縮」係指一種以增大密度(至少提高10%,最多提高100%)為目的的層材料或材料處理。密度被提高100%意味著該層或該層之區域因能量之施加而全部熔化,從而產生無孔晶體層,亦即,其密度為100%。
「移除」係指一種將該燒結多孔層部分或全部移除的處理。「部分移除」原則上應包括該燒結多孔層至少10%的初始層厚被移除此一情況。「全部移除」則表示經處理後,基板上需進行接觸的區域內不再留存該層之多孔分區。以太陽能電池為例,此表示該多孔層之移除將進行至燒結時所形成的鋁矽共熔物處。
本發明之技術原理旨在藉層處理產生合適底塗層,且該底塗層上可覆一焊接層或可焊接層。該層可為一錫層。
作為焊接的替代方案,自然亦可採用其他可實現材料接合式連接的連接方式,如熔接或黏接。
壓縮或全部或部分再熔亦包括完全或部分相變,如此便會產生各種合金或合金濃度。
本發明之方法特定言之應用於用作電子元件的太陽能電池,其包含由半導體材料構成之第一層作為基板、分佈於該第一層上之第二層作為由鋁構成或含鋁的該燒結多孔層、分佈於該第一及第二層之間由該第一及第二層之材料構成的至少兩個中間層及該導電接觸區,其中,靠近該第二層的第一中間層可包含由該第一及第二層之材料構成的共熔混合物,該接觸區與該第一層構成導電連接且以該第二層為起點進行延伸或貫穿該第二層,該接觸區係藉由對該第二層之材料進行非接觸式壓縮及/或移除處理而產生,其中,在該接觸區內將該多孔層之材料壓縮及/或移除後,特定言之藉由焊接(如超音波焊接)將該接觸區與一連接件導電連接。
本發明其他技術細節、優點及特徵不僅可從申請專利範圍及其所包含的特徵(單項特徵及/或特徵組合)中獲得,亦可從下文有關附圖所示之較佳實施例的描述中獲得。
各圖所示係為一半導體元件之局部示意圖,為簡化起見,下文稱之為「太陽能電池」。由矽構成之基板10,即半導體材料層,下文亦稱「半導體層」,其正面通常可塗覆用以構成p-n接面之半導電層及正面接點,視情況亦可塗覆鈍化 層。此方面可參考太陽能電池等半導體元件的習知結構,此處不再加以贅述。
半導體層10亦稱「第一層」,藉由網板印刷、移印、熱熔射等技術在其上面塗覆一個由鋁構成或含鋁的層。該層下稱「鋁層」或簡單稱其為「層」。該層在太陽能電池製造過程中燒結,從而產生作為第二層的外側鋁燒結層12。在製造過程中,鋁燒結層12與矽基板10之間形成用以產生背場之摻鋁矽層14及包含鋁矽共熔物18之摻矽鋁層16。此處亦可參考相關之習知技術。摻矽鋁層16稱為「第一中間層」,摻鋁矽層稱為「第二中間層14」。
由鋁構成的外層或第二層12因燒結過程而變得多孔,故具有大量空腔。
在此需要指出,各圖所示僅為層10、12及包含共熔物18之中間層14、16的示意圖,而非其實際尺寸。
為能在亦稱「第二層」的鋁燒結層12上焊接用以實現接觸之連接件(如銅連接件),須在燒結層12中構建一接觸區20,本發明構建該接觸區20之具體方式係藉由集中電磁輻射以非接觸方式壓縮或移除層12區域內的鋁材料。
非接觸式壓縮或移除處理可採用固態雷射器,如Nd:YVO4雷射器,即一種含釩酸釔的宿主晶體。宿主晶體亦可為釔鋁石榴石(YAG),如此便可使用Nd:YAG固態雷射器。較佳摻釹,由此可實現波長為1064nm的固態雷射器。 視情況亦可為該雷射器摻雜鉺、鐿或其他元素。摻釹釩酸釔雷射器(Nd:YVO4雷射器)或摻釹YAG(Nd:YAG雷射器)尤佳。
為了使該雷射輻射具有理想剖面,可在射束路徑上佈置用於為光圈擴束的光學裝置或如折射透鏡或繞射透鏡等光學射束整形系統。
透過相關措施可在多孔鋁層12中明確構建接觸區20,再藉習知連接技術(例如,超音波焊接)可實現機械穩定的佈線。特定言之應以某種程度施加集中電磁輻射,使得產生自鋁層的接觸區高度壓縮、部分壓縮或以某一密度梯度分佈於此前的多孔層之密度之上(圖1、圖4、圖5)且視情況具有耐刮鋁表面,從而獲得良好的機械附著性。
在本發明範圍內,亦可在待構建之接觸區內將第二層12之材料完全蒸發,視情況亦可將層16、18抑或僅將層16(圖2、圖3)完全蒸發,從而直接在與外層12鄰接之中間層16的下方進行接觸。
圖2至圖6大體上對本發明之技術原理所包含的各種方法進行了展示。其再度以太陽能電池為例對本發明之處理方式予以說明,故,相同元件仍以相同之元件符號表示。
如圖2及圖3所示,為了提供接觸區20,可將鋁燒結層12移除(圖2)或將該鋁燒結層及與之相鄰的摻矽鋁層16一併移除(圖3)。
如圖4及圖5所示,可對鋁燒結層12予以理想程度之壓縮處理以構建具有理想機械穩定性的接觸區20,從而實現接觸。其中依照如圖4所示之實施例,燒結層12被壓縮成緊密性不同的區域22、24。依照如圖5所示之實施例,燒結層12經壓縮處理後在接觸區20內密度從外向內逐步增大。由此產生密度梯度。
最後,亦可將某一層(在本實施例中為鋁燒結層12)之某一區域移除並對剩餘部分進行壓縮處理。相應區域在圖6中分別用元件符號26(移除區域)及28(壓縮區域)表示。
如若在圖示實施例中,層12內部或下方存在單獨一個接觸區20,則自然可按連接需要依照本發明之技術原理建立相應數量之接觸區。
另需加以指出者為,本發明之方法並非僅適用於如太陽能電池等半導體元件的背面。其亦適用於正面。
此外按本發明之設計,特定言之僅在需與連接件(如電池連接件)建立連接之區域內實施壓縮及/或移除處理或移除及/或壓縮處理。此前所形成的燒結多孔鋁層較佳沿太陽能電池整個背面延伸。
另需指出者為,應用過本發明之方法後,可在已處理區域上補充性地施覆一或多個層,而後再實施真正意義上的焊接或連接處理。
若相關鋁層部分區域之密度或密度梯度在一般情況下大 於未經處理的分區,則壓縮層之形態尤其成為已應用本發明之證明。
如若與未經處理之分區相比,相關鋁層之部分區域全部或部分缺失,則多孔層之缺失亦同樣為已應用本發明之證明。
10‧‧‧基板/半導體層/矽基板
12‧‧‧鋁燒結層/層/鋁層/第二層/外層/燒結層
14‧‧‧矽層/第二中間層
16‧‧‧鋁層/中間層
18‧‧‧鋁矽共熔物
20‧‧‧接觸區
22‧‧‧區域
24‧‧‧區域
26‧‧‧移除區域
28‧‧‧壓縮區域
圖1為半導體元件示意圖;圖2為半導體元件經依第一實施方式之處理後的示意圖;圖3為半導體元件經依第二實施方式之處理後的示意圖;圖4為半導體元件經依第三實施方式之處理後的示意圖;圖5為半導體元件經依第四實施方式之處理後的示意圖;及圖6為半導體元件經依第五實施方式之處理後的示意圖。
10...基板/半導體層/矽基板
12...鋁燒結層/層/鋁層/第二層/外層/燒結層
14...矽層/第二中間層
16...鋁層/中間層
18...鋁矽共熔物
20...接觸區
22...區域
24...區域

Claims (13)

  1. 一種為一電子元件之一基板構建至少一局部接觸區以便使該接觸區與一連接件接觸的方法,其中,該基板接觸側配有一由鋁構成或含鋁的燒結多孔層,該方法包含以下步驟(a)~(d)中之一者:(a)在待構建之該接觸區內藉由集中電磁輻射而部分移除及部分壓縮該燒結多孔層;或(b)在待構建之該接觸區之至少一區域內藉由集中電磁輻射而壓縮該燒結多孔層,以便產生多個密度不同的區域;或(c)在待構建之該接觸區內藉由集中電磁輻射而壓縮該燒結多孔層,以便產生一密度梯度;或(d)在待構建之該接觸區內,先將該燒結多孔層外側移除,再對其剩餘部分進行壓縮處理,該移除及壓縮係藉由集中電磁輻射進行。
  2. 如申請專利範圍第1項之方法,其中,為該燒結多孔層施加波長λ為200nmλ11000nm的集中電磁輻射。
  3. 如申請專利範圍第1項之方法,其中,在待構建之該接觸區內為該燒結多孔層施加波長λ800nm之近紅外範圍內之雷射輻射。
  4. 如申請專利範圍第3項之方法,其中,該雷射輻射之波長λ1000nm。
  5. 如申請專利範圍第1項之方法,其中,產生該集中電磁 輻射時,使用一波長為λ=1064nm的摻釹固態雷射器(22)或一釔鋁石榴石固態雷射器或一釩酸釔固態雷射器(22),或使用一摻釹釔鋁石榴石雷射器(22)或一摻釹釩酸釔雷射器。
  6. 如申請專利範圍第2至4項中任一項之方法,其中,該雷射器(22)所發射之雷射輻射(24)的波長使得該燒結多孔層(12)之光學吸收率至少為0.5%。
  7. 如申請專利範圍第6項之方法,其中,該燒結多孔層之光學吸收率介於10%與100%之間。
  8. 如申請專利範圍第2至4項中任一項之方法,其中,使用一雷射器(38),其所發射之雷射輻射(36)的波長被該多孔層(12)吸收以加熱該多孔層,進而使得被施加雷射輻射區域內的該多孔材料蒸發以形成該接觸區(20)。
  9. 如申請專利範圍第2至4項中任一項之方法,其中,構建該接觸區(20)時,使該雷射器在脈波模式或Q切換模式下工作。
  10. 如申請專利範圍第2至4項中任一項之方法,其中,構建該接觸區(20)時,使該雷射束具有禮帽形射束剖面。
  11. 如申請專利範圍第2至4項中任一項之方法,其中,在該雷射器(22)與該層(14)之間佈置一包括折射透鏡或繞射透鏡之射束整形設備或一光圈,以便對該雷射束(24)施加射束影響。
  12. 如申請專利範圍第1項之方法,其中,將一太陽能電 池用作電子元件,其包含一由半導體材料構成之第一層(10)作為該基板、一分佈於該第一層上之第二層(12)作為由鋁構成或含鋁的該燒結多孔層、分佈於該第一及第二層之間由該第一及第二層之材料構成的至少兩個中間層(14,16)及構成該第一層之一導電連接的該接觸區(20),其中,靠近該第二層(12)的第一中間層(16)可包含由該第一及第二層之材料構成的共熔混合物(18),其中,在待構建之該接觸區內將該燒結多孔層之材料壓縮及/或移除後,藉由超音波焊接將該接觸區與一連接件導電連接。
  13. 如申請專利範圍第1項之方法,其中,對該多孔層進行壓縮及/或移除處理後,在相應區域上施覆一或多個用以實現接觸的層。
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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4948629B2 (ja) * 2010-07-20 2012-06-06 ウシオ電機株式会社 レーザリフトオフ方法
US20140124027A1 (en) * 2011-05-31 2014-05-08 Kyocera Corporation Solar cell and method of manufacturing a solar cell
DE102011052256B4 (de) * 2011-07-28 2015-04-16 Hanwha Q.CELLS GmbH Verfahren zur Herstellung einer Solarzelle
DE102012100535A1 (de) 2012-01-23 2013-07-25 Schott Solar Ag Verfahren zum Herstellen eines elektrisch leitenden Kontakts auf einer Solarzelle
DE102012012868A1 (de) * 2012-06-28 2014-01-02 Universität Konstanz Verfahren und Vorrichtung zum Herstellen einer Solarzelle mit durch Laser strukturierter Metallschicht
KR102095768B1 (ko) * 2012-08-24 2020-04-01 세키스이가가쿠 고교가부시키가이샤 전기 모듈의 제조 방법 및 전기 모듈
DE102013204828A1 (de) 2013-03-19 2014-09-25 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Rückseitenkontaktiertes Halbleiterbauelement und Verfahren zu dessen Herstellung
JP2016518022A (ja) * 2013-03-22 2016-06-20 スリーエム イノベイティブ プロパティズ カンパニー 導電性テープを含む太陽電池及びモジュール、並びにそれらの作製及び使用方法
US10096728B2 (en) * 2014-06-27 2018-10-09 Sunpower Corporation Firing metal for solar cells
US9888584B2 (en) * 2014-12-31 2018-02-06 Invensas Corporation Contact structures with porous networks for solder connections, and methods of fabricating same
WO2018209147A1 (en) * 2017-05-10 2018-11-15 PLANT PV, Inc. Multi-layer metal film stacks for shingled silicon solar cell arrays

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3828276A (en) * 1973-05-25 1974-08-06 Quantronix Corp High efficiency acousto-optical q-switch
JPH01125988A (ja) * 1987-11-11 1989-05-18 Hitachi Ltd 太陽電池素子の製造方法
JP2682475B2 (ja) * 1994-11-17 1997-11-26 日本電気株式会社 ビームスキャン式レーザマーキング方法および装置
US6057234A (en) * 1996-04-29 2000-05-02 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating semiconductor device
US20030108664A1 (en) * 2001-10-05 2003-06-12 Kodas Toivo T. Methods and compositions for the formation of recessed electrical features on a substrate
US7938988B2 (en) * 2004-07-01 2011-05-10 Toyo Aluminium Kabushiki Kaisha Paste composition and solar cell element using the same
JP2006148082A (ja) * 2004-10-19 2006-06-08 Semiconductor Energy Lab Co Ltd 配線基板及び半導体装置の作製方法
JP4903444B2 (ja) * 2006-01-24 2012-03-28 シャープ株式会社 光電変換素子
DE102006040352B3 (de) * 2006-08-29 2007-10-18 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Aufbringen von elektrischen Kontakten auf halbleitende Substrate, halbleitendes Substrat und Verwendung des Verfahrens
DE102007012277A1 (de) * 2007-03-08 2008-09-11 Gebr. Schmid Gmbh & Co. Verfahren zur Herstellung einer Solarzelle sowie damit hergestellte Solarzelle
TWI449183B (zh) * 2007-06-13 2014-08-11 Schott Solar Ag 半導體元件及製造金屬半導體接點之方法
DE102008006166A1 (de) * 2008-01-26 2009-07-30 Schott Solar Gmbh Verfahren zur Herstellung eines photovoltaischen Moduls
US7923368B2 (en) * 2008-04-25 2011-04-12 Innovalight, Inc. Junction formation on wafer substrates using group IV nanoparticles
TWI362759B (en) * 2008-06-09 2012-04-21 Delsolar Co Ltd Solar module and system composed of a solar cell with a novel rear surface structure
EP2344680A2 (en) * 2008-10-12 2011-07-20 Utilight Ltd. Solar cells and method of manufacturing thereof

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TW201126580A (en) 2011-08-01
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JP2011066424A (ja) 2011-03-31
KR20110030391A (ko) 2011-03-23
HRP20191441T1 (hr) 2019-11-15
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EP2299496A3 (de) 2016-08-24
US8148195B2 (en) 2012-04-03

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