TWI438788B - Manufacturing method of semiconductor porcelain composition - electrode adhesive body - Google Patents

Manufacturing method of semiconductor porcelain composition - electrode adhesive body Download PDF

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TWI438788B
TWI438788B TW098109670A TW98109670A TWI438788B TW I438788 B TWI438788 B TW I438788B TW 098109670 A TW098109670 A TW 098109670A TW 98109670 A TW98109670 A TW 98109670A TW I438788 B TWI438788 B TW I438788B
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semiconductor
composition
electrode
calcined powder
tio
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TW200947475A (en
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Kentaro Ino
Takeshi Shimada
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Hitachi Metals Ltd
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Description

半導體瓷器組成物-電極黏合體之製造方法
本發明係關於一種使用於PTC熱阻器、PTC加熱器、PTC開關、溫度檢測器等中之具有正的電阻溫度的半導體瓷器組成物-電極黏合體之製造方法。
先前以來,作為表現出PTCR特性(正的比電阻溫度係數:Positive Temperature Coefficient of Resistivity)之材料,提出有於BaTiO3 中添加多種半導體化元素而成之組成物。該等組成物之居里溫度為120℃左右。再者,該等組成物必須根據用途而改變居里溫度。
例如,提出有於BaTiO3 中添加SrTiO3 而改變居里溫度之方法,但此時,居里溫度僅向負方向移動,而不向正方向移動。目前,作為使居里溫度向正方向移動之添加元素,已知有PbTiO3 。然而,PbTiO3 中含有會造成環境污染之元素,故而,近年來期望材料中不含PbTiO3
PTC材料之較大特徵在於:PTC材料之比電阻值於居里點會急遽升高(跳越特性=電阻溫度係數α),此特徵係因形成於晶界之電阻(蕭特基能障之電阻)增大而產生。作為PTC材料之特性,要求該比電阻值之跳越特性較強。
作為專利文獻1中所述之不含Pb之PTC材料,跳越特性優良者有室溫比電阻較高之傾向,而跳越特性不佳者有室溫比電阻過低之傾向,故而存在穩定之室溫比電阻及優良之跳越特性無法兼顧的問題。之前,發明者等人為了解決上述之先前的BaTiO3 系半導體瓷器的問題,作為可不使用Pb而將居里溫度向正方向移動、而且能使室溫電阻率大幅下降且能表現出優良的跳越特性的、BaTiO3 中的一部分Ba由Bi-Na取代之材料,提出如下所述之半導體瓷器組成物:BaTiO3 中的一部分Ba被Bi-Na取代、晶界具有P型半導體,組成式表示為[(BiNa)x (Ba1-y Ry )1-x ]TiO3 (其中,R為稀土類元素中的至少一種)且滿足0<x≦0.3、0<y≦0.02的半導體瓷器組成物,以及組成式表示為[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 (其中,M為Nb、Sb中的至少一種)且滿足0<x≦0.3、0<z≦0.005的半導體瓷器組成物(專利文獻2)。
該等半導體瓷器組成物,可不使用Pb而將居里溫度向正方向移動、降低室溫電阻率且亦能表現出優良之跳越特性,但當用作加熱器材料時,材料之電阻率會變化,亦即存在所謂時效變化之問題。關於該等BaTiO3 系半導體瓷器組成物,已知,若其中之含氧量發生變化則載體濃度亦會變化,從而使電阻率變化,因上述材料於惰性氣體環境中燒結,故而係於缺氧之狀態下燒結,若於大氣中使用則氧之缺失量會變化、而使電阻率容易變化。尤其是,當用作加熱器材料且於黏合有電極之狀態通電時,材料達到50℃~120℃之高溫時,大氣中之氧、或半導體瓷器組成物-電極間之氧會產生授受,從而會使室溫電阻率產生變化。
[專利文獻1]日本專利特開昭56-169301號公報
[專利文獻2]日本專利特願2007-333528號
本發明係關於一種由發明者等人提出之BaTiO3 中的一部分Ba被Bi-Na取代、晶界具有P型半導體之半導體瓷器組成物,其目的在於提供一種室溫電阻率較低(為100Ω‧cm以下)、通電時之時效變化較小的半導體瓷器組成物-電極黏合體。
解決上述問題之第一發明係一種半導體瓷器組成物-電極黏合體之製造方法,該半導體瓷器組成物-電極黏合體係於BaTiO3 中的一部分Ba被Bi-Na取代、晶界具有P型半導體之半導體瓷器組成物上黏合有電極者,該半導體瓷器組成物-電極黏合體之製造方法的特徵在於:於將電極黏合於半導體瓷器組成物之後,以100℃以上、600℃以下之溫度進行0.5小時以上、24小時以下的熱處理。於黏合有電極之狀態下進行熱處理,藉此,通電時元件達到高溫時,半導體瓷器組成物-大氣間以及半導體瓷器組成物-電極間之氧已預先接近化學平衡狀態,故而,通電時即便試料達到50~120℃之高溫,半導體瓷器組成物亦不會產生氧之授受,從而能抑制室溫電阻的變化。作為該熱處理之氣體環境,可為大氣中,亦可為氧氣中。若於電極黏合之前進行該熱處理,則半導體瓷器組成物-大氣間之氧接近化學平衡狀態,但電極黏合之後電極-半導體瓷器組成物間會產生氧的授受,故而室溫電阻率變化之抑制效果較小。而且,於低於100℃之熱處理溫度下,氧無法達到化學平衡狀態,而於高於600℃之熱處理溫度下,半導體瓷器組成物因高溫而變質、且室溫電阻率達到100Ω‧cm以上,從而難以適用於PTC加熱器等中,故而不佳。而且,若熱處理時間短於0.5小時,則氧無法接近化學平衡狀態,而若為24小時以上,則製造成本過高,故而不佳。
更佳的是,上述半導體瓷器組成物之組成式為[(BiNa)x (Ba1-y Ry )1-x ]TiO3 (其中,R為稀土類元素中的至少一種)、且滿足0<x≦0.3、0<y≦0.02。x表示(BiNa)之成分範圍,當x為0時無法使居里溫度向高溫側移動,若大於0.3時室溫電阻率接近102 Ω‧cm,從而難以適用於PTC加熱器等中,故而不佳。
上述R係稀土類元素中的至少一種,最佳為La。組成式中,y表示R之成分範圍,當y為0時組成物不會半導體化,而若超過0.02則室溫電阻率會變大,故而不佳。藉由使組成中之x、y滿足上述範圍,則能獲得室溫電阻率更小、跳越特性優良之半導體瓷器組成物,將該半導體瓷器組成物黏合於電極上之後,以100℃以上、600℃以下之溫度,進行0.5小時以上、24小時以下的熱處理,藉此,能獲得時效變化較佳、且室溫電阻較低(為100Ω‧cm以下)、跳越特性優良之半導體瓷器組成物-電極黏合體。
更佳為,第一發明之半導體瓷器組成物的組成式表示為[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 (其中,M為Nb、Sb中之至少一種)、且滿足0<x≦0.3、0<z≦0.005。x表示(BiNa)之成分範圍,當x為0時居里溫度無法向高溫側移動,而當超過0.3時則室溫電阻率接近102 Ω‧cm,從而難以適用於PTC加熱器等中,故而不佳。
而且,M係Nb、Sb中之至少一種,其中,較佳為Nb。組成式中之z表示M之成分範圍,當z為0時無法控制原子價、組成物不會半導體化,而當超過0.005時室溫電阻率會超過103 Ω‧cm,故而不佳。藉由將組成中之x、z滿足上述範圍,則能獲得室溫電阻率更小、跳越特性優良之半導體瓷器組成物,且將該半導體瓷器組成物黏合於電極之後,以100℃以上、600℃以下之溫度,進行0.5小時以上、24小時以下之熱處理,能獲得時效變化優良、且室溫電阻較低(為100Ω‧cm以下)、跳越特性優良之半導體瓷器組成物-電極黏合體。
根據本發明,可提供一種不使用Pb便可將室溫電阻率較低地維持為100Ω‧cm以下、且將以13V通電5000小時之情況下的時效變化抑制為10%以下的半導體瓷器組成物-電極黏合體。
本發明之半導體瓷器組成物,只要含有BaTiO3 中之一部分Ba被Bi-Na取代之任一種組成,則可採用任一種組成,但較佳為,組成式表示為[(BiNa)x (Ba1-y Ry )1-x ]TiO3 (其中,R係稀土類元素中的至少一種)、且滿足0<X≦0.3、0<y≦0.02,或者組成式表示為[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 (其中,M為Nb、Sb中之至少一種)且滿足0<x≦0.3、0<z≦0.005。以下,藉由實施例來對本發明進行具體說明,但該等實施例並不限制本發明。
本發明之特徵在於:上述BaTiO3 中的一部分Ba被Bi-Na取代之半導體瓷器組成物中,於晶界存在P型半導體。
關於P型半導體之存在,例如可藉由掃描型電容顯微鏡對半導體瓷器組成物之任意面進行觀察來確認。圖1~圖5係利用掃描型電容顯微鏡觀察本發明之半導體瓷器組成物的平面時之組織相片的圖。各圖中,以白色表示之部分為本組成物之主結晶,以灰色表示之部分為晶界,以深灰色表示之部分為P型半導體。根據圖1~圖5可知,晶界存在P型半導體。
以下,對於用以獲得本發明之半導體瓷器組成物的製造方法之一例進行說明。
首先,本發明中,當製造BaTiO3 中的一部分Ba被Bi-Na取代之半導體瓷器組成物時,採用如下分割煅燒法:分別準備由(BaR)TiO3 煅燒粉(半導體瓷器組成物之組成式為[(BiNa)x (Ba1-y Ry )1-x ]TiO3 時)或Ba(TiM)O3 煅燒粉(半導體瓷器組成物之組成式為[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 時)構成之BT煅燒粉、以及由(BiNa)TiO3 煅燒粉構成之BNT煅燒粉,對該BT煅燒粉及BNT煅燒粉分別以各自對應之適當的溫度進行煅燒。
使用上述分割煅燒法,可抑制BNT煅燒粉中Bi的揮散,能防止Bi-Na之組成產生偏差,從而能抑制異相之生成,將該等煅燒粉混合、使其成形,且進行燒結,從而能獲得室溫電阻率較低、居里溫度之不均得到抑制之半導體瓷器組成物。
當使用上述分割煅燒法獲得本發明之半導體瓷器組成物時,可採用以下之三種方法。(1)分割煅燒法中準備BT煅燒粉時,以BT煅燒粉中殘留一部分BaCO3 及TiO2 之方式進行調製的方法(以下,稱作「殘留法」);(2)於分割煅燒法中所製造之BT煅燒粉及/或BNT煅燒粉中,添加BaCO3 及/或TiO2 之方法(以下,稱作「添加法」);(3)於對分割煅燒法中所製造之BT煅燒粉及BNT煅燒粉進行燒結時,不使BT及BNT完全固溶而進行燒結之方法(以下,稱作「不完全燒結法」)。以下,對上述方法依序進行說明。
(1)殘留法
分割煅燒法中,當準備BT煅燒粉時,將BaCO3 、TiO2 與半導體化元素之原料粉末、例如La2 O3 或Nb2 O5 加以混合而製成混合原料粉末,且進行煅燒,為了形成完全單相,至此為止,係於900℃~1300℃之煅燒溫度範圍內實施。相對於此,殘留法係於更低之900℃以下之煅燒溫度實施,不完全形成(BaR)TiO3 或Ba(TiM)O3 ,而使煅燒粉中殘留一部分BaCO3 、TiO2
將殘留法之殘留有一部分BaCO3 、TiO2 之BT煅燒粉、與另外準備之BNT煅燒粉加以混合,形成混合煅燒粉,且進行燒結,藉此,能獲得本發明之BaTiO3 中的一部分Ba被Bi-Na取代、晶界具有P型半導體之半導體瓷器組成物。
當欲改變BT煅燒粉中之BaCO3 及TiO2 的殘留量時,於BT煅燒粉之準備步驟中,使煅燒溫度於900℃以下之範圍內改變、改變煅燒時間,或者改變BT煅燒粉之配合組成,藉此,能改變BT煅燒粉中之BaCO3 及TiO2 之殘留量,從而能控制P型半導體之存在率。
上述殘留法中,若煅燒溫度超過900℃,則會形成過多的(BaR)TiO3 或Ba(TiM)O3 ,而無法殘留BaCO3 、TiO2 ,故而不佳。煅燒時間較佳為0.5小時~10小時,更佳為2~6小時。
關於BT煅燒粉中之BaCO3 及TiO2 之殘留量,若將(BaR)TiO3 或Ba(TiM)O3 、BaCO3 及TiO2 之合計為100mol%,則BaCO3 較佳為30mol%以下、TiO2 較佳為30mol%以下。
將BaCO3 之殘留量設為30mol%以下之原因在於:若超過30mol%,則會產生BaCO3 以外之異相,室溫比電阻會上升。而且,燒結步驟中會產生CO2 氣體,燒結體產生龜裂,故而不佳。將TiO2 之殘留量設為30mol%以下之原因在於:若超過30mol%,則會產生BaCO3 以外之異相,室溫比電阻會上升。
BaCO3 及TiO2 之殘留量之上限為,BaCO3 為30mol%、TiO2 為30mol%,合計為60mol%,下限大於0,但當BaCO3 超過20mol%時,若TiO2 未滿10mol%,則會產生BaCO3 以外之異相,使室溫比電阻上升,故而不佳。若TiO2 超過20mol%、BaCO3 未滿10mol%,同樣亦不佳。故而,當BaCO3 或TiO2 中之一方超過20mol%時,為了將另一方達到10mol%以上,較佳為調整煅燒溫度或溫度、配合之組成等。
於與上述BaCO3 及TiO2 有一部分殘留之BT煅燒粉相混合之由(BiNa)TiO3 煅燒粉構成的BNT煅燒粉之準備步驟中,首先,將作為原料粉末之Na2 CO3 、Bi2 O3 、TiO2 加以混合,而製成混合原料粉末。此時,若添加過量的(例如超過5mol%)Bi2 O3 ,則煅燒時會生成異相,使室溫比電阻升高,故而不佳。
繼而,對上述混合原料粉末進行煅燒。煅燒溫度之範圍較佳為700℃~950℃。煅燒時間較佳為0.5小時~10小時,更佳為2小時~6小時。當煅燒溫度未滿700℃、或者煅燒時間未滿0.5小時之時,未反應之Na2 CO3 或分解而生成之NaO會與環境氣體中之水分反應、或者於濕式混合時與其溶劑反應,從而產生組成偏差或特性不均,故而不佳。而且,若煅燒溫度超過950℃、或者煅燒時間超過10小時,則Bi會揮散,產生組成偏差,促進異相之生成,故而不佳。
於上述各煅燒粉之準備步驟中,當混合原料粉末時,亦可根據原料粉末之粒度來進行粉碎。而且,關於混合、粉碎,可採用使用有純水或乙醇之濕式混合粉碎、或乾式混合粉碎中之任一種,若進行乾式混合粉碎,則能更好地防止組成偏差,故而較佳。再者,上述步驟中,作為原料粉末,可列舉BaCO3 、Na2 CO3 、TiO2 等,但亦可使用其他Ba化合物、Na化合物等。
如上所述,分別準備殘留一部分BaCO3 、TiO2 之BT煅燒粉及BNT煅燒粉,將各煅燒粉以規定量配合之後,加以混合。混合時,可採用使用有純水或乙醇之濕式混合或乾式混合中之任一種,若進行乾式混合,則能更好地防止組成偏差,故而較佳。而且,亦可根據煅燒粉之粒度,於混合之後進行粉碎、或者同時進行混合與粉碎。混合、粉碎之後,混合煅燒粉之平均粒度較佳為0.5μm~2.5μm。
於上述之BT煅燒粉之準備步驟及/或BNT煅燒粉之準備步驟、或者各煅燒粉之混合步驟中,若添加3.0mol%以下之Si氧化物、4.0mol%以下之Ca氧化物或Ca碳酸鹽,則Si氧化物能抑制晶粒之異常成長、且容易控制電阻率,能提高Ca氧化物或Ca碳酸鹽於低溫下之燒結性,而且,亦能控制還原性,故而較佳。若任一種物質添加超過上述限定量,則組成物不會半導體化,故而不佳。較佳為,於各步驟之混合之前進行添加。
藉由BT煅燒粉與BNT煅燒粉之混合步驟所得的混合煅燒粉,係藉由所需之成形手段而成形。於成形之前,亦可根據需要而利用造粒裝置形成粉碎粉。成形後之成形體密度較佳為2.5~3.5g/cm3
關於燒結,可於大氣中或還原氣體中、或者氧濃度較低之惰性氣體環境下進行,但尤佳為,於氧濃度未滿1%之氮氣或氬氣環境中進行燒結。燒結溫度較佳為1250℃~1380℃。燒結時間較佳為1小時~10小時,更佳為2小時~6小時。若任一條件不屬於較佳之範圍,則室溫比電阻會上升、且跳越特性會下降,故而不佳。
其他燒結步驟中,於溫度1290℃~1380℃、氧濃度未滿1%之環境中,(1)以未滿4小時之燒結時間執行,或者(2)以滿足式:△T≧25t(t=燒結時間(hr)、△T=燒結後之冷卻速度(℃/hr))之燒結時間執行,繼而,以滿足上述式之冷卻速度進行燒結後之冷卻,藉此,可獲得能維持較低之室溫比電阻、且高溫區域(居里溫度以上)之電阻溫度係數得到提高之半導體瓷器組成物。
(2)添加法
添加法中,於準備BT煅燒粉時,將BaCO3 、TiO2 與半導體化元素之原料粉末、例如La2 O3 或Nb2 O5 加以混合而製成混合原料粉末,且進行煅燒。煅燒溫度較佳為1000℃以上。當煅燒溫度未滿1000℃時,(BaR)TiO3 或Ba(TiM)O3 不會形成完全單相,故而不佳。若未形成完全單相,則未反應之BaCO3 、TiO2 會殘留,但因前提係添加BaCO3 粉及/或TiO2 粉,故難以預測其添加量,但允許殘留少許之BaCO3 或TiO2 。煅燒溫度較佳為1000℃~1300℃。煅燒時間較佳為0.5小時~10小時,更佳為2~6小時。
添加法中,BNT煅燒粉之準備步驟、BT煅燒粉與BNT煅燒粉之混合(粉碎)步驟等均與上述殘留法相同。
添加法之特徵在於:於以上述方式準備之BT煅燒粉或BNT煅燒粉、或者其等之混合煅燒粉中,添加BaCO3 及/或TiO2 。藉由使添加後之混合煅燒粉成形且進行燒結,而可獲得本發明之BaTiO3 中的一部分Ba被Bi-Na取代、晶界具有P型半導體之半導體瓷器組成物。
關於BaCO3 及/或TiO2 之添加量,當(BaR)TiO3 或Ba(TiM)O3 與BaCO3 及/或TiO2 合計為100mol%時,BaCO3 較佳為30mol%以下,TiO2 較佳為30mol%以下。藉由改變該添加量,可控制P型半導體之存在率。尤其是,根據添加法,可準確地調整添加量,故而亦具有能以極高之精度來控制室溫電阻率的效果。
將BaCO3 之添加量設為30mol%以下之原因在於:若超過30mol%,則會產生BaCO3 以外之異相,室溫比電阻會上升。而且,於燒結步驟中,會產生CO2 氣體,燒結體會產生龜裂,故而不佳。將TiO2 之添加量設為30mol%以下之原因在於:若超過30mol%,則會產生BaCO3 以外之異相,室溫比電阻會上升。
當含有BaCO3 及TiO2 該兩者時,添加量之上限為BaCO3 為30mol%、TiO2 為30mol%,合計為60mol%,下限大於0,但當BaCO3 超過20mol%時,若TiO2 未滿10mol%,則會產生BaCO3 以外之異相,室溫比電阻會上升,故而不佳。若TiO2 超過20mol%,BaCO3 未滿10mol%時,同樣亦不佳。故而,當BaCO3 或TiO2 中有一方超過20mol%時,較佳為另一方為10mol%以上。
再者,如上所述,BT煅燒粉較佳為(BaR)TiO3 或Ba(TiM)O3 均形成為完全單相,但若將形成為完全單相之BT煅燒粉中的一部分,由上述殘留法中之殘留有BaCO3 、TiO2 之BT煅燒粉來取代,進而添加規定量之BaCO3 及/或TiO2 ,藉此,亦可改變添加量。
添加法中,如上所述,分別準備BT煅燒粉及BNT煅燒粉之後,於該BT煅燒粉或BNT煅燒粉、或者其等之混合煅燒粉中添加BaCO3 及/或TiO2 。繼而,配合規定量之各煅燒粉之後,加以混合。混合時,可採用使用有純水或乙醇之濕式混合或乾式混合中之任一種,但當進行乾式混合時能防止組成偏差,故而較佳。而且,亦可根據煅燒粉之粒度,於混合之後進行粉碎、或者同時進行混合與粉碎。混合、粉碎後之混合煅燒粉的平均粒度較佳為0.5μm~2.5μm。
上述之BT煅燒粉之準備步驟及/或BNT煅燒粉之準備步驟、或該等煅燒粉之混合步驟中,若添加3.0mol%以下之Si氧化物、4.0mol%以下之Ca氧化物或Ca碳酸鹽,則Si氧化物能抑制晶粒之異常成長、能容易地控制電阻率,且Ca氧化物或Ca碳酸鹽能提高低溫下之燒結性,而且,亦能控制還原性,故而較佳。若任一種物質超過上述限定量,則組成物不會半導體化,故而不佳。較佳為,於各步驟之混合之前進行添加。
BT煅燒粉與BNT煅燒粉之混合步驟以後的成形、燒結等步驟,係與上述殘留法相同。
(3)不完全燒結法
不完全燒結法中,BT煅燒粉之準備步驟、BNT煅燒粉之準備步驟、BT煅燒粉與BNT煅燒粉之混合(粉碎)步驟、成形步驟,均與上述添加法相同。
不完全燒結法之特徵在於:當對BT煅燒粉與BNT煅燒粉之混合煅燒粉進行燒結時,不使BT與BNT完全固溶,而進行燒結。藉此,能獲得本發明之BaTiO3 中的一部分Ba被Bi-Na取代、晶界具有P型半導體之半導體瓷器組成物。
不完全燒結法中之燒結溫度、燒結時間,會根據BT煅燒粉之煅燒溫度而有所不同,但例如,當BT煅燒粉之煅燒溫度為700℃~1200℃時,燒結溫度之範圍較佳為1250℃~1380℃、燒結時間之範圍較佳為2.5小時以下。然而,當燒結溫度較低(例如為1300℃)時,較佳之燒結時間亦可為3.5小時以下;而當燒結溫度較高(例如為1380℃)時,較佳之燒結時間則為2小時以下。當燒結溫度高(例如為1400℃以上)、或燒結溫度低但燒結時間較長(例如為5小時以上)時,BT與BNT完全固溶,故而不佳。
如上所述,藉由控制燒結溫度及燒結時間,能改變BT及BNT之固溶度,藉此,能控制P型半導體之存在率。
[實施例]
(實施例1)
使用殘留法,以如下方式獲得半導體瓷器組成物。準備BaCO3 、TiO2 、La2 O3 之原料粉末,配合成(Ba0.994 La0.006 )TiO3 ,利用純水進行混合。將所得之混合原料粉末以900℃於大氣中煅燒4小時,以此準備BT煅燒粉。
準備Na2 CO3 、Bi2 O3 、TiO2 之原料粉末,配合成(Bi0.5 Na0.5 )TiO3 ,於乙醇中進行混合。將所得之混合原料粉末,以900℃於大氣中煅燒2小時,以此準備BNT煅燒粉。
將所準備之BT煅燒粉與BNT煅燒粉以莫耳比計配合成73:7,將純水作為介質,藉由罐磨機對混合煅燒粉進行混合、粉碎,以使其中心粒徑達到1.0μm~2.0μm,之後,使其乾燥。於該混合煅燒粉之粉碎粉中添加PVA並加以混合,之後,利用造粒裝置進行造粒。利用單軸壓製裝置使所得之造粒粉成形,對上述成形體以700℃進行脫黏合劑之後,以1360℃保持於氮氣中4小時,進行燒結,從而獲得燒結體。
將所得之燒結體加工成10mm×10mm×1mm之板狀,製成測試片,塗佈NAMICS製造之歐姆電極(型號:SR5051),進而,塗佈NAMICS製造之加罩電極(型號:SR5080),且以180℃進行乾燥之後,以600℃保持10分鐘,進行燒接而形成電極。之後,於大氣中以100℃進行0.5小時熱處理,從而獲得半導體瓷器組成物-電極黏合體。對所得之半導體瓷器組成物,測定25℃之電阻率,組裝至帶鋁翼之加熱器中,一面以4m/s之風速進行冷卻,一面進行13V、5000小時之通電測試。此時,翼片之溫度為70℃。通電測試後,測定25℃之電阻率,與通電測試之前進行比較,求出電阻變化率,找出時效變化。所得之結果如表1所示。熱處理後之室溫電阻率為50Ω‧cm,通電5000小時之後,室溫電阻率為54.5Ω‧cm、電阻變化率為9%。
實施例2~12係表示熱處理溫度及熱處理時間有改變之例示。其他半導體瓷器組成物-電極黏合體之製作方法及評估方法,均與實施例1中之方法相同。所得之結果如表1所示。
實施例13~17係表示BT煅燒粉及BNT煅燒粉之莫耳比有改變之例示。其他半導體瓷器組成物-電極黏合體之製作方法及評估方法,均與實施例1中之方法相同。所得之結果如表1所示。
實施例18係表示一部分Ti被Nb取代之例示。
(實施例18)
準備BaCO3 、TiO2 、Nb2 O3 之原料粉末,配合成Ba(Ti0.997 Nb0.003 )O3 ,利用純水加以混合。將所得之混合原料粉末以900℃於大氣中煅燒4小時,以此準備BT煅燒粉。
準備Na2 CO3 、Bi2 O3 、TiO2 之原料粉末,配合成(Bi0.5 Na0.5 )TiO3 ,於乙醇中加以混合。將所得之混合原料粉末,以900℃於大氣中煅燒2小時,以此準備BNT煅燒粉。
將所準備之BT煅燒粉與BNT煅燒粉以莫耳比計配合成73:7,將純水作為介質,且利用罐磨機對混合煅燒粉進行混合、粉碎,以使其中心粒徑達到1.0μm~2.0μm,之後,使其乾燥。於該混合煅燒粉之粉碎粉中添加PVA並加以混合之後,利用造粒裝置進行造粒。利用單軸壓製裝置使所得之造粒粉成形,對上述成形體以700℃進行脫黏合劑之後,以1360℃保持於氮氣中4小時,進行燒結,從而獲得燒結體。對所得之燒結體,利用與實施例1相同之方法形成電極,以300℃於大氣中熱處理3小時,從而獲得半導體瓷器組成物-電極黏合體。評估方法與實施例1相同。所得之結果如表1所示。
實施例19~23係表示一部分Ti被Nb取代、熱處理條件有改變之例示。其他半導體瓷器組成物-電極黏合體之製作方法及評估方法,均與實施例18之方法相同。所得之結果如表1所示。
實施例24係表示一部分Ti被Sb取代之例示。除了使用Sb2 O3 來代替Nb2 O3 之外,均以與實施例18相同之方法製作試料,且進行特性評估。所得之結果如表1所示。
比較例1係表示電極形成之後不進行熱處理之例示。除了不進行熱處理之外,均以與實施例1相同之製作方法獲得試料,且進行特性評估。所得之結果如表1所示。
比較例2~5係表示以本發明中所述之範圍以外的條件進行熱處理之例示。除了熱處理之條件有改變以外,均以與實施例相同之製作方法獲得試料,且進行特性評估。所得之結果如表1所示。
比較例6係表示於電極黏合之前進行熱處理之例示。
(比較例6)
利用與實施例1相同之方法燒結半導體瓷器組成物之後,以300℃進行熱處理3小時。之後,利用與實施例1相同之方法形成電極,且進行特性評估。所得之結果如表1所示。
由表1可知,本發明之實施例中,於任一種結構下,均可獲得室溫電阻率較低為100Ω‧cm以下、且能將以13V通電5000小時後之時效變化較低地抑制為10%以下的半導體瓷器組成物-電極黏合體。而且,由實施例1及比較例2可知,若熱處理溫度並非100℃以上,則無法將5000小時之通電測試後的時效變化抑制為10%以下;由實施例10及比較例3可知,若熱處理溫度高於600℃,則室溫電阻率會過高,達到100Ω‧cm以上。另外,將實施例5~8與比較例4進行比較可知,熱處理時間只要為0.5小時以上即可。但是,若熱處理時間超過24小時,則會導致製造成本過高,故而不佳。而且,由比較例6可知,即便於電極黏合之前進行熱處理,時效變化之抑制效果亦較小。
所有實施例及比較例中獲得之熱處理後之半導體瓷器組成物中,均於晶界具有P型半導體,且其面積濃度為0.01~10%之範圍內。
以上,係對本發明參照特定之實施態樣進行詳細說明,但業者應瞭解,可於不脫離本發明之精神及範圍的情況下,進行多種變更或修正。
本申請發明係基於2008年3月27日申請之日本專利申請(特願2008-082669),且其內容以參照的方式併入本文中。
(產業上之可利用性)
本發明所得之半導體瓷器組成物-電極黏合體,最適合用作PTC熱阻器、PTC加熱器、PTC開關、溫度檢測器等之材料。
圖1係利用掃描型電容顯微鏡觀察本發明之半導體瓷器組成物時之觀察影像的組織相片的圖。
圖2係利用掃描型電容顯微鏡觀察本發明之半導體瓷器組成物時之觀察影像的組織相片的圖。
圖3係利用掃描型電容顯微鏡觀察本發明之半導體瓷器組成物時之觀察影像的組織相片的圖。
圖4係利用掃描型電容顯微鏡觀察本發明之半導體瓷器組成物時之觀察影像的組織相片的圖。
圖5係利用掃描型電容顯微鏡觀察本發明之半導體瓷器組成物時之觀察影像的組織相片的圖。

Claims (4)

  1. 一種半導體瓷器組成物-電極黏合體之製造方法,該半導體瓷器組成物-電極黏合體係於不含Pb、BaTiO3 中之一部分Ba被Bi-Na取代而使晶界內具有P型半導體的半導體瓷器組成物上黏合有電極者;上述半導體瓷器組成物之組成式表示為[(BiNa)x (Ba1-y Ry )1-X ]TiO3 (其中,R為稀土類元素中的至少一種),且滿足0<x≦0.3、0<y≦0.02;該半導體瓷器組成物-電極黏合體之製造方法之特徵在於:於半導體瓷器組成物之燒結體上黏合電極之後,以300℃以上、600℃以下之溫度,實施0.5小時以上、24小時以下的熱處理。
  2. 一種半導體瓷器組成物-電極黏合體之製造方法,該半導體瓷器組成物-電極黏合體係於不含Pb、BaTiO3 中之一部分Ba被Bi-Na取代而使晶界內具有P型半導體的半導體瓷器組成物上黏合有電極者;上述半導體瓷器組成物之組成式表示為[(BiNa)x Ba1-x ][Ti1-z Mz ]O3 (其中,M為Nb、Sb中的至少一種),且滿足0<x≦0.3、0<z≦0.005;該半導體瓷器組成物-電極黏合體之製造方法之特徵在於:於半導體瓷器組成物之燒結體上黏合電極之後,以300℃以上、600℃以下之溫度,實施0.5小時以上、24小時以下的熱處理。
  3. 一種半導體瓷器組成物-電極黏合體,係藉申請專利範 圍第1或2項之製造方法所獲得者,其特徵為,室溫電阻率為100Ω.cm以下。
  4. 如申請專利範圍第3項之半導體瓷器組成物-電極黏合體,其中,以13V通電5000小時後的室溫電阻率的時效變化為10%以下。
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TW200947475A (en) 2009-11-16
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