TWI424552B - 三維立體堆疊晶片封裝結構 - Google Patents

三維立體堆疊晶片封裝結構 Download PDF

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TWI424552B
TWI424552B TW099147323A TW99147323A TWI424552B TW I424552 B TWI424552 B TW I424552B TW 099147323 A TW099147323 A TW 099147323A TW 99147323 A TW99147323 A TW 99147323A TW I424552 B TWI424552 B TW I424552B
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stacked
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Yu Wei Huang
Tsung Fu Yang
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Ind Tech Res Inst
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Description

三維立體堆疊晶片封裝結構
本發明是有關於一種封裝結構，且特別是有關於一種堆疊晶片的封裝結構。
半導體產業新興技術3DIC是指將晶片垂直重疊並以直通矽晶穿孔(through-silicon vias，TSV)技術來連結，該種方式旨在縮短晶片之間的導線、縮小元件尺寸並提高運作頻寬。3DIC技術能有效增加產品效能、減低功耗、降低成本、縮小體積，並能整合異質IC，而幫助建構完整立體堆疊晶片架構。
3DIC使用直通矽晶穿孔連結IC間的電性提供了非常高密度的垂直堆疊，使得兩晶粒間距僅數十微米，隨著焊球封裝技術朝更精細方向發展，維持可靠性所帶來的挑戰也愈來愈大。更小的焊球間距意味著每個連接的表面積更小，相較於採用更大焊球、具有更寬鬆間距的情況，這反過來會將機械應力集中到更小的面積上，衰退與熱週期會對焊接點產生機械應力，如果不對封裝/焊料接合之處進行恰當的工程處理，焊接點可能會斷裂。
傳統的晶片封裝使用的解決方法為在表面黏著元件下使用底膠填充技術(underfill)，適當的底膠材料選擇雖然可將IC與載板間的間隙填充，但堆疊的晶片如何能適當地點膠填充成為目前一大難題。
本發明提供一種堆疊晶片封裝結構，該封裝結構包括一基板、至少一晶片堆設置於該基板上、一擋牆結構位於該基板上，以及一底膠填充於該晶片堆相互堆疊之該些晶片間。該擋牆結構緊靠該晶片堆之至少一側邊，該擋牆結構具有至少一斜坡面，自該晶片堆中間高度以上延伸至該基板。
為讓本發明之上述特徵能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
本發明是關於整合式堆疊晶片封裝單元結構與其相關製程，使堆疊晶片各層間間隙均可充分被底膠填滿，可保護並提高堆疊晶片各焊球接點之可靠度，減少機械應力與熱應力集中在接點而造成斷裂的情形。
本案說明書中所謂”晶片”包含所有目前電子或半導體技藝領域中已知之晶片，較佳但不限於，薄化晶片、記憶體晶片或高射頻晶片。
圖1是依照本發明之一實施例的一種堆疊晶片封裝結構的立體示意圖。圖2是依照本發明之一實施例的一種堆疊晶片封裝單元結構的側面示意圖。圖3是依照本發明之另一實施例的堆疊晶片封裝結構的立體示意圖。
圖1所示乃是填充底膠之前的封裝結構10包括位於一基板100上之多個堆疊晶片110(圖中顯示四個晶片相互堆疊為一晶片堆110A，但實際晶片堆疊數目並不限為四)、位於晶片100之間的多數個凸塊120與設置在基板100上之至少一具坡度的擋牆結構200。多個晶片110堆疊設置在基板100上並以覆晶方式透過凸塊120相互電性連結。將晶片堆疊方向(亦即晶片之厚度方向)設為第一方向D1也是所謂垂直方向，而垂直於第一方向並沿著晶片110之一邊延伸的方向設為第二方向D2，而垂直於第一、第二方向乃為第三方向D3。基板100例如是印刷電路板或具一或多層線路的半導體基底，或者是材料為矽或為玻璃的載板(interposer)。
具坡度的該擋牆結構200乃是位於堆疊晶片110之側邊、位於晶片堆110A之間並緊靠堆疊晶片110，該擋牆結構200乃為具直角三角形側面之三角柱體結構並至少具有一斜坡面200S，其斜坡面200S乃自堆疊晶片堆110A最上層沿著晶片一邊(第二方向D2)斜向延伸至基板100，該斜坡面之坡度(傾斜度)乃是該擋牆結構200於第一方向D1之高度除以該擋牆結構200於第二方向D2延伸之長度。
由於該擋牆結構200之斜坡面200S乃自堆疊晶片堆110A最上層延伸至基板100，底膠填充灌注時乃利用此一斜坡面200S作為底膠流動通道，使底膠填充時可沿此斜坡面200S流動(底膠流動方向如箭頭所示)。圖2所示乃是填充底膠之後的封裝結構10。沿著擋牆結構200之斜坡面200S流動的底膠130藉由毛細作用填滿堆疊晶片110間之間隙，而完成底膠填充。
此處，該擋牆結構200乃是位於堆疊晶片110之側邊並緊靠堆疊晶片110，但此領域者可理解實際製作上該擋牆結構與堆疊晶片間可能有細微空隙，並非為密合或密封狀態。圖示中所繪示擋牆結構200乃等高於堆疊晶片堆110A最上層之上表面，但是其高度只需高於或等於堆疊晶片堆110A最上層之晶片與其下晶片間的最上層間隙即可，故所謂此處「最上層」乃是包括最上層晶片與最上層間隙之高度範圍。
圖3僅顯示出填充底膠之前的封裝結構10的部份，雖然圖中僅顯示出一晶片堆110A以方便該擋牆結構200之描述，但實際的封裝結構10可包括多個晶片堆110A。圖3中該擋牆結構200為具三角形側面之三角柱體結構並具有兩個斜坡面200S，其斜坡面200S乃自堆疊晶片堆110A最上層分別延伸至基板100。以擋牆結構200側面為等腰三角形來舉例，其斜坡面200S乃自堆疊晶片堆110A最上層分別沿著晶片一邊(順或逆著第二方向D2)斜向延伸至基板100，該斜坡面之坡度(傾斜度)乃是該擋牆結構200於第一方向D1之高度除以該擋牆結構200於第二方向D2延伸長度之一半。底膠填充灌注時乃利用此兩斜坡面200S作為底膠流動通道，使底膠填充時可沿此兩斜坡面200S流動(底膠流動方向如箭頭所示)。擋牆結構200之斜坡面200S與水平面(定義為基板100表面100a)具一夾角θ，該夾角θ介於0~90度間，乃依照擋牆結構之形狀與堆疊晶片堆之高度而變化。
圖4僅顯示出填充底膠之前的封裝結構10，包括一或多個晶片堆110A。圖4中該擋牆結構200可分為相連的梯形體部份200A與三角形體部份200B，分別緊靠晶片堆110A之兩側邊。其中梯形體部份200A為梯形側面之立體結構並具有一個斜坡面200AS，而與其相連的三角形體部份200B為具三角形側面之三角柱體結構並具有一個斜坡面200BS。其斜坡面200AS乃自堆疊晶片堆110A最上層沿著晶片一邊(第二方向D2)斜向延伸、轉折並以斜坡面200BS沿著晶片另一邊(第三方向D3)繼續延伸至基板100。以擋牆結構200A/200B側面為直角三角形來舉例，兩斜坡面200AS與200BS之坡度(傾斜度)可以不同或相同。底膠填充灌注時乃利用此相連的兩斜坡面200AS/200BS作為底膠流動通道，使底膠填充時可沿此兩斜坡面200AS/200BS流動(底膠流動方向如箭頭所示)。
圖5僅顯示出填充底膠之前的封裝結構10，包括一或多個晶片堆110A。圖5中該擋牆結構200可分為不相連的三角形體部份200A’與三角形體部份200B’，分別緊靠晶片堆110A之兩側邊。其中三角形體部份200A’為三角形側面之三角柱體結構並具有一個斜坡面200AS’，斜坡面200AS’乃自堆疊晶片堆110A最上層沿著晶片一邊(第二方向D2)斜向延伸至基板100。與其分離的三角形體部份200B’為具三角形側面之另一三角柱體結構並具有一個斜坡面200BS’。其斜坡面200BS’乃自堆疊晶片堆110A之中層沿著晶片另一邊(第三方向D3)斜向延伸至基板100。兩斜坡面200AS’與200BS’之坡度(傾斜度)並不相同。底膠填充灌注時乃可選擇性利用兩斜坡面200AS’/200BS’之任一者作為底膠流動通道。例如，先選擇斜坡面200BS’來填充下兩層晶片間的間隙，而底膠填充時沿斜坡面200BS’流動(底膠流動方向如箭頭所示)。後續，可以選擇相同或不相同之底膠材料，將另一底膠沿斜坡面200AS’流動而填入上層晶片間的間隙中。
如此，可以針對不同功能晶片或不同尺寸晶片，來提供不同的底膠材料，得以提供更好的封裝功能。
本案實施例中該擋牆結構乃緊靠堆疊晶片堆之至少一側邊或兩側邊，但是，該擋牆結構當然亦可以設計成緊靠堆疊晶片堆之三側邊或四側邊。同樣地，本案實施例中該擋牆結構乃是設計具有斜坡面以幫助底膠填充，但是，亦可以理解的是，該擋牆結構200也可以設計成具有階梯式的斜坡道200L(如圖6A-6B所示)以類似於上述實施例之配置方式緊靠配置於堆疊晶片堆110A之側邊，而以相同機制來幫助底膠填充。
本案所示之封裝結構或方法特別適用於使用直通矽晶穿孔連結晶片的堆疊封裝架構，因為其晶粒間距狹窄，而一般底膠填充方式難以封填完全，故使用本案之擋牆結構可以幫助底膠填充完全，而強化封裝結構。
一般而言，底膠膠體的材料可為熱固性高分子例如是環氧樹脂、氰酸脂樹脂以及壓克力樹脂等。而本案所用以形成擋牆結構200之材料可以是具高搖變性(thixotropy)的膠材，例如是：高搖變性環氧樹脂類，一般來說，當此類環氧樹脂受到剪切力作用時，其黏度可降成原來的50%以上，待其剪切作用力停止，此環氧樹脂隨即回覆為原來之黏度特性，如此即可歸類為高搖變性環氧樹脂。本案擋牆結構200之高搖變性膠材的黏度範圍在100,000cps~1,300,000cps應高於底膠膠體材料的黏度，其範圍在5000cps~25,000cps左右。
由於擋牆結構是以高搖變性的膠材形成，可以利用例如點膠(dispensing)或灌模(molding)方式來形成。而若利用點膠方式形成，可使用點膠機(dispenser)來快速量產製作，與現行製程相容。
本案堆疊晶片封裝結構若後續製程需要進行單體化或切割時，因擋牆結構是以高搖變性的膠材形成，此一擋牆結構可同樣被切割而不損及堆疊晶片堆之整體結構，當然也不至於損及封裝結構或晶片接點。
本案使用高搖變性膠體進行製作擋牆結構，而且評估至少兩種不同高搖變性的膠材，以測試點膠法形成擋牆結構之可行性，結果顯示於表1。
結果發現需藉由選擇適當的點膠針孔孔徑，方能得到理想的擋牆形狀。當點膠針孔孔徑介於0.8~1.6mm時，其所形成的擋牆高度可介於0.5～1.5mm。點膠所形成的擋牆結構高度能大於1mm，甚至高至2mm。因此，點膠法所形成的擋牆結構確實足夠高且可以穩定緊靠晶片堆側面。
以上實施例提供一種堆疊晶片的封裝結構，藉由整合擋牆結構至封裝結構中，可以幫助底膠之填充完全並避免底膠填充時氣泡或空隙殘存，而可以提高封裝結構接點可靠度。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，故本發明之保護範圍當視後附之申請專利範圍所界定者為準。
10‧‧‧堆疊晶片封裝結構
100‧‧‧基板
110‧‧‧晶片
110A‧‧‧晶片堆
120‧‧‧凸塊
130‧‧‧底膠
200‧‧‧擋牆結構
200A‧‧‧梯形體部份
200B、200A’、200B’‧‧‧三角形體部份
200S、200AS、200BS、200AS’、200BS’‧‧‧斜坡面
200L‧‧‧斜坡道
D1‧‧‧第一方向
D2‧‧‧第二方向
D3‧‧‧第三方向
圖1是依照本發明之一實施例的一種堆疊晶片封裝結構的立體示意圖。
圖2是是依照本發明之一實施例的一種堆疊晶片封裝單元結構的側面示意圖。
圖3是依照本發明之另一實施例的堆疊晶片封裝結構的部份立體示意圖。
圖4是依照本發明之又一實施例的堆疊晶片封裝結構的部份立體示意圖。
圖5是依照本發明之另一實施例的堆疊晶片封裝結構的部份立體示意圖。
圖6A-6B是依照本發明之又一實施例的擋牆結構的立體示意圖。
10‧‧‧堆疊晶片封裝結構
100‧‧‧基板
110‧‧‧晶片
110A‧‧‧晶片堆
120‧‧‧凸塊
200‧‧‧擋牆結構
200S‧‧‧斜坡面
D1‧‧‧第一方向
D2‧‧‧第二方向
D3‧‧‧第三方向

Claims (12)

  1. 一種堆疊晶片封裝結構，包含：至少一晶片堆設置於一基板上，該晶片堆至少包括二晶片以一第一方向堆疊構裝於該基板上；一擋牆結構位於該基板上，其中該擋牆結構緊靠該晶片堆之至少一側面，該擋牆結構具有至少一斜坡面，該斜坡面自該晶片堆中間高度以上沿著該晶片堆之該側面斜向延伸至該基板；以及一底膠填充於該晶片堆相互堆疊之該些晶片間。
  2. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該擋牆結構為具一直角三角形側面之一三角柱體結構，具有一斜坡面。
  3. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該擋牆結構為具一等腰三角形側面之一三角柱體結構，具有兩斜坡面。
  4. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該擋牆結構包括一梯形體部份以及與該梯形體部份相連的一三角形體部份，該梯形體部份緊靠該晶片堆之該側面並具有一第一斜坡面，而該三角形體部份緊靠該晶片堆之另一側面並具一第二斜坡面，該第一斜坡面與其相連的該第二斜坡面分別自該晶片堆中間高度以上沿著該晶片堆之相連的該側面與該另一側面斜向延伸至該基板。
  5. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該擋牆結構包括一第一三角形體部份與一第二三角形 體部份，該第一三角形體部份緊靠該晶片堆之該側面並具有一第一斜坡面，而該第二三角形體部份緊靠該晶片堆之另一側面並具一第二斜坡面，該第一斜坡面自該晶片堆中間高度以上沿著該晶片堆之該側面斜向延伸至該基板，而該第二斜坡面自該晶片堆中層沿著該晶片堆之該另一側面斜向延伸至該基板。
  6. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該擋牆結構位於兩個晶片堆之間，同時緊靠該兩個晶片堆。
  7. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該基板可為半導體基底、載板或印刷電路板。
  8. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該擋牆結構的材料包括一高搖變性膠材，該高搖變性膠材的黏度高於該底膠材料的黏度。
  9. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該擋牆結構更包括一階梯式的斜坡道。
  10. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該晶片為一薄化晶片、一記憶體晶片或一高射頻晶片。
  11. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該晶片堆至少包括二晶片透過覆晶方式電性連結並以該第一方向堆疊構裝於該基板上。
  12. 如申請專利範圍第1項所述之堆疊晶片封裝結構，其中該擋牆結構自該晶片堆最上層延伸至該基板。
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