TWI421679B - 錯誤校正裝置及方法 - Google Patents

錯誤校正裝置及方法 Download PDF

Info

Publication number
TWI421679B
TWI421679B TW096103282A TW96103282A TWI421679B TW I421679 B TWI421679 B TW I421679B TW 096103282 A TW096103282 A TW 096103282A TW 96103282 A TW96103282 A TW 96103282A TW I421679 B TWI421679 B TW I421679B
Authority
TW
Taiwan
Prior art keywords
error correction
memory
error
memory location
status indicator
Prior art date
Application number
TW096103282A
Other languages
English (en)
Chinese (zh)
Other versions
TW200801932A (en
Inventor
William C Moyer
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=38475622&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=TWI421679(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200801932A publication Critical patent/TW200801932A/zh
Application granted granted Critical
Publication of TWI421679B publication Critical patent/TWI421679B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/1052—Bypassing or disabling error detection or correction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
TW096103282A 2006-02-21 2007-01-30 錯誤校正裝置及方法 TWI421679B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/359,329 US7617437B2 (en) 2006-02-21 2006-02-21 Error correction device and method thereof

Publications (2)

Publication Number Publication Date
TW200801932A TW200801932A (en) 2008-01-01
TWI421679B true TWI421679B (zh) 2014-01-01

Family

ID=38475622

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096103282A TWI421679B (zh) 2006-02-21 2007-01-30 錯誤校正裝置及方法

Country Status (5)

Country Link
US (1) US7617437B2 (enExample)
JP (1) JP5232018B2 (enExample)
KR (1) KR101291525B1 (enExample)
TW (1) TWI421679B (enExample)
WO (1) WO2007103590A2 (enExample)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7783955B2 (en) * 2006-01-18 2010-08-24 Sandisk Il Ltd. Method for implementing error-correction codes in flash memory
KR100972807B1 (ko) * 2006-01-31 2010-07-29 후지쯔 가부시끼가이샤 에러 정정 코드 생성 방법 및 메모리 관리 장치
US8725975B2 (en) * 2007-01-03 2014-05-13 Freescale Semiconductor, Inc. Progressive memory initialization with waitpoints
EP2169555A4 (en) * 2007-06-20 2011-01-05 Fujitsu Ltd CACHE CONTROL, CACHE CONTROL PROCEDURE AND CACHE CONTROL PROGRAM
US8239732B2 (en) * 2007-10-30 2012-08-07 Spansion Llc Error correction coding in flash memory devices
FR2928769B1 (fr) * 2008-03-14 2012-07-13 Airbus France Dispositif permettant l'utilisation d'un composant programmable dans un environnement radiatif naturel
US8122308B2 (en) * 2008-06-25 2012-02-21 Intel Corporation Securely clearing an error indicator
US8112649B2 (en) * 2009-03-17 2012-02-07 Empire Technology Development Llc Energy optimization through intentional errors
JP4905510B2 (ja) * 2009-06-29 2012-03-28 富士通株式会社 ストレージ制御装置及びストレージ装置のデータ回復方法
US8738995B2 (en) 2009-09-10 2014-05-27 Hewlett-Packard Development Company, L.P. Memory subsystem having a first portion to store data with error correction code information and a second portion to store data without error correction code information
JP4837121B1 (ja) * 2010-06-23 2011-12-14 株式会社東芝 データ記憶装置及びデータ書き込み方法
US8990660B2 (en) 2010-09-13 2015-03-24 Freescale Semiconductor, Inc. Data processing system having end-to-end error correction and method therefor
US8549379B2 (en) 2010-11-19 2013-10-01 Xilinx, Inc. Classifying a criticality of a soft error and mitigating the soft error based on the criticality
US8738993B2 (en) * 2010-12-06 2014-05-27 Intel Corporation Memory device on the fly CRC mode
US8560892B2 (en) * 2010-12-14 2013-10-15 Medtronic, Inc. Memory with selectively writable error correction codes and validity bits
US8566672B2 (en) 2011-03-22 2013-10-22 Freescale Semiconductor, Inc. Selective checkbit modification for error correction
US8607121B2 (en) * 2011-04-29 2013-12-10 Freescale Semiconductor, Inc. Selective error detection and error correction for a memory interface
US8990657B2 (en) 2011-06-14 2015-03-24 Freescale Semiconductor, Inc. Selective masking for error correction
US8522091B1 (en) 2011-11-18 2013-08-27 Xilinx, Inc. Prioritized detection of memory corruption
US9612901B2 (en) * 2012-03-30 2017-04-04 Intel Corporation Memories utilizing hybrid error correcting code techniques
US9411678B1 (en) * 2012-08-01 2016-08-09 Rambus Inc. DRAM retention monitoring method for dynamic error correction
MY180992A (en) 2013-03-13 2020-12-15 Intel Corp Memory latency management
US9600191B2 (en) * 2014-06-02 2017-03-21 Micron Technology, Inc. Systems and methods for reordering packet transmissions in a scalable memory system protocol
US9852811B2 (en) * 2014-11-13 2017-12-26 Macronix International Co., Ltd. Device and method for detecting controller signal errors in flash memory
US9423972B2 (en) * 2014-11-17 2016-08-23 Freescale Semiconductor, Inc. Error recovery in a data processing system which implements partial writes
CN105607726B (zh) * 2015-12-24 2018-11-23 浪潮(北京)电子信息产业有限公司 一种降低高性能计算集群内存功耗的方法及装置
US11990199B2 (en) * 2021-01-21 2024-05-21 Micron Technology, Inc. Centralized error correction circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200517836A (en) * 2003-11-18 2005-06-01 Jtek Technology Corp Buffer control framework and method between different memories
TW200535605A (en) * 2004-04-23 2005-11-01 Taiwan Semiconductor Mfg System and method for real-time fault detection, classification, and correction in a semiconductor manufacturing environment
TW200601348A (en) * 2004-06-30 2006-01-01 Hon Hai Prec Ind Co Ltd System and method for testing memory

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6384647U (enExample) * 1986-11-21 1988-06-03
JPH04364552A (ja) * 1991-06-12 1992-12-16 Nec Corp パリティ監視回路付きメモリ回路
JPH10289164A (ja) * 1997-04-16 1998-10-27 Mitsubishi Electric Corp メモリ制御方法およびメモリ制御装置
US6119248A (en) * 1998-01-26 2000-09-12 Dell Usa L.P. Operating system notification of correctable error in computer information
US7334179B2 (en) * 2004-06-04 2008-02-19 Broadcom Corporation Method and system for detecting and correcting errors while accessing memory devices in microprocessor systems
US20060143551A1 (en) * 2004-12-29 2006-06-29 Intel Corporation Localizing error detection and recovery

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200517836A (en) * 2003-11-18 2005-06-01 Jtek Technology Corp Buffer control framework and method between different memories
TW200535605A (en) * 2004-04-23 2005-11-01 Taiwan Semiconductor Mfg System and method for real-time fault detection, classification, and correction in a semiconductor manufacturing environment
TW200601348A (en) * 2004-06-30 2006-01-01 Hon Hai Prec Ind Co Ltd System and method for testing memory

Also Published As

Publication number Publication date
KR20080098613A (ko) 2008-11-11
US7617437B2 (en) 2009-11-10
JP5232018B2 (ja) 2013-07-10
JP2009527820A (ja) 2009-07-30
WO2007103590A2 (en) 2007-09-13
TW200801932A (en) 2008-01-01
KR101291525B1 (ko) 2013-08-08
WO2007103590A3 (en) 2008-12-04
US20070220354A1 (en) 2007-09-20

Similar Documents

Publication Publication Date Title
TWI421679B (zh) 錯誤校正裝置及方法
EP1449082B1 (en) Error correcting memory and method of operating same
CN111880736B (zh) 一种固态硬盘访问方法、装置、设备及介质
US8959417B2 (en) Providing low-latency error correcting code capability for memory
US20080177938A1 (en) Hybrid hard disk drive, computer system including the same, and flash memory DMA circuit for hybrid HDD
US20070268905A1 (en) Non-volatile memory error correction system and method
US7404137B2 (en) Method and related apparatus for performing error checking-correcting
TWI554886B (zh) 資料保護方法、記憶體控制電路單元及記憶體儲存裝置
US9064606B2 (en) Memory interface supporting both ECC and per-byte data masking
KR101141487B1 (ko) 집적 메모리 제어기의 결함 메모리 디바이스들과의 투과성 동작 인에이블링
CN1963950A (zh) 具有ecc功能的半导体存储设备
US8555050B2 (en) Apparatus and method thereof for reliable booting from NAND flash memory
JP3922844B2 (ja) キャッシュｔａｇ制御方法及びこの制御方法を用いた情報処理装置
US6901551B1 (en) Method and apparatus for protection of data utilizing CRC
WO2003098439A2 (en) Method and apparatus for providing error correction within a register file of a cpu
US7689895B2 (en) On-the fly error checking and correction CODEC system and method for supporting non-volatile memory
CN103593252B (zh) 具有动态错误侦测及更正的存储器
US20190340060A1 (en) Systems and methods for adaptive proactive failure analysis for memories
WO2024198468A1 (zh) 内存纠错方法、内存条、内存控制器和处理器
CN205541960U (zh) 一种与非型闪存中坏列的处理装置及与非型闪存
CN107943415A (zh) 基于fat文件系统的查找空闲簇的方法和系统
JP4131928B2 (ja) データ記憶制御方法および装置
JPH05108496A (ja) パトロール制御方式
JPH06103469B2 (ja) メモリ制御回路
JPH06250936A (ja) コンピュータシステム

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees