JP5232018B2 - エラー処理方法およびエラー処理装置 - Google Patents

エラー処理方法およびエラー処理装置 Download PDF

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Publication number
JP5232018B2
JP5232018B2 JP2008555429A JP2008555429A JP5232018B2 JP 5232018 B2 JP5232018 B2 JP 5232018B2 JP 2008555429 A JP2008555429 A JP 2008555429A JP 2008555429 A JP2008555429 A JP 2008555429A JP 5232018 B2 JP5232018 B2 JP 5232018B2
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Japan
Prior art keywords
error
memory
write request
storage area
error correction
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JP2008555429A
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English (en)
Japanese (ja)
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JP2009527820A5 (enExample
JP2009527820A (ja
Inventor
シー． モイヤー、ウィリアム
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NXP USA Inc
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NXP USA Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/1052—Bypassing or disabling error detection or correction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP2008555429A 2006-02-21 2007-01-18 エラー処理方法およびエラー処理装置 Expired - Fee Related JP5232018B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/359,329 2006-02-21
US11/359,329 US7617437B2 (en) 2006-02-21 2006-02-21 Error correction device and method thereof
PCT/US2007/060659 WO2007103590A2 (en) 2006-02-21 2007-01-18 Error correction device and method thereof

Publications (3)

Publication Number Publication Date
JP2009527820A JP2009527820A (ja) 2009-07-30
JP2009527820A5 JP2009527820A5 (enExample) 2010-02-18
JP5232018B2 true JP5232018B2 (ja) 2013-07-10

Family

ID=38475622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008555429A Expired - Fee Related JP5232018B2 (ja) 2006-02-21 2007-01-18 エラー処理方法およびエラー処理装置

Country Status (5)

Country Link
US (1) US7617437B2 (enExample)
JP (1) JP5232018B2 (enExample)
KR (1) KR101291525B1 (enExample)
TW (1) TWI421679B (enExample)
WO (1) WO2007103590A2 (enExample)

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US7783955B2 (en) * 2006-01-18 2010-08-24 Sandisk Il Ltd. Method for implementing error-correction codes in flash memory
WO2007088597A1 (ja) * 2006-01-31 2007-08-09 Fujitsu Limited エラー訂正コード生成方法及びメモリ管理装置
US8725975B2 (en) * 2007-01-03 2014-05-13 Freescale Semiconductor, Inc. Progressive memory initialization with waitpoints
WO2008155850A1 (ja) * 2007-06-20 2008-12-24 Fujitsu Limited キャッシュ制御装置、キャッシュ制御方法およびキャッシュ制御プログラム
US8239732B2 (en) * 2007-10-30 2012-08-07 Spansion Llc Error correction coding in flash memory devices
FR2928769B1 (fr) * 2008-03-14 2012-07-13 Airbus France Dispositif permettant l'utilisation d'un composant programmable dans un environnement radiatif naturel
US8122308B2 (en) * 2008-06-25 2012-02-21 Intel Corporation Securely clearing an error indicator
US8112649B2 (en) * 2009-03-17 2012-02-07 Empire Technology Development Llc Energy optimization through intentional errors
JP4905510B2 (ja) * 2009-06-29 2012-03-28 富士通株式会社 ストレージ制御装置及びストレージ装置のデータ回復方法
WO2011031260A1 (en) * 2009-09-10 2011-03-17 Hewlett-Packard Development Company, L.P. Memory subsystem having a first portion to store data with error correction code information and a second portion to store data without error correction code information
JP4837121B1 (ja) * 2010-06-23 2011-12-14 株式会社東芝 データ記憶装置及びデータ書き込み方法
US8990660B2 (en) 2010-09-13 2015-03-24 Freescale Semiconductor, Inc. Data processing system having end-to-end error correction and method therefor
US8549379B2 (en) * 2010-11-19 2013-10-01 Xilinx, Inc. Classifying a criticality of a soft error and mitigating the soft error based on the criticality
US8738993B2 (en) * 2010-12-06 2014-05-27 Intel Corporation Memory device on the fly CRC mode
US8560892B2 (en) * 2010-12-14 2013-10-15 Medtronic, Inc. Memory with selectively writable error correction codes and validity bits
US8566672B2 (en) 2011-03-22 2013-10-22 Freescale Semiconductor, Inc. Selective checkbit modification for error correction
US8607121B2 (en) * 2011-04-29 2013-12-10 Freescale Semiconductor, Inc. Selective error detection and error correction for a memory interface
US8990657B2 (en) 2011-06-14 2015-03-24 Freescale Semiconductor, Inc. Selective masking for error correction
US8522091B1 (en) 2011-11-18 2013-08-27 Xilinx, Inc. Prioritized detection of memory corruption
US9612901B2 (en) * 2012-03-30 2017-04-04 Intel Corporation Memories utilizing hybrid error correcting code techniques
US9411678B1 (en) * 2012-08-01 2016-08-09 Rambus Inc. DRAM retention monitoring method for dynamic error correction
MY180992A (en) * 2013-03-13 2020-12-15 Intel Corp Memory latency management
US9733847B2 (en) * 2014-06-02 2017-08-15 Micron Technology, Inc. Systems and methods for transmitting packets in a scalable memory system protocol
US9852811B2 (en) 2014-11-13 2017-12-26 Macronix International Co., Ltd. Device and method for detecting controller signal errors in flash memory
US9423972B2 (en) * 2014-11-17 2016-08-23 Freescale Semiconductor, Inc. Error recovery in a data processing system which implements partial writes
CN105607726B (zh) * 2015-12-24 2018-11-23 浪潮(北京)电子信息产业有限公司 一种降低高性能计算集群内存功耗的方法及装置
US11990199B2 (en) * 2021-01-21 2024-05-21 Micron Technology, Inc. Centralized error correction circuit

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6384647U (enExample) * 1986-11-21 1988-06-03
JPH04364552A (ja) * 1991-06-12 1992-12-16 Nec Corp パリティ監視回路付きメモリ回路
JPH10289164A (ja) * 1997-04-16 1998-10-27 Mitsubishi Electric Corp メモリ制御方法およびメモリ制御装置
US6119248A (en) * 1998-01-26 2000-09-12 Dell Usa L.P. Operating system notification of correctable error in computer information
TW200517836A (en) * 2003-11-18 2005-06-01 Jtek Technology Corp Buffer control framework and method between different memories
US6980873B2 (en) * 2004-04-23 2005-12-27 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for real-time fault detection, classification, and correction in a semiconductor manufacturing environment
US7334179B2 (en) * 2004-06-04 2008-02-19 Broadcom Corporation Method and system for detecting and correcting errors while accessing memory devices in microprocessor systems
TWI294126B (en) * 2004-06-30 2008-03-01 Hon Hai Prec Ind Co Ltd System and method for testing memory
US20060143551A1 (en) * 2004-12-29 2006-06-29 Intel Corporation Localizing error detection and recovery

Also Published As

Publication number Publication date
TWI421679B (zh) 2014-01-01
US20070220354A1 (en) 2007-09-20
WO2007103590A2 (en) 2007-09-13
WO2007103590A3 (en) 2008-12-04
US7617437B2 (en) 2009-11-10
JP2009527820A (ja) 2009-07-30
KR20080098613A (ko) 2008-11-11
KR101291525B1 (ko) 2013-08-08
TW200801932A (en) 2008-01-01

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