TWI410637B - Area array probe card - Google Patents
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- TWI410637B TWI410637B TW98131432A TW98131432A TWI410637B TW I410637 B TWI410637 B TW I410637B TW 98131432 A TW98131432 A TW 98131432A TW 98131432 A TW98131432 A TW 98131432A TW I410637 B TWI410637 B TW I410637B
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本案是關於一種陣列式探針卡,特別是關於應用在積體電路測試領域的陣列式探針卡。This case is about an array probe card, especially for array probe cards used in the field of integrated circuit testing.
在LED、半導體等測試領域的測試機中,一般是使用陣列式探針卡電性連接至測試機之輸入及輸出端子,藉由探針卡之探針接觸積體電路待測物後,再由測試機傳送電子信號給予待測積體電路,達到測試機進行測試的目的。In testers such as LEDs and semiconductors, the array probe card is generally used to electrically connect to the input and output terminals of the tester. After the probe of the probe card contacts the integrated circuit, the object is tested. The electronic signal is transmitted from the test machine to the integrated circuit to be tested, and the test machine is used for testing purposes.
美國專利編號5,525,911號案件提出了一種陣列式探針卡,在這種陣列式探針卡中,雖然使用同軸線來電性連接於電路板與待測積體電路之間,但由於並非所有的線路都需要使用到高頻信號,因此當所使用的同軸線的線徑過大時,將極不利於陣列式探針的間距之微小化。此外,既使在其他無須使用高頻信號的線路中使用單心線或漆包線,但在多接腳數的探針卡中、印刷電路板的開口大小有限的情況下,將使得信號線紊亂交錯,甚至有相互拉扯斷裂的危險,同時也增加了加工的困難、與電訊號相互干擾的風險。U.S. Patent No. 5,525,911 proposes an array probe card in which, although a coaxial line is used to electrically connect between the circuit board and the integrated circuit to be tested, not all lines are used. It is necessary to use a high frequency signal, so when the diameter of the coaxial line used is too large, it will be extremely disadvantageous for miniaturization of the pitch of the array probe. In addition, even if a single-core or enameled wire is used in other lines that do not need to use high-frequency signals, in the case of a multi-pin number probe card, the opening size of the printed circuit board is limited, the signal lines are disorderly interleaved. There is even the danger of pulling each other apart, and it also increases the difficulty of processing and the risk of interference with the electrical signal.
日本專利編號H10-048298號案件提出了另一種陣列式探針卡,在這種陣列式探針卡中,在探針卡的探針針數因為待測積體電路的複雜化或多晶粒同時測試而隨著增加時,稱為MLO/MLC(Multi-Layer Organic/Multi-Layer Ceramic)的測試基板162必須放入更多的信號線路(trace);如此,MLO/MLC測試基板勢必得擴大面積,此時,測試基板162上的焊點與探針卡164下方的墊片必須以迴銲(reflow)方式進行電信號連結,但MLO/MLC測試基板的面積擴大將造成迴銲得克難『大基板均溫性不佳』的難點,所謂『大基板均溫性不佳』是指至於測試基板162與探針卡164之間被夾置的錫球,在迴銲(reflow)的升溫過程,錫球不容易達到一致的溫度;此外,印刷電路板因為結構、技術受限,其內部線路也無法傳遞如2GHz以上的高頻信號。Another array probe card is proposed in Japanese Patent No. H10-048298. In this array of probe cards, the number of probe pins in the probe card is complicated or multi-grain due to the integrated circuit to be tested. At the same time, as the test substrate 162 called MLO/MLC (Multi-Layer Organic/Multi-Layer Ceramic) is added, more signal lines must be placed; thus, the MLO/MLC test substrate is bound to expand. Area, at this time, the solder joint on the test substrate 162 and the gasket under the probe card 164 must be electrically connected by reflow, but the expansion of the MLO/MLC test substrate will cause reflow soldering. "Difficulty in the poor temperature uniformity of the large substrate" means that the solder ball that is interposed between the test substrate 162 and the probe card 164 is heated at the reflow. In the process, the solder ball does not easily reach a uniform temperature; in addition, due to the limited structure and technology, the printed circuit board cannot transmit high-frequency signals such as 2 GHz or more.
IBM於2001年06月在技術報告中提出了一種陣列式探針卡,是將連接於測試基板與測試機之間的線路分成二部分:一部分走高速線路,另一部分走印刷電路板的內部。在這種陣列式探針卡中,高速連接器是設置於MLO測試基板上,兩者均至於印刷電路板下方。但當高速連接器設置於印刷電路板下方時,測試機的高速連接器卻位於印刷電路板上方,這將與實際的探針環境衝突,因為測試機的高速連接器與測試基板上之高速連接器分別位於印刷電路板兩側,無法相互連結;所以IBM所提之架構,僅於實驗階段之探針卡,未考慮量產測試之問題。In June 2001, IBM presented an array probe card in a technical report that splits the line connecting the test substrate to the test machine into two parts: one part goes to the high-speed line and the other part goes inside the printed circuit board. In this array of probe cards, the high speed connectors are placed on the MLO test substrate, both below the printed circuit board. However, when the high-speed connector is placed under the printed circuit board, the high-speed connector of the tester is located above the printed circuit board, which will conflict with the actual probe environment because of the high-speed connection between the high-speed connector of the test machine and the test substrate. The devices are located on both sides of the printed circuit board and cannot be connected to each other; therefore, the architecture proposed by IBM is only for the probe card in the experimental stage, and the problem of mass production testing is not considered.
請參閱第一圖,其為一種習用的陣列式探針卡的側視圖。在第一圖中,陣列式探針卡1主要是由電路板10、測試基板11、探針頭12、及探針線13所構成,測試基板11上設有焊點111以及接座112,而電路板10設有一貫通孔103可容置該接座112。藉由測試機14的接頭141與接座112電連接,便能夠使用測試機14進行高速電性測試。Please refer to the first figure, which is a side view of a conventional array probe card. In the first figure, the array probe card 1 is mainly composed of a circuit board 10, a test substrate 11, a probe head 12, and a probe wire 13. The test substrate 11 is provided with solder joints 111 and sockets 112. The circuit board 10 is provided with a through hole 103 for receiving the socket 112. By electrically connecting the connector 141 of the tester 14 to the header 112, the test machine 14 can be used for high speed electrical testing.
然而,上述第一圖的陣列式探針卡1具有下述缺點:However, the array probe card 1 of the first figure described above has the following disadvantages:
(1)因為接頭141的體積較大,加上人工連接所需的操作空間亦不小,導致電路板10的貫通孔103面積必須大增,其將影響電路板10內部信號線的佈線便利性與電信號傳輸品質,尤其在接頭141為複數個設置於測試基板11時,電路板10內部信號線的可佈線面積,將被多個貫通孔103嚴重佔據;(1) Since the volume of the joint 141 is large, and the operation space required for the manual connection is not small, the area of the through hole 103 of the circuit board 10 must be greatly increased, which affects the wiring convenience of the signal line inside the circuit board 10. The electrical signal transmission quality, especially when the plurality of terminals 141 are disposed on the test substrate 11, the wiring area of the signal lines inside the circuit board 10 will be seriously occupied by the plurality of through holes 103;
(2)接座112的所在空間狹小,增加人工將其連接於接頭114的困難度;(2) The space of the socket 112 is narrow, and the difficulty of manually connecting it to the joint 114 is increased;
(3)刻意加大的MLO測試基板11的面積以方便接座112置放的結果,將使得迴銲技術面臨挑戰;及(3) Deliberately increasing the area of the MLO test substrate 11 to facilitate the placement of the socket 112, which will make the reflow technology challenge; and
(4)MLO測試基板11的高頻信號線路(trace)變長,將增加阻容延遲(RC Delay)的程度。(4) The high frequency signal trace of the MLO test substrate 11 becomes long, which increases the degree of RC delay.
因此,有必要構思一種陣列式高頻探針卡,能夠改善上述各種習用探針卡的諸多缺點。Therefore, it is necessary to conceive an array type high frequency probe card, which can improve many disadvantages of the above various conventional probe cards.
根據上述構想,提出一種陣列式探針卡,包括:一電路板,具有一第一面、一第二面及一貫通孔,該貫通孔貫通該第一面與該第二面;一測試基板,具有一第一面及一第二面,使該測試基板之內部線路與該電路板之內部線路電性連接,該測試基板以該第一面連接於該電路板的該第二面,該測試基板的該第二面連接於複數個探針線;及至少一接座,該接座是設於該電路板的該第一面上,該接座利用穿過該貫通孔的至少一傳輸線而與該測試基板相耦接。According to the above concept, an array probe card is provided, comprising: a circuit board having a first surface, a second surface, and a through hole, the through hole penetrating the first surface and the second surface; a test substrate Having a first surface and a second surface, the internal circuit of the test substrate is electrically connected to the internal circuit of the circuit board, and the test substrate is connected to the second surface of the circuit board by the first surface, The second surface of the test substrate is connected to the plurality of probe lines; and at least one socket is disposed on the first surface of the circuit board, and the socket uses at least one transmission line passing through the through hole And coupled to the test substrate.
根據上述構想,提出另一種陣列式探針卡,包括:一電路板,具有一第一面、一第二面及一貫通孔,該貫通孔貫通該第一面與該第二面;一測試基板,具有一第一面及一第二面,該測試基板以該第一面連接於該電路板的該第二面,使該測試基板之內部線路與該電路板之內部線路電性連接,該測試基板的該第二面連接於複數個探針線;及至少一接座,經由該貫通孔而與該測試基板相連接。其中,該貫通孔貫通該電路板的中央區域,該測試基板連接於該電路板時,該貫通孔是位於該測試基板之中央區域的上方,該接座是設於該貫通孔內。According to the above concept, another array probe card is provided, comprising: a circuit board having a first surface, a second surface, and a through hole, the through hole penetrating the first surface and the second surface; The substrate has a first surface and a second surface. The test substrate is connected to the second surface of the circuit board by the first surface, so that the internal circuit of the test substrate is electrically connected to the internal circuit of the circuit board. The second surface of the test substrate is connected to the plurality of probe lines; and at least one of the sockets is connected to the test substrate via the through holes. The through hole penetrates through a central region of the circuit board. When the test substrate is connected to the circuit board, the through hole is located above a central region of the test substrate, and the socket is disposed in the through hole.
本案得藉由下列圖式及詳細說明,俾得更深入之了解:This case can be further understood by the following diagrams and detailed explanations:
請參閱第二圖,其為本案所提出陣列式探針卡的的一第一較佳實施例的側視圖。在第二圖中,陣列式探針卡2主要是由電路板20、測試基板21、探針頭22、及探針線23所構成,其中電路板20具有一第一面201及一第二面202,測試基板21亦具有一第一面211及一第二面212,和習用技術相同的是,測試基板21可以藉由迴焊方式經由焊點213而與電路板20相連接。Please refer to the second figure, which is a side view of a first preferred embodiment of the array probe card of the present invention. In the second figure, the array probe card 2 is mainly composed of a circuit board 20, a test substrate 21, a probe head 22, and a probe wire 23, wherein the circuit board 20 has a first surface 201 and a second The test substrate 21 also has a first surface 211 and a second surface 212. Similarly to the conventional technique, the test substrate 21 can be connected to the circuit board 20 via solder joints 213 by reflow soldering.
但與習用技術不同之處在於,電路板20還具有貫通第一面201及第二面202的貫通孔203,而接座24則是設於電路板20的第一面201上,接座24並利用阻抗匹配的高頻傳輸線25與測試基板21相連接。因此,藉由將測試機26的一高速接頭261一對一地對應耦接於接座24,陣列式探針卡2便能夠進行電性測試。However, the circuit board 20 has a through hole 203 extending through the first surface 201 and the second surface 202, and the socket 24 is disposed on the first surface 201 of the circuit board 20, and the socket 24 is provided. The test substrate 21 is connected by an impedance matching high frequency transmission line 25. Therefore, by one-to-one coupling of a high-speed connector 261 of the testing machine 26 to the socket 24, the array probe card 2 can be electrically tested.
第二圖之本發明陣列式探針卡的優點在於,電路板20的貫通孔203極小,僅供可撓性傳輸線25通過即可,因此MLO/MLC測試基板21因為無須設置接座24而能夠將面積縮小。此外,接座24因為是設置於電路板20的第一面201上,且尚具有辨識標註的空間,不但連接方便,也降低了人工判讀錯誤及錯誤耦接的風險。The advantage of the array probe card of the present invention in the second figure is that the through hole 203 of the circuit board 20 is extremely small and can only pass through the flexible transmission line 25, so the MLO/MLC test substrate 21 can be mounted without having to provide the socket 24. Reduce the area. In addition, since the socket 24 is disposed on the first surface 201 of the circuit board 20 and has a space for identification, it not only has convenient connection, but also reduces the risk of manual interpretation errors and incorrect coupling.
請參閱第三圖,其為本案所提出陣列式探針卡的一第二較佳實施例的側視圖。與第二圖之不同處在於,此時貫通孔203是開設於電路板20的中央區域,同時亦位於測試基板21之中央區域的正上方。此外,接座24也可以設置不只一個。Please refer to the third figure, which is a side view of a second preferred embodiment of the array probe card of the present invention. The difference from the second figure is that the through hole 203 is opened in the central area of the circuit board 20 at the same time, and is also located directly above the central area of the test substrate 21. In addition, the holder 24 can also be provided with more than one.
因此,除了第二圖的陣列式探針卡的優點以外,第三圖的陣列式探針卡更具有的優點為,位於電路板20中央區域的貫通孔能夠增加迴焊時的均溫程度,提高製程的良率;此外,由於傳輸線25是大致位於測試基板21的中央區域,因此可以降低線路的長度,改善高頻的阻容延遲的狀況;甚且一般而言,電路板20中央區域沒有佈設內部線路,故中央區域設置貫通孔的方式,將有效降低貫通孔對電路板20佈設內部線路的影響。Therefore, in addition to the advantages of the array probe card of the second figure, the array probe card of the third figure has the additional advantage that the through hole located in the central portion of the circuit board 20 can increase the temperature uniformity during reflow. In addition, since the transmission line 25 is located substantially in the central area of the test substrate 21, the length of the line can be reduced, and the high-frequency RC delay condition can be improved; and in general, the central area of the circuit board 20 is not Since the internal wiring is disposed, the through hole is provided in the central region, and the influence of the through hole on the internal wiring of the circuit board 20 is effectively reduced.
請參閱第四圖,其為本案所提出陣列式探針卡的一第三較佳實施例的側視圖。與第二圖之不同處在於,此時是將接座24設置於貫通孔203內並與測試基板21相耦接,耦接方式同樣是迴焊。此外,貫通孔203同樣開設於電路板20的中央區域,同時位於測試基板21之中央區域的正上方。Please refer to the fourth figure, which is a side view of a third preferred embodiment of the array probe card proposed in the present invention. The difference from the second figure is that the socket 24 is disposed in the through hole 203 and coupled to the test substrate 21 at the same time, and the coupling manner is also reflow. Further, the through hole 203 is also opened in the central region of the circuit board 20 while being located directly above the central region of the test substrate 21.
因此,第四圖的陣列式探針卡同樣具有上述第三圖的陣列式探針卡的優點。Therefore, the array probe card of the fourth figure also has the advantages of the array probe card of the third figure described above.
請參閱第五圖,其為本案所提出陣列式探針卡的一第四較佳實施例的側視圖,在此圖中所要表現的變化是,接座24可以由排線所構成,之後再迴焊於測試基板21,將較於圖四所揭露之複數個接座24安置,本排線式之接座24,將能夠有效增加電性連接的品質、欲製作便利性。Please refer to the fifth figure, which is a side view of a fourth preferred embodiment of the array probe card of the present invention. The variation shown in this figure is that the socket 24 can be composed of a cable, and then Reflow soldering to the test substrate 21 will be placed in comparison with the plurality of sockets 24 disclosed in FIG. 4, and the wire-type socket 24 can effectively increase the quality of the electrical connection and the convenience of fabrication.
請參閱第六圖,其為本案所提出陣列式探針卡的一第五較佳實施例的側視圖,在此圖中所要表現的變化是,在測試基板21的該第一面上,可以設有同時位於貫通孔203內的至少一電子元件27;再者,測試基板21的該第二面上,亦可是需求放置電子元件27,必要時探針頭22可以開孔221以方便電子元件27放置;電子元件27的種類則須視實際需求狀況而定,如主動或被動電子元件等。Please refer to the sixth figure, which is a side view of a fifth preferred embodiment of the array probe card of the present invention. The variation to be shown in this figure is that on the first side of the test substrate 21, At least one electronic component 27 is disposed in the through hole 203. Further, on the second surface of the test substrate 21, the electronic component 27 may be placed. If necessary, the probe head 22 may be opened 221 to facilitate the electronic component. 27 placement; the type of electronic components 27 depends on actual needs, such as active or passive electronic components.
請參閱第七圖,其為本案所提出陣列式探針卡的一第六較佳實施例的側視圖,在此圖中所要表現的變化是,在測試基板21的該第一面上,更填充有同時位於貫通孔203內的一膠體28,藉以增強測試基板21與電路板20之間的固定強度,以及增加測試基板21承受來自探針23之作用力的能力;另外,膠體亦可以流入測試基板21、電路板20與連接點213三者之間的縫隙,可增加測試基板21、電路板20之間的固著。Please refer to the seventh figure, which is a side view of a sixth preferred embodiment of the array probe card of the present invention. The variation to be shown in this figure is that on the first side of the test substrate 21, A colloid 28 is disposed in the through hole 203 at the same time, thereby enhancing the fixing strength between the test substrate 21 and the circuit board 20, and increasing the ability of the test substrate 21 to withstand the force from the probe 23. In addition, the colloid can also flow in. The gap between the test substrate 21, the circuit board 20, and the connection point 213 can increase the adhesion between the test substrate 21 and the circuit board 20.
請參閱第八圖,其為本案所提出陣列式探針卡的一第七較佳實施例的側視圖,在此圖中所要表現的變化是,在測試基板21的該第一面上,更固定有同時位於貫通孔203內的一支撐件28’,如螺絲,支撐件28’是固定於電路板20第一面上的一補強圈29上;藉由支撐件28’與補強圈29可以增強測試基板21承受來自探針23之作用力的能力,防止測試基板21受力變形。Referring to FIG. 8, which is a side view of a seventh preferred embodiment of the array probe card of the present invention, the variation to be shown in the figure is that on the first side of the test substrate 21, A support member 28', such as a screw, is fixed in the through hole 203, and the support member 28' is fixed on a reinforcing ring 29 on the first surface of the circuit board 20; the support member 28' and the reinforcing ring 29 can be The ability of the test substrate 21 to withstand the force from the probe 23 is enhanced to prevent the test substrate 21 from being deformed by force.
請參閱第九(a)~(d)圖,其為本案所提出陣列式探針卡所使用之線路的示意圖,在此圖中所要表現的變化是,測試機14賴以與測試基板21相耦接的、穿過貫通孔203的複數根傳輸線是選自如第九(a)圖般的同軸線、如第九(b)圖般的雙絞線為一接地線路與一信號線路絞結一起,達到電性上阻抗匹配的效果,完成傳輸高速訊號的目的、如第九(c)圖般的雙併線為一接地線路與一信號線路並行且保持一特定距離,達到電性上阻抗匹配的效果,完成傳輸高速訊號的目的、或是如第九(d)圖般的具有電路屏蔽效果之軟板排線、可撓性電路板。Please refer to the ninth (a)-(d) diagram, which is a schematic diagram of the circuit used in the array probe card proposed in the present invention. The variation to be shown in this figure is that the test machine 14 is in contact with the test substrate 21. The plurality of transmission lines coupled through the through hole 203 are selected from a coaxial line as shown in the ninth (a), and the twisted pair as shown in the ninth (b) is a ground line and a signal line is twisted together. The effect of electrical impedance matching is achieved, and the purpose of transmitting the high-speed signal is completed. The double-parallel line as shown in the ninth (c) is a ground line parallel to a signal line and maintained at a specific distance to achieve electrical upper impedance matching. The effect is to complete the transmission of the high-speed signal, or the flexible board and the flexible circuit board with the circuit shielding effect as shown in the ninth (d).
請參閱第十圖,其為本案所提出陣列式探針卡的一第八較佳實施例的側視圖,在此圖中所要表現的變化是,穿過貫通孔203的部分的傳輸線25是由測試基板21與電路板20之間的連接點213中最接近貫通孔203的連接點(如圖中的213’、213”)所壓合。這種設置方式的優點在於,電路板20的貫通孔203中便可以因此而有足夠的空間設置更多的電子元件27。Referring to FIG. 10, which is a side view of an eighth preferred embodiment of the array probe card of the present invention, the variation to be shown in this figure is that the transmission line 25 passing through the portion of the through hole 203 is The connection point (the 213', 213" in the figure) of the connection point 213 between the test substrate 21 and the circuit board 20 closest to the through hole 203 is pressed. This arrangement has an advantage in that the circuit board 20 is penetrated. Thus, there is sufficient space in the hole 203 to provide more electronic components 27.
請參閱第十一(a)圖,其為本案所提出陣列式探針卡的一第九較佳實施例的側視圖,在此圖中所要表現的變化是,除了第八圖的補強圈29之外,測試基板21還可以再使用一壓合圈30來與電路板20相接合;這種技術可以用來取代前面幾圖的迴焊技術。第十一(b)圖則是第十一(a)圖之壓合圈的上視圖。Please refer to the eleventh (a) figure, which is a side view of a ninth preferred embodiment of the array probe card of the present invention, and the variation to be shown in this figure is that the reinforcing ring 29 except the eighth figure is shown. In addition, the test substrate 21 can be further bonded to the circuit board 20 using a press ring 30; this technique can be used to replace the reflow technique of the previous figures. The eleventh (b) plan is a top view of the press ring of the eleventh (a) figure.
請參閱第十二(a)圖與第十二(b)圖,其分別為本案所提出陣列式探針卡的一第十、十一較佳實施例的側視圖,在第十二(a)圖中所要表現的變化是,穿過貫通孔203的複數根傳輸線25是耦接於測試基板21的第二面212;此外,在第十二(b)圖中所要表現的變化是,測試基板21更可具有一穿孔214,穿過貫通孔203的複數根傳輸線25是經由穿孔214而耦接於測試基板21的第二面212。這二種技術上的變化都可以有效地縮小測試基板21的面積,同時,將貫通孔203對電路板20內部線路佈局的影響,降至最低。Please refer to the twelfth (a) and twelfth (b) drawings, respectively, showing a side view of a tenth and eleventh preferred embodiment of the array probe card of the present invention, in the twelfth (a) The change to be represented in the figure is that the plurality of transmission lines 25 passing through the through holes 203 are coupled to the second surface 212 of the test substrate 21; further, the variation to be performed in the twelfth (b) diagram is that the test The substrate 21 further has a through hole 214 , and the plurality of transmission lines 25 passing through the through hole 203 are coupled to the second surface 212 of the test substrate 21 via the through holes 214 . Both of these technical changes can effectively reduce the area of the test substrate 21, while minimizing the influence of the through holes 203 on the internal wiring layout of the circuit board 20.
綜上所述,本發明所提出的陣列式探針卡,其中MLO/MLC測試基板的面積可有效地縮小,並使用諸般手段來增強測試基板與電路板之間的固定強度,不但可以降低線路的長度,還能改善高頻線路的阻容延遲。In summary, the array probe card of the present invention can effectively reduce the area of the MLO/MLC test substrate, and use various methods to enhance the fixing strength between the test substrate and the circuit board, thereby reducing the line. The length can also improve the resistance delay of the high frequency line.
本案得由熟悉本技藝之人士任施匠思而為諸般修飾,然皆不脫如附申請專利範圍所欲保護者。This case has been modified by people who are familiar with the art, but it is not intended to be protected by the scope of the patent application.
1、2...陣列式探針卡1, 2. . . Array probe card
10、20...電路板10, 20. . . Circuit board
11、21...測試基板11, 21. . . Test substrate
12、22...探針頭12, 22. . . Probe head
13、23...探針線13,23. . . Probe line
14、26...測試機14, 26. . . Test machine
221...開口221. . . Opening
25...傳輸線25. . . Transmission line
27...電子元件27. . . Electronic component
28...膠體28. . . colloid
28’...支撐件28’. . . supporting item
29...補強圈29. . . Reinforcement
30...壓合圈30. . . Pressing ring
111...焊點111. . . Solder joint
112、24...接座112, 24. . . Seat
141、261...接頭141, 261. . . Connector
201...第一面201. . . First side
202...第二面202. . . Second side
203...貫通孔203. . . Through hole
211...第一面211. . . First side
212...第二面212. . . Second side
213、213’、213”...連接點213, 213', 213"... connection point
214...穿孔214. . . perforation
第一圖:一種習用的陣列式探針卡的側視圖。First: A side view of a conventional array of probe cards.
第二圖:本案所提出陣列式探針卡的的一第一較佳實施例的側視圖。Second Figure: A side view of a first preferred embodiment of the array probe card of the present invention.
第三圖:本案所提出陣列式探針卡的的一第二較佳實施例的側視圖。Third: A side view of a second preferred embodiment of the array probe card of the present invention.
第四圖:本案所提出陣列式探針卡的的一第三較佳實施例的側視圖。Fourth Figure: A side view of a third preferred embodiment of the array probe card of the present invention.
第五圖:本案所提出陣列式探針卡的的一第四較佳實施例的側視圖。Figure 5 is a side elevational view of a fourth preferred embodiment of the array probe card of the present invention.
第六圖:本案所提出陣列式探針卡的的一第五較佳實施例的側視圖。Figure 6 is a side elevational view of a fifth preferred embodiment of the array probe card of the present invention.
第七圖:本案所提出陣列式探針卡的的一第六較佳實施例的側視圖。Figure 7 is a side elevational view of a sixth preferred embodiment of the array probe card of the present invention.
第八圖:本案所提出陣列式探針卡的的一第七較佳實施例的側視圖。Figure 8 is a side elevational view of a seventh preferred embodiment of the array probe card of the present invention.
第九(a)~(d)圖:本案所提出陣列式探針卡所使用之線路的示意圖。Ninth (a) to (d): Schematic diagram of the lines used in the array probe card proposed in the present application.
第十圖:本案所提出陣列式探針卡的的一第八較佳實施例的側視圖。Figure 11 is a side elevational view of an eighth preferred embodiment of the array probe card of the present invention.
第十一(a)圖:本案所提出陣列式探針卡的的一第九較佳實施例的側視圖。Figure 11 (a) is a side view of a ninth preferred embodiment of the array probe card of the present invention.
第十一(b)圖:第十一(a)圖之壓合圈的上視圖。Figure 11 (b): Top view of the press-fit ring of Figure 11 (a).
第十二(a)圖:本案所提出陣列式探針卡的一第十較佳實施例的側視圖。Twelfth (a): A side view of a tenth preferred embodiment of the array probe card of the present invention.
第十二(b)圖:本案所提出陣列式探針卡的一第十一較佳實施例的側視圖。Twelfth (b): A side view of an eleventh preferred embodiment of the array probe card of the present invention.
2‧‧‧陣列式探針卡2‧‧‧Array probe card
20‧‧‧電路板20‧‧‧ boards
21‧‧‧測試基板21‧‧‧Test substrate
22‧‧‧探針頭22‧‧‧Probe head
23‧‧‧探針線23‧‧‧Probe line
24‧‧‧接座24‧‧‧ Seating
25‧‧‧傳輸線25‧‧‧ transmission line
26‧‧‧測試機26‧‧‧Testing machine
201‧‧‧第一面201‧‧‧ first side
202‧‧‧第二面202‧‧‧ second side
203‧‧‧貫通孔203‧‧‧through holes
211‧‧‧第一面211‧‧‧ first side
212‧‧‧第二面212‧‧‧ second side
213‧‧‧連接點213‧‧‧ Connection point
261‧‧‧接頭261‧‧‧Connector
Claims (20)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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TW98131432A TWI410637B (en) | 2009-09-17 | 2009-09-17 | Area array probe card |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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TW98131432A TWI410637B (en) | 2009-09-17 | 2009-09-17 | Area array probe card |
Publications (2)
Publication Number | Publication Date |
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TW201111797A TW201111797A (en) | 2011-04-01 |
TWI410637B true TWI410637B (en) | 2013-10-01 |
Family
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TW98131432A TWI410637B (en) | 2009-09-17 | 2009-09-17 | Area array probe card |
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TW (1) | TWI410637B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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TWI700500B (en) * | 2017-11-30 | 2020-08-01 | 南韓商李諾工業股份有限公司 | Test device |
Families Citing this family (2)
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TWI596354B (en) * | 2016-09-06 | 2017-08-21 | 中華精測科技股份有限公司 | Chip testing apparatus having implantable coaxial bore connector, electrical circuit architecture and assembling method |
TWI776476B (en) * | 2021-04-20 | 2022-09-01 | 旺矽科技股份有限公司 | Probe card and inspection device using the same |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1982002286A1 (en) * | 1980-12-24 | 1982-07-08 | Lauriello Alfred F | Multipin coupler |
JPS647632A (en) * | 1987-06-30 | 1989-01-11 | Hitachi Ltd | Inspection device for semiconductor element |
US5525911A (en) * | 1993-08-04 | 1996-06-11 | Tokyo Electron Limited | Vertical probe tester card with coaxial probes |
TW200501298A (en) * | 2003-06-26 | 2005-01-01 | Chipmos Technologies Inc | Modular probe head |
TW200831908A (en) * | 2006-11-01 | 2008-08-01 | Formfactor Inc | Method and apparatus for providing active compliance in a probe card assembly |
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2009
- 2009-09-17 TW TW98131432A patent/TWI410637B/en not_active IP Right Cessation
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1982002286A1 (en) * | 1980-12-24 | 1982-07-08 | Lauriello Alfred F | Multipin coupler |
JPS647632A (en) * | 1987-06-30 | 1989-01-11 | Hitachi Ltd | Inspection device for semiconductor element |
US5525911A (en) * | 1993-08-04 | 1996-06-11 | Tokyo Electron Limited | Vertical probe tester card with coaxial probes |
TW200501298A (en) * | 2003-06-26 | 2005-01-01 | Chipmos Technologies Inc | Modular probe head |
TW200831908A (en) * | 2006-11-01 | 2008-08-01 | Formfactor Inc | Method and apparatus for providing active compliance in a probe card assembly |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI700500B (en) * | 2017-11-30 | 2020-08-01 | 南韓商李諾工業股份有限公司 | Test device |
US11391757B2 (en) | 2017-11-30 | 2022-07-19 | Leeno Industrial Inc. | Test device |
US11726111B2 (en) | 2017-11-30 | 2023-08-15 | Leeno Industrial Inc. | Test device |
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TW201111797A (en) | 2011-04-01 |
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