TWI359477B - Strained silicon-on-insulator by anodization of a - Google Patents

Strained silicon-on-insulator by anodization of a Download PDF

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Publication number
TWI359477B
TWI359477B TW094122166A TW94122166A TWI359477B TW I359477 B TWI359477 B TW I359477B TW 094122166 A TW094122166 A TW 094122166A TW 94122166 A TW94122166 A TW 94122166A TW I359477 B TWI359477 B TW I359477B
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TW
Taiwan
Prior art keywords
layer
semiconductor
semiconductor layer
relaxed
substrate
Prior art date
Application number
TW094122166A
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English (en)
Chinese (zh)
Other versions
TW200616141A (en
Inventor
Thomas N Adam
Stephen W Bedell
Souza Joel P De
Keith E Fogel
Alexander Reznicek
Devendra K Sadana
Ghavam G Shahidi
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Ibm
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Publication of TW200616141A publication Critical patent/TW200616141A/zh
Application granted granted Critical
Publication of TWI359477B publication Critical patent/TWI359477B/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/967Semiconductor on specified insulator

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
TW094122166A 2004-07-02 2005-06-30 Strained silicon-on-insulator by anodization of a TWI359477B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/883,887 US7172930B2 (en) 2004-07-02 2004-07-02 Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer

Publications (2)

Publication Number Publication Date
TW200616141A TW200616141A (en) 2006-05-16
TWI359477B true TWI359477B (en) 2012-03-01

Family

ID=34969794

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094122166A TWI359477B (en) 2004-07-02 2005-06-30 Strained silicon-on-insulator by anodization of a

Country Status (7)

Country Link
US (3) US7172930B2 (enExample)
EP (1) EP1779423A1 (enExample)
JP (1) JP5089383B2 (enExample)
KR (1) KR100961815B1 (enExample)
CN (1) CN101120442A (enExample)
TW (1) TWI359477B (enExample)
WO (1) WO2006003061A1 (enExample)

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US9590077B2 (en) 2015-05-14 2017-03-07 International Business Machines Corporation Local SOI fins with multiple heights
US9385023B1 (en) 2015-05-14 2016-07-05 Globalfoundries Inc. Method and structure to make fins with different fin heights and no topography
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Also Published As

Publication number Publication date
US20070111463A1 (en) 2007-05-17
EP1779423A1 (en) 2007-05-02
CN101120442A (zh) 2008-02-06
JP2008504704A (ja) 2008-02-14
TW200616141A (en) 2006-05-16
US7592671B2 (en) 2009-09-22
US20080277690A1 (en) 2008-11-13
US7172930B2 (en) 2007-02-06
WO2006003061A1 (en) 2006-01-12
KR100961815B1 (ko) 2010-06-08
JP5089383B2 (ja) 2012-12-05
US20060003555A1 (en) 2006-01-05
KR20070037483A (ko) 2007-04-04

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