TWI337746B - System and method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages - Google Patents

System and method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages Download PDF

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Publication number
TWI337746B
TWI337746B TW096119384A TW96119384A TWI337746B TW I337746 B TWI337746 B TW I337746B TW 096119384 A TW096119384 A TW 096119384A TW 96119384 A TW96119384 A TW 96119384A TW I337746 B TWI337746 B TW I337746B
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TW
Taiwan
Prior art keywords
stylization
word line
volatile storage
page
initial
Prior art date
Application number
TW096119384A
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English (en)
Chinese (zh)
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TW200814084A (en
Inventor
Nima Mokhlesi
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/425,790 external-priority patent/US7486561B2/en
Priority claimed from US11/425,794 external-priority patent/US7489549B2/en
Application filed by Sandisk Corp filed Critical Sandisk Corp
Publication of TW200814084A publication Critical patent/TW200814084A/zh
Application granted granted Critical
Publication of TWI337746B publication Critical patent/TWI337746B/zh

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628Programming or writing circuits; Data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/08Address circuits; Decoders; Word-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3454Arrangements for verifying correct programming or for detecting overprogrammed cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562Multilevel memory programming aspects
    • G11C2211/5621Multilevel programming verification
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
TW096119384A 2006-06-22 2007-05-30 System and method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages TWI337746B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/425,790 US7486561B2 (en) 2006-06-22 2006-06-22 Method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
US11/425,794 US7489549B2 (en) 2006-06-22 2006-06-22 System for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages

Publications (2)

Publication Number Publication Date
TW200814084A TW200814084A (en) 2008-03-16
TWI337746B true TWI337746B (en) 2011-02-21

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW096119384A TWI337746B (en) 2006-06-22 2007-05-30 System and method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages

Country Status (6)

Country Link
EP (1) EP2030205B1 (enExample)
JP (1) JP4994447B2 (enExample)
KR (1) KR101075253B1 (enExample)
AT (1) ATE515771T1 (enExample)
TW (1) TWI337746B (enExample)
WO (1) WO2007149677A2 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITRM20080114A1 (it) * 2008-02-29 2009-09-01 Micron Technology Inc Compensazione della perdita di carica durante la programmazione di un dispositivo di memoria.
US7924614B2 (en) 2009-01-19 2011-04-12 Macronix International Co., Ltd. Memory and boundary searching method thereof
US8504759B2 (en) * 2009-05-26 2013-08-06 Micron Technology, Inc. Method and devices for controlling power loss
JP2011159364A (ja) * 2010-02-02 2011-08-18 Toshiba Corp 不揮発性半導体記憶装置および不揮発性半導体記憶装置の駆動方法
JP2011198419A (ja) * 2010-03-19 2011-10-06 Toshiba Corp 不揮発性半導体記憶装置およびその書き込み方法
KR20110126408A (ko) 2010-05-17 2011-11-23 삼성전자주식회사 비휘발성 메모리 장치, 그것을 포함한 메모리 시스템 및 그것의 프로그램 방법
JP2012190523A (ja) 2011-03-14 2012-10-04 Toshiba Corp 不揮発性半導体記憶装置
US9092320B2 (en) 2012-10-15 2015-07-28 Hitachi, Ltd. Storage system which includes non-volatile semiconductor storage medium, and storage control method of storage system
US9257203B2 (en) * 2012-12-06 2016-02-09 Micron Technology, Inc. Setting a default read signal based on error correction
KR102175039B1 (ko) * 2013-06-25 2020-11-05 삼성전자주식회사 불휘발성 메모리 장치의 데이터 기입 방법
KR20160032910A (ko) 2014-09-17 2016-03-25 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
JP6453718B2 (ja) * 2015-06-12 2019-01-16 東芝メモリ株式会社 半導体記憶装置及びメモリシステム
US10460816B2 (en) 2017-12-08 2019-10-29 Sandisk Technologies Llc Systems and methods for high-performance write operations

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3930074B2 (ja) * 1996-09-30 2007-06-13 株式会社ルネサステクノロジ 半導体集積回路及びデータ処理システム
KR100257868B1 (ko) * 1997-12-29 2000-06-01 윤종용 노어형 플래시 메모리 장치의 소거 방법
JP3957985B2 (ja) * 2001-03-06 2007-08-15 株式会社東芝 不揮発性半導体記憶装置
US6522580B2 (en) * 2001-06-27 2003-02-18 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
US6657891B1 (en) * 2002-11-29 2003-12-02 Kabushiki Kaisha Toshiba Semiconductor memory device for storing multivalued data
JP3863485B2 (ja) * 2002-11-29 2006-12-27 株式会社東芝 不揮発性半導体記憶装置
JP4410188B2 (ja) * 2004-11-12 2010-02-03 株式会社東芝 半導体記憶装置のデータ書き込み方法
US7212436B2 (en) * 2005-02-28 2007-05-01 Micron Technology, Inc. Multiple level programming in a non-volatile memory device

Also Published As

Publication number Publication date
EP2030205A2 (en) 2009-03-04
JP2009541909A (ja) 2009-11-26
KR20090007298A (ko) 2009-01-16
TW200814084A (en) 2008-03-16
EP2030205B1 (en) 2011-07-06
JP4994447B2 (ja) 2012-08-08
WO2007149677A3 (en) 2008-05-22
WO2007149677A2 (en) 2007-12-27
KR101075253B1 (ko) 2011-10-20
ATE515771T1 (de) 2011-07-15

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