TWI326444B - Gate driver - Google Patents
Gate driver Download PDFInfo
- Publication number
- TWI326444B TWI326444B TW094142427A TW94142427A TWI326444B TW I326444 B TWI326444 B TW I326444B TW 094142427 A TW094142427 A TW 094142427A TW 94142427 A TW94142427 A TW 94142427A TW I326444 B TWI326444 B TW I326444B
- Authority
- TW
- Taiwan
- Prior art keywords
- output
- circuit
- input
- delay
- circuits
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2085—Special arrangements for addressing the individual elements of the matrix, other than by driving respective rows and columns in combination
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/025—Reduction of instantaneous peaks of current
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/04—Display protection
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
- H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
- H03K17/163—Soft switching
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0036—Means reducing energy consumption
Description
^26444 18233twf.doc/006 九、發明說明: 【發明所屬之技術領域】 本發明是有關於-種驅動平面顯示器的裝置,且特別 是有關於一種閘極驅動器。 【先前技術】 平面顯示斋例如液晶顯示器,近來已被廣泛地使用。 隨著半導體技術岐良,使得液晶齡^具有低的消耗電 功率、薄型量輕、解析度高、色彩飽和度高、壽命長等優 點’因而廣泛地應用在筆記型電腦或桌上型電腦的液晶榮 幕及液晶電視(LCD TV)等與生活息息相關之電子產品。其 中,顯不器的閘極驅動器更是液晶顯示器不可或缺的重要 元件。 一-般來說’閘極驅動器通常會有—種功能,稱之為全 =位(Allhighf刪ti〇n)。此功能一般用在液晶顯示器级 面板關機時,用以將所有的像素電容放電。圖认 ‘不為習知閘極驅動器的電路方塊圖。圖ib緣示為習知 閘極驅動器的時脈圖。在圖M巾,閉極驅動器ι〇 輸出電路⑽。每一個輸出電路腦包括一個啟 丨I!些啟動端咖接收一致能訊號OA。當致能訊 ^邏輯高電位轉為邏輯低電位時,由於所有的 啟動端ΕΝ皆接收此致能訊號〇Α,因此便 出端王立rJ1 hlgh functl0n) °每個輸出電路100的輸 出k 0G[1]〜〇G[N]皆輸出邏輯高 電晶體使其導通。 要位以控制面板的缚膜 由上面電路圖以及圖m的時脈圖可以看到,在 18233twf,doc/006 全^準位⑽high f職tkm)魏啟動時,_驅動器 很大的電流對液晶面板充電,使得驅動電路以及^ 大電流,因此可能會造成間極驅動器的損; ^綱編_轉_雖, 【發明内容】 、本發明的目的就是在提供一種間極驅動器,用以全言 準位功能(All high fUnction)所造成不必要 = 少積體電路佈局面積。 力手為耗並減 ,發明提出-種閘極驅動.此難驅動器包括多個 輸出电路以及多個延遲電路。每一輸出電路包括啟 母一延遲電路之輸出端墟下—延遲電路之輪人端 Γΐ遲電路之輸入端接收一致能訊號,每一延遲電路之轸 別糕接對應的該些輸出電路之啟動端,以致 旎該些輪出電路。 斤软 本發明因採用多個延遲電路將致能訊號延遲,在全言 要:::(Αη ¥ ——η)啟動時’使得閘極驅動器不需 讯號致能的瞬間驅動較大的負载,另外面 大Γ對液晶面板充電。因此,除了可以減少面: 电"IL 更可以減少積體電路佈局面積以;§访# pq ϋ 器損壞的顺。 Μ積以及減低閘極驅動 為讓本發明之上述和其他目的、特徵和優點 文特舉較佳實施例,並配合所附圖式,作詳細說 1326444 18233twf.doc/006 間後輸出至第二個延遲電路DL—2與第二個輸出電路 0T一2。接下來便重複上述操作。 在此可以看出,習知的閘極驅動器當全高準位功能 (All hlgh functi〇n)啟動時,所有的輸出電路將會輸出高電 位,因此會有很大的瞬間電流。然而,在本發明的實施例 中由於輸出電路0T-1〜0T-N為分批啟動,不會同時啟 動,因此不會在全高準位功能(A11 high funcd〇n)啟動 φ 瞬間產生彳艮大的瞬間電流。 上述的延遲電路DL-hDL,有許多不同的實施 方式例如如圖4所不,由兩個反相器INV1與購 構成-個延遲電路,利用第—反相器mvi與第二反相器 INV2的雜輯作為預設時μ,將致能喊⑽每經過一 級延遲電路便延遲-個預設時間。另外,延遲電路亦可以 例如圖5的方式實施。利用一串D型觸發器^〜D-叫, 第们D i觸發裔D—j的輸入端接收致能訊號,每經 • 過一個時脈時間CK,便將致能訊號 〇A傳送到下一個〇 型觸發器。 紅上所返,本發明因採用多個延遲電路將致能訊號延 遲,在全高準位功能⑽high functi〇n)啟動日夺,使得間極 驅動器不需要在致能訊號致能的瞬間驅動較大的負載,另 外面板系統不會有大電流對液晶面板充電。因此,、除了可 以減少面板電流外,更可以減少積體電路佈局面積以及減 低閘極驅動器損壞的風險。 8 1326444 18233twf.doc/006 雖然本發明已以較佳實施例揭露如上’然其並非用以 限定本發明,任何熟習此技藝者,在不脫離本發明之精神 和範圍内,當可作些許之更動與潤飾,因此本發明之保 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1Α 4會示為習知閘極驅動器之電路方塊圖。
圖1Β緣示為習知圖1Α閘極驅動器之操作回時 圖2繪不為本發明實施例閘極驅動器' Θ 圖3緣示為本發明實施例圖2電路之 塊圖。 圖4與圖5繪示為本發明實施例閑極驅動=圖。 電路的實施電路圖。 功益中的延遲 【主要元件符號說明】 10 :閘極驅動器 100、〇τ_1〜〇τ—輪出電路 出的訊說
OG[l]〜OG[N]:輸出電路所輸 OA :致能訊號 EN :啟動端 DL—1〜DL—N~1 .延遲電路 SR :移位暫存器 B1〜B3 :輸出緩衝器 INV卜INV2 :反相器 D_1〜D_N-1 : D型觸發器
Claims (1)
1326444 I8233twf.doc/006 十、申請專利範圚·· 】.-種閘椏驅動器,用以當 fimciion)啟動時,防止 位功能(Aii high 多個輪出電路,每—大,此閘極驅動器包括: 多個延遲電路,每—延電路包括啟動端;以及 電路之輸入端,第一個雪' 之輸出端耦接下一延遲 輸出端更分別_咖㈣:出電 路之啟動‘以依序致能該些輸出電路。輸出電 士申。月專利範圍第1項所述之間極驅動哭、盆由 -該些延遲電路包括: _黑動杰,其中母 兮…t第一反相器’包括輸入端以及輸出端,輸入端接收 =此訊號’輯資料轉送致能訊號做邏輯反相後輪出; -第二反相H,包括輸人端以及輸 端’ 3. 如申請專利範圍第i項所述之間極驅動器,1中 一該些延遲電路包括: 山一 D型觸發器,包括輸入端、輸出端以及時脈輸入 端,其輸入端為延遲電路之輸入端,時脈輸入端接收一時 脈訊號,其輪出端為該延遲電路之輸出端。 4. 如申請專利範圍第1項所述之閘極驅動器,其中每 一該些輸出電路包括: “ 一輪出緩衝器,包括控制端,輸出緩衝器的控制端耦 1326444 18233twf.doc/006 接該輸出電路之啟動端,用以啟動輸出緩衝器。 5.如申請專利範圍第1項所述之閘極驅動器,其中每 一該些輸出電路包括: 多個輸出缓衝器,每一該些輸出緩衝器包括控制端, 輸出緩衝器的控制端耦接該輸出電路之啟動端,用以啟動 輸出緩衝器。 ‘
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW094142427A TWI326444B (en) | 2005-12-02 | 2005-12-02 | Gate driver |
US11/340,170 US20070126483A1 (en) | 2005-12-02 | 2006-01-25 | Gate driver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW094142427A TWI326444B (en) | 2005-12-02 | 2005-12-02 | Gate driver |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200723233A TW200723233A (en) | 2007-06-16 |
TWI326444B true TWI326444B (en) | 2010-06-21 |
Family
ID=38118081
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094142427A TWI326444B (en) | 2005-12-02 | 2005-12-02 | Gate driver |
Country Status (2)
Country | Link |
---|---|
US (1) | US20070126483A1 (zh) |
TW (1) | TWI326444B (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101409542B (zh) * | 2007-10-11 | 2016-01-20 | 瑞昱半导体股份有限公司 | 数字电路的重置方法及相关信号产生装置 |
CN102890923B (zh) * | 2012-10-23 | 2016-03-09 | 深圳市华星光电技术有限公司 | 一种液晶面板的扫描驱动电路、液晶显示装置和驱动方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5483188A (en) * | 1994-09-27 | 1996-01-09 | Intel Corporation | Gil edge rate control circuit |
US5546039A (en) * | 1994-11-02 | 1996-08-13 | Advanced Micro Devices, Inc. | Charge dissipation in capacitively loaded ports |
US5859552A (en) * | 1995-10-06 | 1999-01-12 | Lsi Logic Corporation | Programmable slew rate control circuit for output buffer |
US5781050A (en) * | 1996-11-15 | 1998-07-14 | Lsi Logic Corporation | Open drain output driver having digital slew rate control |
KR100260358B1 (ko) * | 1996-12-30 | 2000-07-01 | 김영환 | 반도체 메모리소자의 출력버퍼회로 |
US6184729B1 (en) * | 1998-10-08 | 2001-02-06 | National Semiconductor Corporation | Low ground bounce and low power supply bounce output driver |
US6717997B1 (en) * | 1998-12-01 | 2004-04-06 | International Business Machines Corporation | Apparatus and method for current demand distribution in electronic systems |
JP4263818B2 (ja) * | 1999-09-20 | 2009-05-13 | 富士通マイクロエレクトロニクス株式会社 | 半導体集積回路 |
US6392441B1 (en) * | 2000-06-13 | 2002-05-21 | Ramtron International Corporation | Fast response circuit |
US6388486B1 (en) * | 2000-06-19 | 2002-05-14 | Lsi Logic Corporation | Load sensing, slew rate shaping, output signal pad cell driver circuit and method |
US6426662B1 (en) * | 2001-11-12 | 2002-07-30 | Pericom Semiconductor Corp. | Twisted-ring oscillator and delay line generating multiple phases using differential dividers and comparators to match delays |
DE10355509A1 (de) * | 2003-11-27 | 2005-07-07 | Infineon Technologies Ag | Schaltung und Verfahren zum verzögerten Einschalten einer elektrischen Last |
US7315270B2 (en) * | 2005-03-04 | 2008-01-01 | The Regents Of The University Of Colorado | Differential delay-line analog-to-digital converter |
-
2005
- 2005-12-02 TW TW094142427A patent/TWI326444B/zh not_active IP Right Cessation
-
2006
- 2006-01-25 US US11/340,170 patent/US20070126483A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20070126483A1 (en) | 2007-06-07 |
TW200723233A (en) | 2007-06-16 |
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MM4A | Annulment or lapse of patent due to non-payment of fees |