TWI320572B - Circuit and method for controlling self-refresh cycle - Google Patents
Circuit and method for controlling self-refresh cycleInfo
- Publication number
- TWI320572B TWI320572B TW096100127A TW96100127A TWI320572B TW I320572 B TWI320572 B TW I320572B TW 096100127 A TW096100127 A TW 096100127A TW 96100127 A TW96100127 A TW 96100127A TW I320572 B TWI320572 B TW I320572B
- Authority
- TW
- Taiwan
- Prior art keywords
- circuit
- refresh cycle
- controlling self
- self
- controlling
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40626—Temperature related aspects of refresh operations
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/025—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in signal lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4061—Calibration or ate or cycle tuning
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4068—Voltage or leakage in refresh operations
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020060045861A KR100800145B1 (ko) | 2006-05-22 | 2006-05-22 | 셀프 리프레쉬 주기 제어 회로 및 그 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200744094A TW200744094A (en) | 2007-12-01 |
TWI320572B true TWI320572B (en) | 2010-02-11 |
Family
ID=38711832
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW096100127A TWI320572B (en) | 2006-05-22 | 2007-01-03 | Circuit and method for controlling self-refresh cycle |
Country Status (3)
Country | Link |
---|---|
US (2) | US7619943B2 (zh) |
KR (1) | KR100800145B1 (zh) |
TW (1) | TWI320572B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103035281A (zh) * | 2011-09-29 | 2013-04-10 | 复旦大学 | 一种基于单元漏电检测的温度控制自刷新方法 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9159396B2 (en) * | 2011-06-30 | 2015-10-13 | Lattice Semiconductor Corporation | Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices |
US9245604B2 (en) | 2013-05-08 | 2016-01-26 | International Business Machines Corporation | Prioritizing refreshes in a memory device |
US9224450B2 (en) | 2013-05-08 | 2015-12-29 | International Business Machines Corporation | Reference voltage modification in a memory device |
KR20160099983A (ko) * | 2015-02-13 | 2016-08-23 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그 동작 방법 |
KR20160138616A (ko) | 2015-05-26 | 2016-12-06 | 에스케이하이닉스 주식회사 | 셀프 리프레쉬 장치 |
JP6084318B1 (ja) * | 2016-02-22 | 2017-02-22 | 力晶科技股▲ふん▼有限公司 | 揮発性半導体記憶装置のリフレッシュ制御回路及び方法、並びに揮発性半導体記憶装置 |
US10147475B1 (en) | 2017-05-09 | 2018-12-04 | Micron Technology, Inc. | Refresh in memory based on a set margin |
US10644004B2 (en) * | 2018-02-13 | 2020-05-05 | Advanced Micro Devices, Inc. | Utilizing capacitors integrated with memory devices for charge detection to determine DRAM refresh |
KR102552875B1 (ko) | 2018-12-03 | 2023-07-10 | 삼성전자주식회사 | 동적 반도체 메모리 장치 및 이를 구비하는 메모리 시스템 |
CN114726192B (zh) * | 2022-06-08 | 2022-09-30 | 北京奎芯集成电路设计有限公司 | 电位维持器和芯片组件 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5365487A (en) * | 1992-03-24 | 1994-11-15 | Texas Instruments Incorporated | DRAM power management with self-refresh |
JPH06282985A (ja) * | 1993-03-30 | 1994-10-07 | Hitachi Ltd | ダイナミック型ram |
TW301750B (zh) | 1995-02-08 | 1997-04-01 | Matsushita Electric Ind Co Ltd | |
JP3710845B2 (ja) * | 1995-06-21 | 2005-10-26 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
JP3535963B2 (ja) * | 1997-02-17 | 2004-06-07 | シャープ株式会社 | 半導体記憶装置 |
KR19990040680U (ko) * | 1998-05-06 | 1999-12-06 | 김영환 | 반도체 메모리의 셀프 리프레쉬 제어회로 |
KR100527552B1 (ko) * | 1999-04-03 | 2005-11-09 | 주식회사 하이닉스반도체 | 반도체 메모리장치 |
US6483764B2 (en) | 2001-01-16 | 2002-11-19 | International Business Machines Corporation | Dynamic DRAM refresh rate adjustment based on cell leakage monitoring |
KR100744598B1 (ko) * | 2001-06-29 | 2007-08-01 | 매그나칩 반도체 유한회사 | 리프레쉬 회로 및 방법 및 이를 이용하는 반도체 메모리장치 |
KR100640780B1 (ko) * | 2003-12-29 | 2006-10-31 | 주식회사 하이닉스반도체 | 반도체 메모리 소자 |
JP4478974B2 (ja) * | 2004-01-30 | 2010-06-09 | エルピーダメモリ株式会社 | 半導体記憶装置及びそのリフレッシュ制御方法 |
-
2006
- 2006-05-22 KR KR1020060045861A patent/KR100800145B1/ko active IP Right Grant
- 2006-12-29 US US11/647,763 patent/US7619943B2/en active Active
-
2007
- 2007-01-03 TW TW096100127A patent/TWI320572B/zh active
-
2009
- 2009-08-04 US US12/535,069 patent/US8111574B2/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103035281A (zh) * | 2011-09-29 | 2013-04-10 | 复旦大学 | 一种基于单元漏电检测的温度控制自刷新方法 |
CN103035281B (zh) * | 2011-09-29 | 2016-01-13 | 复旦大学 | 一种基于单元漏电检测的温度控制自刷新方法 |
Also Published As
Publication number | Publication date |
---|---|
US20090323449A1 (en) | 2009-12-31 |
US8111574B2 (en) | 2012-02-07 |
US7619943B2 (en) | 2009-11-17 |
TW200744094A (en) | 2007-12-01 |
KR100800145B1 (ko) | 2008-02-01 |
KR20070112669A (ko) | 2007-11-27 |
US20070268767A1 (en) | 2007-11-22 |
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