TWI315523B - Sram cell with well contacts and p+diffusion crossing to ground or n+diffusion crossing to vdd and the production method thereof - Google Patents

Sram cell with well contacts and p+diffusion crossing to ground or n+diffusion crossing to vdd and the production method thereof

Info

Publication number
TWI315523B
TWI315523B TW094102534A TW94102534A TWI315523B TW I315523 B TWI315523 B TW I315523B TW 094102534 A TW094102534 A TW 094102534A TW 94102534 A TW94102534 A TW 94102534A TW I315523 B TWI315523 B TW I315523B
Authority
TW
Taiwan
Prior art keywords
crossing
diffusion
vdd
ground
production method
Prior art date
Application number
TW094102534A
Other languages
English (en)
Other versions
TW200531065A (en
Inventor
Phung T Nguyen
Robert C Wong
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of TW200531065A publication Critical patent/TW200531065A/zh
Application granted granted Critical
Publication of TWI315523B publication Critical patent/TWI315523B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
TW094102534A 2004-02-03 2005-01-27 Sram cell with well contacts and p+diffusion crossing to ground or n+diffusion crossing to vdd and the production method thereof TWI315523B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/771,824 US6856031B1 (en) 2004-02-03 2004-02-03 SRAM cell with well contacts and P+ diffusion crossing to ground or N+ diffusion crossing to VDD

Publications (2)

Publication Number Publication Date
TW200531065A TW200531065A (en) 2005-09-16
TWI315523B true TWI315523B (en) 2009-10-01

Family

ID=34116909

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094102534A TWI315523B (en) 2004-02-03 2005-01-27 Sram cell with well contacts and p+diffusion crossing to ground or n+diffusion crossing to vdd and the production method thereof

Country Status (4)

Country Link
US (1) US6856031B1 (zh)
JP (1) JP4425153B2 (zh)
CN (1) CN100479165C (zh)
TW (1) TWI315523B (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100650867B1 (ko) * 2005-12-29 2006-11-28 동부일렉트로닉스 주식회사 협채널 금속 산화물 반도체 트랜지스터
US7869262B2 (en) * 2007-01-29 2011-01-11 Taiwan Semiconductor Manufacturing Co., Ltd. Memory device with an asymmetric layout structure
JP2009070959A (ja) * 2007-09-12 2009-04-02 Nec Electronics Corp 半導体記憶装置
JP2009088391A (ja) * 2007-10-02 2009-04-23 Nec Electronics Corp 半導体記憶装置および半導体記憶装置の製造方法
KR101863224B1 (ko) * 2011-12-21 2018-07-06 에스케이하이닉스 주식회사 반도체 장치
KR101802882B1 (ko) * 2013-08-16 2017-11-30 인텔 코포레이션 저항성 메모리를 사용하는 기억을 갖는 메모리 셀
US9263550B2 (en) 2014-04-17 2016-02-16 International Business Machines Corporation Gate to diffusion local interconnect scheme using selective replacement gate flow

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5124774A (en) 1990-01-12 1992-06-23 Paradigm Technology, Inc. Compact SRAM cell layout
US5359226A (en) 1993-02-02 1994-10-25 Paradigm Technology, Inc. Static memory with self aligned contacts and split word lines
JPH07147269A (ja) 1993-11-24 1995-06-06 Tokyo Electron Ltd 処理装置
US5525923A (en) * 1995-02-21 1996-06-11 Loral Federal Systems Company Single event upset immune register with fast write access
US5946566A (en) 1996-03-01 1999-08-31 Ace Memory, Inc. Method of making a smaller geometry high capacity stacked DRAM device
US5892707A (en) 1997-04-25 1999-04-06 Micron Technology, Inc. Memory array having a digit line buried in an isolation region and method for forming same
US7305486B2 (en) 2000-06-30 2007-12-04 Kanad Ghose System and method for fast, reliable byte stream transport

Also Published As

Publication number Publication date
CN100479165C (zh) 2009-04-15
JP2005236282A (ja) 2005-09-02
US6856031B1 (en) 2005-02-15
TW200531065A (en) 2005-09-16
CN1652337A (zh) 2005-08-10
JP4425153B2 (ja) 2010-03-03

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees