TWI313893B - - Google Patents

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Publication number
TWI313893B
TWI313893B TW095141331A TW95141331A TWI313893B TW I313893 B TWI313893 B TW I313893B TW 095141331 A TW095141331 A TW 095141331A TW 95141331 A TW95141331 A TW 95141331A TW I313893 B TWI313893 B TW I313893B
Authority
TW
Taiwan
Prior art keywords
substrate
gas
processing
wafer
processing chamber
Prior art date
Application number
TW095141331A
Other languages
English (en)
Chinese (zh)
Other versions
TW200739701A (en
Inventor
Yusuke Muraki
Shigeki Tozawa
Takehiko Orii
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200739701A publication Critical patent/TW200739701A/zh
Application granted granted Critical
Publication of TWI313893B publication Critical patent/TWI313893B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0451—Apparatus for manufacturing or treating in a plurality of work-stations
    • H10P72/0452—Apparatus for manufacturing or treating in a plurality of work-stations characterised by the layout of the process chambers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0431—Apparatus for thermal treatment
    • H10P72/0434—Apparatus for thermal treatment mainly by convection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0478—Apparatus for manufacture or treatment the substrates being processed being not semiconductor wafers, e.g. leadframes or chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/76—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches
    • H10P72/7604—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support
    • H10P72/7614—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using mechanical means, e.g. clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling

Landscapes

  • Drying Of Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
TW095141331A 2005-11-08 2006-11-08 Apparatus and method for processing substrate and recording medium TW200739701A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005323329A JP4976002B2 (ja) 2005-11-08 2005-11-08 基板処理装置，基板処理方法及び記録媒体

Publications (2)

Publication Number Publication Date
TW200739701A TW200739701A (en) 2007-10-16
TWI313893B true TWI313893B (https=) 2009-08-21

Family

ID=38023193

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095141331A TW200739701A (en) 2005-11-08 2006-11-08 Apparatus and method for processing substrate and recording medium

Country Status (3)

Country Link
JP (1) JP4976002B2 (https=)
TW (1) TW200739701A (https=)
WO (1) WO2007055190A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5478280B2 (ja) * 2010-01-27 2014-04-23 東京エレクトロン株式会社 基板加熱装置および基板加熱方法、ならびに基板処理システム
JP6400361B2 (ja) 2014-07-16 2018-10-03 東京エレクトロン株式会社 基板洗浄方法、基板処理方法、基板処理システム、および半導体装置の製造方法
JP6692202B2 (ja) * 2016-04-08 2020-05-13 東京エレクトロン株式会社 基板処理方法及び基板処理装置
JP7145019B2 (ja) * 2018-09-19 2022-09-30 株式会社Ｓｃｒｅｅｎホールディングス レシピ変換方法、レシピ変換プログラム、レシピ変換装置および基板処理システム

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4124543B2 (ja) * 1998-11-11 2008-07-23 東京エレクトロン株式会社 表面処理方法及びその装置
JP2004128019A (ja) * 2002-09-30 2004-04-22 Applied Materials Inc プラズマ処理方法及び装置
JP4039385B2 (ja) * 2003-04-22 2008-01-30 東京エレクトロン株式会社 ケミカル酸化膜の除去方法

Also Published As

Publication number Publication date
WO2007055190A1 (ja) 2007-05-18
JP4976002B2 (ja) 2012-07-18
JP2007134379A (ja) 2007-05-31
TW200739701A (en) 2007-10-16

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