1299555 九、發明說明： 【發明所屬之技術領域] 本發明係為-種半導體構裝元件及製程方法，尤指— ^化製程方式而可達到降低成本之覆晶構裝元件及製程 方法。 L先前技術】 隨著電子產品的高速度化、高效能化、_輕、薄、短 ==低價化的趨勢愈來愈日糊，覆晶___ 成為構衣連接導通之主要架構。覆晶技術的導通方式大致旧 =金屬導通、導轉、異方性導電膠材、導電性樹脂等等 二^方性導電膠材中的異方性導電膜(Anisotr〇pic A(T，CF)或異方性導電膠（AniS〇tr〇PiC Conductiv AdWe，ACA)則是廣泛被應用於液晶顯示器與驅動忙 連接，其封裝製程係使用破璃覆晶(Chi ic紐對準破璃基板上的電路藉由： 的中間材科作輕，搭配使用異方性導電 積^量的度佳，對於液晶顯示器來說將可達到減少體 CQG功餘是先將面板放置補#平面上，以婉 由輸送帶送人機台定位點，此時異方性Ϊ 、- /、電膠會先打貼附於面板，再進行驅動圯的對 1299555 =，：後進行麵’然後決定下一個定位點，進行加敎 業’使驅動ic能夠固定於面板基板上，完成c〇g作業。 如美國專觀us 4，·，657是·異方性導電膠連结電路 的結構，其結構示意崎參考第-圖，膠黏劑K)及導電粒子 12為軟性及_材料且同時接觸混合，膠黏劑1〇經由加孰和 加屋於導體13，14之間形成導電膠15，其導體13，14上夂且 有玻璃基板16。 "具 一另有一習知技術為金屬凸塊上貼附導電膠材，其製造過 不思考第—圖’先在玻璃基板16上貼導電膠丨5， 直接將驅動1C 17形成於導電膠15上。 、然而’異方性導電膜或異方性導電膠有些缺點，如(1)異方 性導電膜f異紐導轉之默祕料，因為捲帶寬度有限 制而^寬度储，轉IC的尺相料者，所以在切割時不能 刀太薄例如驅動1C的寬度，於切割時捲帶寬度可為 Pic著驅動1C的設計趨向小型化，捲帶寬度將面臨寬^ ^極限，所以會產生無法言免計出捲帶的寬度；（2)含有高密度的 導電顆粒不編彳分佈，會影響_絲；以及⑶高度上有限制， 高密度接合時會有短路情況發生。 ^再者’美國專利號US 6,518,097B1所揭露使用異方性導電 膜或異方轉電膠及搭配祕錫型之金屬凸塊，而製程步驟為 先上膠材後，再進行晶圓切割。 ，变明茶考第三圖，係為習知使用預塗佈異方性導電膠於晶圓 尘復曰曰封裹之剖面示意圖，包括於一晶圓20上載有許多的晶 1299555 片’母—個晶片至少有一個輸入/輸出墊22用以連接訊號及一 鈍化層24，在每一晶圓晶片上形成一低價非焊錫型之金屬凸塊 ^接著紐-異雜導電膠層28於晶圓2()上，最後在異方 性導電膠層28形成一保護層3〇。 =之美國專利號US6,518,〇97bi有—些缺點，如使用異 ===或異方性導電觀必須搭配麵_之金屬凸塊， 而且製程步驟是先上膠材再進行切割動作。 【發明内容】 姑所於上述採料方性導電膜或異方性導電膠之膠 m 2缺點、’、㈣人遂提出—種半導體構裝元件及製 师配决上述白知技術之異方性導電膜或異方性導電 膠I合配金屬凸塊所產生之缺點。 ^發明係於晶圓之晶粒上使用膠材及彈性凸塊 b_)n作出上述之半導體構裝元件，本發 2使用之膠材可選自於導電膠、導電膜、非導電膠、非 之彈性使㈣專利號第use’™揭露 树料導體構裝元件包括於—晶圓之一晶粒上形 至^彈性凸塊，接著於該晶圓之該晶粒及該些彈性凸 設ir膠材，’然後切割該晶圓成為個別之該晶粒，最 »亥曰0粒使用覆晶接合之技術完成半導體構裝元件。本 J299555 ^明之製财法於實施時，可先設轉料 仃切割晶圓動作，或先進行切割晶圓 ^ : 執行設置膠材動作，當使用先 接者於S曰0上 避# 士刀室|丨访尸《 , 社上备材之方式，係可 免切騎相留於《及水氣影響膠材。 習知技術使用異方性導電膜 材料生產階段時，㈣㈣覆晶封裝時，於 需要依照驅動iC外型寬度尺寸先行::型：方性導電膜 十捲不等適當寬度的細條捲帶狀，且錢^成數捲到數 導電膜需要在基板上執行預貼動作^二段，異方性 本發明之半導體難元件因於包 ^於習知技術， j自於大面積的導電膠、導電膜、非導電:的使用 紫外線膠或紫外銬腺* 7 ，卜夺免私、非導電膜、 程序之任一步驟進行，】η材後’接著選擇以下兩種 同膠材同時進行二； 材谬材，最後進行分離。經由上^先進行切割後再使用 成為表面貼附有膠材的單—晶粒以壬—步驟完成後即可 材不需要事先分條及預貼之動作从本發明所使用之膠 可有效降低製作成本、可獲得良^減少製程步驟，故 式的製作尺寸最小寬度極限的限突破傳統捲帶 詳細特徵與實作，兹配合圖示作最佳實施例 實施方式】 10 1299555 請參寺第四4圖至第四 -實施例半導體構裝元件之製:分7 =為本發明第 贴附膠材再進行 圖’本貫施例是以先 行在—切 乂動作’於製作+導體構裝元件時，先 上設置—固定：《供一環型框架⑬，在環型框架42 -晶圓20愈切·二咖）44 ’透過固定谬44以固定 ”切咅機台40,此時在晶圓州曰士、， 彈性凸塊，接著設置一膠 # ，、有夕— 之設置方式可佐踩奸/ΐ/ Α復盍晶圓20上，膠材46 態為膠狀日士 2乡 之型態而有不同，若膠材46之型1299555 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a semiconductor package component and a process method, and more particularly to a process for reducing the cost of a flip chip package component and a process method. L Prior Art] With the high speed, high efficiency of electronic products, _ light, thin, short == low-cost trend is becoming more and more ambiguous, flip-chip ___ becomes the main structure of the construction connection. The conduction mode of the flip chip technology is almost old = metal conduction, conduction, anisotropic conductive rubber, conductive resin, etc. Anisotropic conductive film in the two-way conductive adhesive material (Anisotr〇pic A (T, CF) Or anisotropic conductive adhesive (AniS〇tr〇PiC Conductiv AdWe, ACA) is widely used in liquid crystal display and drive busy connection, its packaging process uses broken glass flip chip (Chi ic button on the glass substrate) The circuit is made of: the middle material is light, and the degree of the anisotropic conductive product is good. For the liquid crystal display, the reduction of the body CQG power can be achieved by placing the panel on the # plane first. The conveyor belt is sent to the positioning point of the machine. At this time, the anisotropy -, - /, and the electric glue will be attached to the panel first, and then the drive 圯 pair 1299555 =,: after the surface 'and then determine the next positioning point For the twisting industry, the driving ic can be fixed on the panel substrate to complete the c〇g operation. For example, the US monolithic us 4, ·, 657 is the structure of the anisotropic conductive adhesive connecting circuit, and its structure shows the reference First, the adhesive K) and the conductive particles 12 are soft and _ materials and are simultaneously connected Mixing, the adhesive 1〇 forms a conductive paste 15 between the conductors 13, 14 via twisting and adding, and the conductors 13, 14 are on the top and have a glass substrate 16. "There is another conventional technique for metal bumps." The conductive adhesive material is attached to the block, and the manufacture is not considered. The first figure is first attached with a conductive adhesive tape 5 on the glass substrate 16, and the driving 1C 17 is directly formed on the conductive adhesive 15. However, the anisotropic conductive film or There are some disadvantages of the anisotropic conductive adhesive, such as (1) the anisotropic conductive film f-neutral transfer to the silent material, because the width of the tape is limited and the width is stored, the IC is transferred to the ruler, so when cutting It is not possible to make the knife too thin, for example, to drive the width of 1C. When cutting, the width of the tape can be miniaturized, and the width of the tape will be widened. Therefore, the width of the tape can not be counted. (2) The high-density conductive particles are not braided and will affect the _ wire; and (3) there is a limit in height, and a short circuit occurs at the time of high-density bonding. ^ Further, the use of US Patent No. US 6,518,097 B1 is disclosed. Anisotropic conductive film or anisotropic transfer glue and gold with a secret tin type Bumps, and the process steps are to first apply the glue and then perform the wafer cutting. The third picture of the tea is the conventional use of pre-coated anisotropic conductive adhesive on the wafer dust retanning package. The cross-sectional view includes a plurality of crystals of 1299555 sheets on a wafer 20. The mother-chip has at least one input/output pad 22 for connecting signals and a passivation layer 24, forming a low on each wafer. The non-solder type metal bumps ^ then the neo-hetero-conductive layer 28 are on the wafer 2 (), and finally a protective layer 3 is formed on the anisotropic conductive layer 28. 之 US Patent No. US 6,518 , 〇97bi has some shortcomings, such as the use of different === or anisotropic conductive view must match the metal bump of the surface, and the process step is to first apply the glue and then cut. SUMMARY OF THE INVENTION The disadvantages of the above-mentioned materials for the detection of the square conductive film or the anisotropic conductive rubber m 2 , ', (4) people proposed - a semiconductor component and the division of the above-mentioned white technology The disadvantage that the conductive film or the anisotropic conductive paste I combines with the metal bumps. The invention uses the rubber material and the elastic bump b_)n on the die of the wafer to make the above-mentioned semiconductor component. The glue used in the present invention 2 can be selected from the conductive adhesive, the conductive film, the non-conductive adhesive, and the non-conductive adhesive. The elasticity makes the (4) patent number of the 'TM exposed tree material conductor component included on one of the wafers to form an elastic bump, and then the die and the elastic protrusions of the wafer The glue material, 'then cut the wafer into individual dies, and the most 曰 曰 0 granules use the technology of flip chip bonding to complete the semiconductor package components. In the implementation of this J299555 ^ Mingzhi method, you can set the transfer 仃 cutting wafer action, or first cut the wafer ^: Perform the setting glue action, when using the first picker on S曰0 to avoid #士刀Room|丨访尸", the way of preparing materials on the society, can be kept away from the "water and gas impact adhesives." When the conventional technology uses the anisotropic conductive film material production stage, (4) (4) flip chip packaging, in order to drive the iC outer shape width dimension first:: type: square conductive film ten rolls of different widths of thin strips, And the amount of money to be rolled into the number of conductive films needs to be performed on the substrate. The semiconductor difficult component of the present invention is made of a large-area conductive paste and a conductive film. Non-conducting: use UV glue or UV sputum * 7 , smuggle free, non-conductive film, any step of the procedure, after η material 'then select the following two kinds of the same material at the same time; Material, and finally separated. After the cutting is performed by the upper surface and then the single-grain is attached to the surface with the rubber material, the step is completed, and the glue can be effectively reduced from the glue used in the present invention without the need for prior striping and pre-sticking operations. The production cost, the good can be reduced, the process steps are reduced, and the minimum width limit of the production size of the formula breaks through the detailed features and implementation of the traditional tape. The figure is shown as the best embodiment. 10 1299555 Please refer to the fourth 4 to 4 - Embodiment of the semiconductor package component: 7 = the attached material of the present invention is further illustrated. The present embodiment is preceded by - cutting action to fabricate + conductor assembly components First, set up - fixed: "for a ring frame 13, in the ring frame 42 - wafer 20 more than two coffee" 44 'through the fixed 谬 44 to fix the "cutting machine 40, at this time in the wafer The state gentleman, the elastic bump, and then set a glue #,, the eve - the setting method can be used to tamper with / ΐ / Α 盍 盍 on the wafer 20, the glue 46 state is a gel-like Japanese style 2 township type The state is different, if the type of glue 46
〜、雜狀4，歧置方式是透過現有之 〜I 行塗佈或喷霧動作所達成 ▲佈或貝務§又傷執 狀時，則設置方切 反之，右膠材46之型態為膜 去，為於晶81 20上以直接貼附的方式心 、处公佈或嘴霧動作所形成之勝材46為 =需要藉由加熱或姨乾步驟後，將態界^ 〇 Ϊ之預固化成為膜狀，以利後續製程，膠材46之^ 4〇 I、卜、、泉膜其取佳貫施例為使用非導電膠道…多 紫外線膠或紫外線膜。 乂 V電膜、 接著使用-晶圓切割機48用以切割該晶圓 # 別之晶粒，再利用紫外線光照晶圓2〇，使得固定二έ type) 44失去黏性，如此可利於將晶圓2〇與切^ ue 達到分離動作，其分離完成後之結構立體圖請：考:台4〇 圖，經由上述切割動作，晶圓2Q已被切割成許多個== "立，如弟四B圖所示之晶粒A及晶粒B，在此以二個晶粒= 11 1299555 B為例子，晶粒A及晶粒B之放大圖如第 # 四C圖中是在切割後之晶粒5〇上具有該些彈性圖凸戶 而#_^性&：^上覆蓋著膠材46，該 金属層56及一凸塊52所構成。 凸免疋由一 -4:=圖及第咖，第五A圖係為本發明第 一只訑例+V粗構裝元件之製程分解圖，本蘇 切割再進行貼附膠材動作，於製作半導體構^疋以先 行在一切誠^域供—環雜架42，^=^先 上設置一固定膠（blue type) 44，透過固定J二^木42 -細與切割機台40，此時在勵上^ 彈性凸塊，接著使用一曰鬥+77叫地^ 匕具有至少一 成_之^再利用紫外線光照晶曰= (blue type) 44失去對地 、 使得固定膠 機台40達到分離動作此可利於將晶_與切割 第三B圖，經由上述:_元成後之結構立體圖請參考 別的晶粒， 相作，晶圓20已被切割成許多個 上 再參考第五B圖， ” 膠材46之設置方式 1置一膠材46且覆蓋晶圓20 膠材46之型態為膠狀時，^轉材46之型態而有不同，若 噴霧設備執行塗佈或嘴霧叙，方式是透過現有之塗佈或 之型態為膜狀時，則設置^乍所達成者，反之，若騎46 的方式達成者，上述塗佈於晶《^切直接貼附 一、務動作所形成之膠材46為膠 12 1299555 狀（液態），所以需要藉由加熱或供乾步驟後’將膠狀型態 之膠材46使之預固化成為膜狀，以利後續製程’膠材46 之材質依型態分為導電膠、導電膜、非導電膠、非導電膜、 紫外線膠或紫外線膜，其最佳實施例為使用非導電膠、非 導電膜、紫外線膠或紫外線膜。 於第五B圖中經切割後之晶圓已成為許多單個晶粒 5〇，如圖中所示之晶粒a及晶粒B所表示，而晶粒A及晶 粒B之放大圖是如同第四c圖，所以關於晶粒A及晶粒B 之内部結構請參考第四C圖，如此在此不再重述。 本發明第二實施例之切割步驟是在設置膠材之前，如 此可控制晶圓切割機48切割的深度，使其不要完全切開晶 圓，接著再上膠材46於晶圓20上，將晶圓20直接拉撐後 即可剝_晶圓20成為許多的晶粒，其拉撲是參考美國專利 US6, 939, 78·之技術，如此先切割晶圓再設置膠材之優 點在於避免_碎屑殘留於賴及水氣影響膠材特性。 本發明之固定膠44於半導體構裝元件上實施時，可 設置於晶圓2G同側或者對侧，上述第—實施例及第二實施 例中固定膠44所設置的位置皆都是在晶圓2〇同侧。接著 請參考第六A圖所示為晶粒5〇放大示意圖，在第六八圖 中，是以兩個晶粒50為例子說明，於固定膠44上貼附有 晶粒50，晶粒50上具有該些彈性凸塊，該些彈性凸塊是 由-金屬層56及-凸塊52所構成，再使用膠材覆蓋於 該些彈性凸塊及晶粒5Q。另，固定膠44之位置亦可設置 13 I299555 而日c]對側’如第六B圖所示為晶粒別放大示意圖’然 ^在此固定膠44戶斤設置之位置剛好與第六A圖相反，在 腿：不：固定膠44是設置於膠材之上。當固定膠設置於該 I上時，需在晶圓背面另外設定至少一定位點（Mark)， 疋位=係^後續_定位相❹。 、狂人考第七圖，係為本發明之半導體構裝元件與基板 姓圖’半導體構裝元件包括晶粒50上有至少一彈 作级i ’及膠材46 ’利用加熱及加壓手段達到與一基板54 一之步驟，基板54之材質可為玻璃、軟板或陶甍基板 膠、=明所使用之膠材可為導電膠、導電膜、非導， 以大幅減少習知導：外線膠或紫外線膜的材料，^ 導電臈較非導電膜電=電膜的使用成本，因導她 中多了導電性的顆:，:::高 要晶粒可㈣祕4式使訂寬度的限制，」 裝機台組t，;=的尺寸，都可以綱搭配後段覆⑸ 生產線上可節省^“導轉或導賴機台預貼，所」 導電膜材料轉換成非t設備的養護成本’加上由導電 線膜，材料杰士成導電膠、非導賴、紫外線膠 、〃本降低，所以整體成本也大大降低。 14 1299555 接合設備在做影像對位時，因習知技術us 6, 518, 097B1所使用之導電膠内含有高密度的導電顆粒不 規則分佈的緣故，所以會影響辨識結果，然而，本發明係 使用屬於透明膠之非導電膠或紫外線膠，所以相較於習知 技術較不會影響影像辨識，且導電膠或導電膜有密度 (pitch)上限制，於高密度（fine pitch)接合時會有短路情 況發生，而使用非導電膠、非導電膜、紫外線膠或紫外線 膜無導電顆粒，使用上無密度（pitch)的限制，適合發展高 密度（fine pitch)構裝接合。且本發明所使用的彈性凸塊 可以搭配導電膠、導電膜、非導電膠、非導電膜、紫外線 膠或紫外線膜膠材使用，然而習知之非焊錫型之金屬凸塊 只能搭配導電膠或導電膜使用。 本發明與美國專利US 6,518,097B1之比較結果，以 列表方式整理如下： 美國專利US 6,518,097B1 本發明 比較結果 膠材 形成 異方性導電膜或 異方性導電膠 異方性導電 膜、異方性導 電膠非導電 膠、非導電 膜、紫外線膠 或紫外線膜 1. 非導電膠/非導電 膜製作及材料成本 較異方性導電膜/ 異方性導電膠低 2. 接合設備在做影像 對位時，非導電膠/ 非導電膜屬於透明 15 1299555 膠，不影響影像辨識， 異方性導電膜/異 方性導電膠因為含 有南密度的導電顆 粒不規則分佈，會影 響辨識結果 3.異方性導電膜/異 方性導電膠有密度 上限制，高密度接 合（fine patch)會短 路情況發生，而非 導電膠/非導電膜 無導電顆粒，使用 上無密度限制，適 合發展高密度構裝 接合 凸塊 形成 非焊錫型之金屬 凸塊 彈性凸塊 1. 非焊錫型之金屬凸 塊只能搭配異方性 導電膜或異方性導 電膠 2. 彈性凸塊可搭配異 方性導電膜、異方 性導電膠非導電 1299555 膠、非導電膜、紫 外線膠或紫外線膜 製造 步驟 先上膠再切割 1. 先上膠，再 切割 2. 先切割，再 上膠 先切割再上膠之優點 在於避免切割碎屑殘 留於膠體及水氣影響 膠材特性 雖然本發明以前述之較佳實施例揭露如上，然其並非 用以限定本發明。在不脫離本發明之精神和範圍内，所為 • 之更動與潤飾，均屬本發明之專利保護範圍。關於本發明 所界定之保護範圍請參考所附之申請專利範圍。 【圖式簡單說明】 第一圖係為習知異方性導電膠連結電路的結構示意圖； 第二圖係為習知技術之金屬凸塊上貼附導電膠材製程示意 圖； 第三圖係為習知使用預塗佈異方性導電膠於晶圓型覆晶封 參 裝之剖面示意圖； 第四A圖係為本發明第一實施例半導體構裝元件之製程分 解圖； • 第四B圖係為本發明之先貼附膠材再進行切割動作之立體 示意圖； 第四C圖中係為本發明切割後之晶粒放大示意圖； 第五A圖係為本發明第二實施例半導體構裝元件之製程分 17 1299555 解圖； 第五B圖係為本發明之先切割再進行貼附膠材之立體示意 圖； 第六A圖係為本發明之固定膠設置於半導體構裝元件之晶 圓侧示意圖； 第六B圖係為本發明之固定膠設置於半導體構裝元件之膠 材示意圖；及 第七圖係為本發明之半導體構裝元件結合與基板之示意 圖。 【主要元件符號說明】 膠黏劑 導電粒子 導體 導電膠 玻璃基板 晶圓 10 12 13，14 15 16 20 輸入/輸出墊 22 鈍化層 24 非焊錫型之金屬凸塊 26 異方性導電膠層 28 保護層 30 切割機台 40 18 1299555 環型框架 42 固定膠 44 膠材 46 晶圓切割機 48 晶粒 50 凸塊 52 基板 54 金屬層 56 19~, miscellaneous 4, the dislocation method is achieved through the existing ~I line coating or spraying action ▲ cloth or 务 又 又 又 又 又 又 又 又 又 伤 伤 则 则 设置 设置 设置 设置 设置 设置 反之 反之 反之 反之 反之The film is removed, and the material 46 formed on the crystal 81 20 in a direct attachment manner, which is formed by the heart, the surface, or the mist action of the mouth is = need to be pre-cured by the heating or drying step. It is made into a film shape to facilitate the subsequent process, and the adhesive material 46 is used for the use of non-conductive rubber channels...multi-ultraviolet glue or ultraviolet film.乂V film, then use-wafer cutter 48 to cut the wafer #, and then use ultraviolet light to illuminate the wafer 2〇, so that the fixed έ type 44 loses viscosity, which can facilitate the crystal The round 2 〇 and the cut ue reach the separation action, and the structure of the structure after the separation is completed: test: 4, the wafer 2Q has been cut into many == " The grain A and the grain B shown in Fig. B are exemplified by two grains = 11 1299555 B. The enlarged views of the grain A and the grain B are as shown in the #4 C picture. The granules 5 具有 have the elastic embossments and the _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The convex exemption is made up of a -4:= diagram and the first coffee, and the fifth A diagram is the process decomposition diagram of the first example of the invention + V rough component, and the su-cutting is followed by the action of attaching the glue. To make a semiconductor structure, first set a fixed type (blue type) 44 on all the holes in the domain, and then fix the J 2 wood 42-fine and cutting machine 40. At the time of excitation ^ elastic bumps, then use a bucket +77 called ground ^ 匕 has at least one _ ^ ^ then use ultraviolet light crystal 曰 = (blue type) 44 lost to the ground, so that the fixed glue machine 40 reached The separation operation can facilitate the crystallization and the dicing of the third B-picture. Please refer to the other dies by the above-mentioned structural perspective view. The wafer 20 has been cut into a plurality of parts and then referenced to the fifth B. Fig., ” The setting method of the adhesive material 46 is such that the adhesive material 46 is placed and the wafer 20 is covered. When the type of the adhesive material 46 is gelatinous, the shape of the rotary material 46 is different, if the spray device performs coating or mouth In the case of fog, the method is to set the film through the existing coating or the shape, and if the method of riding 46 is reached, the above coating Yu Jing “^ directly cuts one, and the glue 46 formed by the action is glue 12 1299555 (liquid), so it needs to be pre-prepared by the glue type 46 after heating or drying. Curing into a film shape, in order to facilitate the subsequent process, the material of the adhesive material 46 is classified into a conductive adhesive, a conductive film, a non-conductive adhesive, a non-conductive film, a UV adhesive or an ultraviolet film according to the type, and the preferred embodiment is a non-conductive adhesive. , non-conductive film, ultraviolet glue or ultraviolet film. The wafer after dicing in Figure 5B has become a number of individual grains 5 〇, as shown in the figure a and grain B, and crystal The enlarged view of the grain A and the grain B is the same as the fourth c. Therefore, please refer to the fourth C diagram for the internal structure of the grain A and the grain B, and thus will not be repeated here. The cutting step is such that before the glue is set, the depth of the wafer cutter 48 can be controlled so that the wafer is not completely cut, and then the glue 46 is applied to the wafer 20, and the wafer 20 is directly pulled. The strippable wafer 20 becomes a plurality of crystal grains, and the pull tab is referred to US Patent No. 6,939,78. The technology of cutting the wafer and then setting the glue firstly has the advantage of avoiding _chip residue and moisture affecting the characteristics of the glue. The fixing glue 44 of the present invention can be disposed on the wafer when implemented on the semiconductor component. 2G is the same side or the opposite side, and the positions of the fixing glues 44 in the above-mentioned first embodiment and the second embodiment are all on the same side of the wafer. Next, please refer to the figure 6A for the grain 5〇. In the sixth diagram, the two crystal grains 50 are taken as an example. The die 50 is attached with the die 50, and the die 50 has the elastic bumps. The elastic bumps are The metal layer 56 and the bump 52 are formed, and the elastic bumps and the crystal grains 5Q are covered with a rubber material. In addition, the position of the fixing glue 44 can also be set to 13 I299555 and the day c] the opposite side as shown in the sixth figure B is a magnified schematic view of the die. In contrast, in the leg: no: the fixing glue 44 is placed on the glue. When the fixing glue is disposed on the I, at least one positioning point (Mark) needs to be set on the back side of the wafer, and the clamping position is followed by the positioning. The seventh figure of the madman test is the semiconductor component and substrate name of the present invention. The semiconductor component includes at least one elastic stage i ' and the glue material 46 on the die 50. In the step of a substrate 54, the material of the substrate 54 can be glass, soft board or ceramic substrate glue, and the rubber used in the Ming can be conductive adhesive, conductive film, non-conductive, to greatly reduce the conventional guide: the outer line The material of the glue or ultraviolet film, ^ conductive 臈 is more than the non-conductive film electricity = the use cost of the electric film, because she has more conductive particles:, ::: high grain can be (4) secret type 4 to make the width Restrictions," The size of the installed station group t,; = can be combined with the rear section (5) The production line can save ^ "conducting or guiding the pre-paste of the machine," the cost of the conversion of conductive film material into non-t equipment' In addition, the conductive film, the material Jasmine conductive adhesive, non-guided, ultraviolet glue, and sputum are reduced, so the overall cost is also greatly reduced. 14 1299555 When the bonding device is used for image alignment, the conductive paste used in the prior art us 6, 518, 097B1 contains irregular distribution of high-density conductive particles, so the identification result is affected. However, the present invention uses It is a non-conductive glue or UV glue of transparent plastic, so it will not affect image recognition compared with the prior art, and the conductive adhesive or conductive film has a limit on the pitch, and there will be a high pitch (fine pitch) joint. A short circuit condition occurs, and the use of non-conductive glue, non-conductive film, ultraviolet glue or ultraviolet film without conductive particles, using a pitch-free limitation, is suitable for developing a fine pitch structure joint. Moreover, the elastic bump used in the present invention can be used with a conductive adhesive, a conductive film, a non-conductive adhesive, a non-conductive film, a UV adhesive or an ultraviolet film adhesive. However, the conventional non-solder metal bump can only be used with a conductive adhesive or Conductive film is used. The results of the comparison with the US Patent No. 6,518,097 B1 are summarized as follows: US Patent No. 6,518,097 B1 The comparison result of the present invention forms an anisotropic conductive film or an anisotropic conductive adhesive anisotropic conductive film, anisotropy. Conductive adhesive non-conductive adhesive, non-conductive film, UV adhesive or UV film 1. Non-conductive adhesive / non-conductive film fabrication and material cost is more than anisotropic conductive film / anisotropic conductive adhesive 2. 2. Bonding equipment in the image alignment When the non-conductive adhesive/non-conductive film belongs to the transparent 15 1299555 adhesive, it does not affect the image recognition. The anisotropic conductive film/isotropic conductive adhesive will affect the identification result because of the irregular distribution of the conductive particles containing the south density. The conductive film/isotropic conductive paste has a density limitation, the high-density joint (fine patch) may cause a short circuit, and the non-conductive rubber/non-conductive film has no conductive particles, and has no density limitation in use, and is suitable for developing a high-density package. Bonding bumps form non-solder type metal bump elastic bumps 1. Non-solder type metal bumps can only be combined with anisotropic conductive films or anisotropic conductive pastes 2. Elastic bumps can be matched with anisotropic conductive film, anisotropic conductive adhesive non-conductive 1299555 glue, non-conductive film, UV glue or UV film. Steps are first applied and then cut. 1. Apply glue first, then cut 2. The advantages of cutting, re-sizing, and then sizing are to avoid the residue of the swarf and the moisture and the influence of the slag. Although the present invention is disclosed above in the preferred embodiment, it is not intended to limit the present invention. The modifications and refinements of the present invention are within the scope of the invention. Please refer to the attached patent application for the scope of protection defined by the present invention. BRIEF DESCRIPTION OF THE DRAWINGS The first figure is a schematic diagram of the structure of a conventional anisotropic conductive adhesive connecting circuit; the second figure is a schematic diagram of a process of attaching a conductive adhesive to a metal bump of the prior art; A schematic cross-sectional view of a pre-coated anisotropic conductive paste on a wafer-type flip-chip package; a fourth embodiment is a process exploded view of the semiconductor package component of the first embodiment of the present invention; The present invention is a schematic view of the first embodiment of the present invention. The fourth embodiment is a schematic view of the second embodiment of the present invention. The process of the component is divided into 17 1299555; the fifth B is a schematic view of the first cutting and then attaching the adhesive material of the present invention; the sixth drawing is the wafer of the fixing adhesive of the invention disposed on the semiconductor component FIG. 6B is a schematic view showing the adhesive of the fixing adhesive of the present invention disposed on the semiconductor component; and the seventh drawing is a schematic view of the semiconductor component of the present invention combined with the substrate. [Main component symbol description] Adhesive conductive particle conductor Conductive adhesive glass substrate wafer 10 12 13,14 15 16 20 Input/output pad 22 Passivation layer 24 Non-solder type metal bump 26 Anisotropic conductive adhesive layer 28 Protection Layer 30 Cutting machine 40 18 1299555 Ring frame 42 Fixing glue 44 Glue 46 Wafer cutting machine 48 Die 50 Bump 52 Substrate 54 Metal layer 56 19