JP2003023034A - Flip-chip mounting method - Google Patents
Flip-chip mounting methodInfo
- Publication number
- JP2003023034A JP2003023034A JP2001205510A JP2001205510A JP2003023034A JP 2003023034 A JP2003023034 A JP 2003023034A JP 2001205510 A JP2001205510 A JP 2001205510A JP 2001205510 A JP2001205510 A JP 2001205510A JP 2003023034 A JP2003023034 A JP 2003023034A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- resin
- resin layer
- flip
- protruding electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/731—Location prior to the connecting process
- H01L2224/73101—Location prior to the connecting process on the same surface
- H01L2224/73103—Bump and layer connectors
- H01L2224/73104—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、所定の導電部を設
けた回路基板上にチップを固定し、チップと回路基板と
を電気的に接続するフリップチップ実装方法に関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip chip mounting method for fixing a chip on a circuit board provided with a predetermined conductive portion and electrically connecting the chip and the circuit board.
【0002】[0002]
【従来の技術】従来のフリップチップ実装方法として
は、例えば、図4に示すように、チップ1の実装面に設
けたAl等の電極パッド2上にハンダバンプ等の突起電
極3を形成し、チップ1をひっくり返して突起電極3を
回路基板4上の所定の位置に搭載しチップ1に設けた突
起電極3と回路基板4表面に設けられた基板電極等の導
電部5とを接続させるような方法があげられる。2. Description of the Related Art As a conventional flip chip mounting method, for example, as shown in FIG. 4, a bump electrode 3 such as a solder bump is formed on an electrode pad 2 made of Al or the like provided on a mounting surface of a chip 1, and a chip is formed. 1 is turned over to mount the protruding electrode 3 at a predetermined position on the circuit board 4 so that the protruding electrode 3 provided on the chip 1 and the conductive portion 5 such as a substrate electrode provided on the surface of the circuit board 4 are connected. There is a method.
【0003】このフリップチップ実装方法では、複数枚
(図4においては2枚)のエポキシ樹脂等の熱硬化性の
樹脂をフィルム状に加工した樹脂フィルム6を回路基板
4の導電部5を有した表面に導電部5を覆うように設
け、チップ1に設けた突起電極3を複数枚の樹脂フィル
ム6上から回路基板4に対し、突起電極3が導電部5に
到達するようにチップ1を樹脂フィルム6に押圧して電
気的に接続するものである。そして、加熱処理を施すこ
とで、樹脂フィルム6が硬化される。In this flip-chip mounting method, a plurality of (two in FIG. 4) resin films 6 obtained by processing a thermosetting resin such as an epoxy resin into a film shape are provided on the conductive portion 5 of the circuit board 4. The protruding electrode 3 provided on the surface so as to cover the conductive portion 5 is provided on the chip 1 with resin so that the protruding electrode 3 reaches the conductive portion 5 from the plurality of resin films 6 to the circuit board 4. The film 6 is pressed and electrically connected. Then, the resin film 6 is cured by performing heat treatment.
【0004】このように樹脂フィルム6を用いたフリッ
プチップ実装方法は、チップ1側の突起電極3と回路基
板4側の導電部5との電気的な接続と樹脂の充填が一度
で済むため効率的である。As described above, the flip-chip mounting method using the resin film 6 is efficient because electrical connection between the protruding electrode 3 on the chip 1 side and the conductive portion 5 on the circuit board 4 side and resin filling are performed only once. Target.
【0005】[0005]
【発明が解決しようとする課題】ところが、上述のよう
な樹脂フィルムを用いたフリップチップ実装方法におい
ては、例えば厚み30μm程度の樹脂フィルムを複数枚
(通常2〜3枚)重ねて使用する必要がある。However, in the flip-chip mounting method using a resin film as described above, it is necessary to stack a plurality of resin films (usually 2 to 3) with a thickness of about 30 μm. is there.
【0006】これは、例えば、回路基板側の導電部とし
て基板電極を用いる際には、該基板電極の高さは通常3
0μm以上あり、チップの突起電極も通常30μm以上
あるため、フリップチップ実装時のチップと回路基板と
の隙間は60μm以上になるため、厚みが30μm程度
の樹脂フィルム一枚では、チップと回路基板の隙間を埋
めるのに不十分であるためである。This is because, for example, when a board electrode is used as a conductive portion on the circuit board side, the height of the board electrode is usually 3
Since it is 0 μm or more, and the protruding electrode of the chip is usually 30 μm or more, the gap between the chip and the circuit board at the time of flip chip mounting is 60 μm or more. This is because it is insufficient to fill the gap.
【0007】樹脂フィルムを複数枚重ねて使用する場合
には、チップ側の突起電極は、複数枚の樹脂フィルムを
全て突き破って回路基板側の導電部と接続する必要があ
るので、樹脂フィルムが厚くなるにつれ、突起電極が樹
脂フィルムを突き破りにくくなり、その結果、突起電極
と導電部との間で接続不良が発生する可能性があるとい
う問題点や、歩留まりが低下するという問題点があっ
た。When a plurality of resin films are stacked and used, it is necessary for the protruding electrodes on the chip side to break through the plurality of resin films and be connected to the conductive portions on the circuit board side. As a result, the protruding electrode is less likely to break through the resin film, and as a result, there is a possibility that a defective connection may occur between the protruding electrode and the conductive portion, and there is a problem that the yield is reduced.
【0008】本発明は上記問題点を改善するためになさ
れたものであり、回路基板とチップとの安定した電気的
接続を実現するフリップチップ実装方法を提供すること
を目的とするものである。The present invention has been made to solve the above problems, and it is an object of the present invention to provide a flip chip mounting method for realizing stable electrical connection between a circuit board and a chip.
【0009】[0009]
【課題を解決するための手段】請求項1に記載のチップ
実装方法は、チップ1の実装面に設けた突起電極3と、
回路基板4の表面に設けた導電部5とを電気的に接続さ
せる工程を備えてなるフリップチップ実装方法におい
て、前記チップ1の実装面に前記突起電極3の高さと略
等しくなるように樹脂層7を設ける工程と、少なくとも
前記導電部5上に樹脂フィルム6を設ける工程と、前記
突起電極3が前記導電部5に到達するように前記チップ
1を前記樹脂フィルム6に押圧して接続する工程とを含
んでなることを特徴とするものである。A chip mounting method according to a first aspect of the present invention comprises a protruding electrode 3 provided on a mounting surface of the chip 1.
In a flip-chip mounting method including a step of electrically connecting to a conductive portion 5 provided on the surface of a circuit board 4, a resin layer is formed on the mounting surface of the chip 1 so as to have a height substantially equal to the height of the protruding electrode 3. 7, a step of providing a resin film 6 on at least the conductive portion 5, and a step of pressing and connecting the chip 1 to the resin film 6 so that the protruding electrode 3 reaches the conductive portion 5. It is characterized by including and.
【0010】また、請求項2に記載のフリップチップ実
装方法は、チップ1の実装面に設けた突起電極3と、回
路基板4の表面に設けた導電部5とを電気的に接続させ
る工程を備えてなるフリップチップ実装方法において、
突起電極3を備えてなる半導体基板8の実装面に前記突
起電極3の高さと略等しい厚さになるように樹脂層7を
設け、前記半導体基板8を前記樹脂層7とともに切断し
分離することにより素子個片であるチップ1を形成する
工程と、少なくとも前記導電部5上に樹脂フィルム6を
設ける工程と、前記突起電極3が前記導電部5に到達す
るように前記チップ1を前記樹脂フィルム6に押圧して
接続する工程とを含んでなることを特徴とするものであ
る。The flip-chip mounting method according to the second aspect of the present invention comprises a step of electrically connecting the protruding electrode 3 provided on the mounting surface of the chip 1 and the conductive portion 5 provided on the surface of the circuit board 4. In the provided flip-chip mounting method,
A resin layer 7 is provided on the mounting surface of the semiconductor substrate 8 having the protruding electrodes 3 so as to have a thickness approximately equal to the height of the protruding electrodes 3, and the semiconductor substrate 8 is cut and separated together with the resin layer 7. To form the chip 1 which is an element piece by the above, a step of providing a resin film 6 on at least the conductive portion 5, and the chip 1 to the resin film so that the protruding electrode 3 reaches the conductive portion 5. And a step of connecting by pressing.
【0011】また、請求項3に記載のフリップチップ実
装方法は、請求項1又は請求項2に記載の発明におい
て、前記チップ1又は前記半導体基板8の実装面を樹脂
フィルム70に対して、樹脂フィルム70と前記突起電
極3の高さとが略等しくなるまで押圧して、前記樹脂フ
ィルム70を前記チップ1又は前記半導体基板8の実装
面に設けることにより前記樹脂層7を形成することを特
徴とするものである。The flip-chip mounting method according to a third aspect of the present invention is the method of the first or second aspect, wherein the mounting surface of the chip 1 or the semiconductor substrate 8 is resin-coated with respect to the resin film 70. The resin layer 7 is formed by pressing the film 70 until the heights of the bump electrodes 3 become substantially equal to each other and providing the resin film 70 on the mounting surface of the chip 1 or the semiconductor substrate 8. To do.
【0012】また、請求項4に記載のフリップチップ実
装方法は、請求項1乃至請求項3のいずれかに記載の発
明において、前記突起電極3の高さより厚い樹脂層71
を設け、該樹脂層71の一部を除去することにより前記
突起電極3の少なくとも先端部を露出させて前記樹脂層
7を形成することを特徴とするものである。The flip-chip mounting method according to claim 4 is the method according to any one of claims 1 to 3, wherein the resin layer 71 is thicker than the height of the protruding electrode 3.
And a part of the resin layer 71 is removed to expose at least the tip of the bump electrode 3 to form the resin layer 7.
【0013】また、請求項5に記載のフリップチップ実
装方法は、請求項1乃至請求項4のいずれかに記載の発
明において、前記樹脂層7は、熱硬化性の樹脂であるこ
とを特徴とするものである。A flip chip mounting method according to a fifth aspect is characterized in that, in the invention according to any one of the first to fourth aspects, the resin layer 7 is a thermosetting resin. To do.
【0014】ここで、上記の突起電極3には、任意の形
状をしたハンダバンプや、略球形状であるハンダボール
や、任意の形状をしたスタッドバンプ等が含まれる。Here, the bump electrode 3 includes a solder bump having an arbitrary shape, a solder ball having a substantially spherical shape, a stud bump having an arbitrary shape, and the like.
【0015】また、導電部5には、導電パターンや基板
電極等電気的に導通可能な任意のものが含まれる。ま
た、樹脂フィルム6、70には、加熱により硬化する熱
硬化性の樹脂をフィルム状に加工したものや、UV照射
により硬化するUV硬化性の樹脂をフィルム状に加工し
たもの等の所望の厚みのものが含まれる。また、半導体
基板8には、Siからなるウェハや、GaAsからなる
ウエハ等が含まれる。Further, the conductive portion 5 includes any electrically conductive portion such as a conductive pattern and a substrate electrode. Further, the resin films 6 and 70 have desired thicknesses such as those obtained by processing a thermosetting resin that is cured by heating into a film shape, or those obtained by processing a UV curing resin that is cured by UV irradiation into a film shape. Included. The semiconductor substrate 8 includes a wafer made of Si, a wafer made of GaAs, and the like.
【0016】また、樹脂層71の一部を除去する方法に
は、研磨を用いる方法や、スキージ等を用いて取り去る
方法等任意のものが含まれる。The method for removing a part of the resin layer 71 includes any method such as a method using polishing and a method using a squeegee or the like.
【0017】[0017]
【発明の実施の形態】本発明の第1実施形態を図1に基
づいて説明する。図1は、本発明の第1実施形態に係る
フリップチップ実装方法を示す概略断面図である。DETAILED DESCRIPTION OF THE INVENTION A first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a schematic sectional view showing a flip chip mounting method according to the first embodiment of the present invention.
【0018】以下に、フリップチップ実装方法の説明を
示す。図1(a)に示すように、半導体基板8として例
えばSiからなるウエハには、Alからなる電極パッド
2が設けられており、電極パッド2上には例えば突起電
極3としてハンダバンプを形成している。ここで、電極
パッド2と突起電極3が形成されている半導体基板8面
を以降、半導体基板8の実装面と称する。The flip chip mounting method will be described below. As shown in FIG. 1A, a wafer made of, for example, Si as a semiconductor substrate 8 is provided with electrode pads 2 made of Al, and solder bumps are formed as protruding electrodes 3 on the electrode pads 2, for example. There is. Here, the surface of the semiconductor substrate 8 on which the electrode pads 2 and the protruding electrodes 3 are formed is hereinafter referred to as a mounting surface of the semiconductor substrate 8.
【0019】また、図1(d)に示すように、例えばガ
ラスエポキシ樹脂からなる回路基板4には導電部5とし
て基板電極を設けており、樹脂フィルム6としてフイル
ム状に加工したエポキシ樹脂を導電部5と回路基板4面
をともに覆うように設けている。なお、樹脂フィルム6
は少なくとも導電部5の上を覆うように設けられていれ
ばよい。また、樹脂フィルム6であるフィルム状に加工
したエポキシ樹脂は熱硬化性の樹脂であり、厚みは30
μm程度である。As shown in FIG. 1D, a circuit board 4 made of, for example, glass epoxy resin is provided with a board electrode as a conductive portion 5, and a resin film 6 made of a film-processed epoxy resin is made conductive. It is provided so as to cover both the part 5 and the surface of the circuit board 4. The resin film 6
Need only be provided so as to cover at least the conductive portion 5. In addition, the film-shaped epoxy resin which is the resin film 6 is a thermosetting resin and has a thickness of 30.
It is about μm.
【0020】ここで、図1(a)、(b)に示すよう
に、第1実施形態においては、半導体基板8には、突起
電極3と略等しい高さ、好ましくは突起電極3の先端部
が若干露出している程度、例えば突起電極3の先端部か
ら1〜5μm程度だけ薄くなるように、例えばディスペ
ンサ9を用いて樹脂層7としてエポキシ樹脂を塗布す
る。次に、樹脂層7が硬化するように加熱処理を施す。Here, as shown in FIGS. 1 (a) and 1 (b), in the first embodiment, the semiconductor substrate 8 has a height substantially equal to that of the protruding electrode 3, preferably the tip portion of the protruding electrode 3. The epoxy resin is applied as the resin layer 7 using, for example, the dispenser 9 so that it is slightly exposed, for example, about 1 to 5 μm thin from the tip of the protruding electrode 3. Next, heat treatment is performed so that the resin layer 7 is cured.
【0021】そして、図1(c)に示すように、半導体
基板8は硬化した樹脂層7とともに、例えばダイシング
により切断され、素子個片である所望のチップ1へと分
離する。ここで、電極パッド2と突起電極3が形成され
ているチップ1面を以降、チップ1の実装面と称する。Then, as shown in FIG. 1C, the semiconductor substrate 8 is cut together with the cured resin layer 7 by, for example, dicing, and separated into desired chips 1 which are individual pieces of the element. Here, the surface of the chip 1 on which the electrode pads 2 and the protruding electrodes 3 are formed is hereinafter referred to as a mounting surface of the chip 1.
【0022】次に、図1(d)に示すように、チップ1
の実装面を回路基板4に対向させ、チップ1側に設けた
突起電極3を1枚の樹脂フィルム6上から突起電極3が
導電部5に到達するようにチップ1を樹脂フィルム6に
押圧し、チップ1と導電部5との間から樹脂フィルム6
を押し出し、ついで加熱接合することで、チップ1は回
路基板4と電気的に接続される。この加熱により、樹脂
フィルム6は硬化される。Next, as shown in FIG. 1D, the chip 1
The mounting surface of is opposed to the circuit board 4, and the chip electrode 1 provided on the chip 1 side is pressed against the resin film 6 from above one resin film 6 so that the plate electrode 3 reaches the conductive portion 5. , The resin film 6 from between the chip 1 and the conductive portion 5.
The chip 1 is electrically connected to the circuit board 4 by extruding and then heat-bonding. The resin film 6 is cured by this heating.
【0023】かかるフリップチップ実装方法において
は、回路基板4側に樹脂フィルム6を設けるとともに、
チップ1側に樹脂層7を設けたので、樹脂フィルム6を
回路基板4の少なくとも導電部5上に複数枚使用する必
要がなくなるため、回路基板4とチップ1との安定した
電気的接続を実現するフリップチップ実装方法を提供す
ることができる。In such a flip-chip mounting method, the resin film 6 is provided on the circuit board 4 side, and
Since the resin layer 7 is provided on the chip 1 side, it is not necessary to use a plurality of resin films 6 on at least the conductive portion 5 of the circuit board 4, so that stable electrical connection between the circuit board 4 and the chip 1 is realized. It is possible to provide a flip-chip mounting method.
【0024】また、回路基板4とチップ1との電気的接
続不良による歩留まりの向上も達成できる。また、半導
体基板8の実装面に樹脂層7を設けて、半導体基板8を
樹脂層7とともに切断して素子個片であるチップ1へと
分離することで、樹脂層7を設けたチップ1が容易に作
製できる。Further, it is possible to achieve improvement in yield due to poor electrical connection between the circuit board 4 and the chip 1. Further, by providing the resin layer 7 on the mounting surface of the semiconductor substrate 8 and cutting the semiconductor substrate 8 together with the resin layer 7 to separate the chip 1 which is an element piece, the chip 1 provided with the resin layer 7 is obtained. Easy to make.
【0025】ここで、第1実施形態においては、半導体
基板8の実装面やチップ1の実装面に設ける樹脂層7と
しては、熱硬化性のエポキシ樹脂を用いたが、熱硬化性
のポリイミド樹脂や、シリコーン樹脂や、フェノール樹
脂等であってもよい。また、異方性導電性材料を含有し
てなる熱硬化性の樹脂、例えばAg粒子を含有したエポ
キシ樹脂や、プラスチック球にCu、Ni等をコーティ
ングした粒子を含有したエポキシ樹脂等であってもよ
い。In the first embodiment, the thermosetting epoxy resin is used as the resin layer 7 provided on the mounting surface of the semiconductor substrate 8 and the mounting surface of the chip 1. However, thermosetting polyimide resin is used. Alternatively, a silicone resin, a phenol resin, or the like may be used. Also, a thermosetting resin containing an anisotropic conductive material, for example, an epoxy resin containing Ag particles or an epoxy resin containing particles obtained by coating plastic spheres with Cu, Ni or the like may be used. Good.
【0026】また、樹脂層7としては、UV照射するこ
とで硬化するエポキシ樹脂、シリコーン樹脂、アクリル
樹脂等をフィルム状に加工したUV硬化性の樹脂等を用
い、UV照射で硬化させるようにしてもよい。Further, as the resin layer 7, a UV curable resin obtained by processing an epoxy resin, a silicone resin, an acrylic resin or the like into a film shape which is cured by UV irradiation is used, and is cured by UV irradiation. Good.
【0027】次に、半導体基板8の実装面やチップ1の
実装面に設ける樹脂層7の他の形成工程を示す実施形態
を、本発明の第2実施形態として図2に基づいて説明す
る。図2は、本発明の第2実施形態に係るフリップチッ
プ実装方法の一部を示す概略断面図である。なお、第1
実施形態との共通部分の説明は、同一箇所には同一符号
を付して省略する。Next, an embodiment showing another step of forming the resin layer 7 provided on the mounting surface of the semiconductor substrate 8 or the mounting surface of the chip 1 will be described as a second embodiment of the present invention with reference to FIG. FIG. 2 is a schematic sectional view showing a part of the flip chip mounting method according to the second embodiment of the present invention. The first
The description of the common parts with the embodiment will be omitted by giving the same reference numerals to the same parts.
【0028】図2(a)は、第1実施形態における図1
(a)と同様であるが、図2(b)に示すように、半導
体基板8としてSiからなるウェハの実装面に、少なく
とも突起電極3としてハンダバンプを含み、かつ突起電
極3より厚く樹脂層71として異方性導電性材料を含ん
でなる樹脂であるAg粒子を含有したエポキシ樹脂を塗
布した後、加熱によりエポキシ樹脂を硬化する。FIG. 2A is a schematic diagram of FIG. 1 in the first embodiment.
2A, but as shown in FIG. 2B, on the mounting surface of the wafer made of Si as the semiconductor substrate 8, at least solder bumps as the protruding electrodes 3 are included, and the resin layer 71 is thicker than the protruding electrodes 3. As an epoxy resin containing Ag particles, which is a resin containing an anisotropic conductive material, is applied, and then the epoxy resin is cured by heating.
【0029】そして、図2(c)に示すように、硬化し
た樹脂層71を、突起電極3の高さと略等しくなるま
で、例えば研磨機(図示せず)を用いて機械的研磨を行
い突起電極3の先端部を露出させて樹脂層7を形成して
後、図2(d)に示すように半導体基板8と硬化した樹
脂層7をともに、例えばダイシングにより切断して所望
のチップ1へと分離する。Then, as shown in FIG. 2C, the cured resin layer 71 is mechanically polished using, for example, a polishing machine (not shown) until the height of the resin layer 71 becomes substantially equal to the height of the protrusion electrode 3. After forming the resin layer 7 by exposing the tip end portion of the electrode 3, the semiconductor substrate 8 and the cured resin layer 7 are cut together, for example, by dicing to form a desired chip 1 as shown in FIG. 2D. And separate.
【0030】なお、チップ1の回路基板4への搭載は、
第1実施形態において図1(d)に示した方法と同様に
して行う。The mounting of the chip 1 on the circuit board 4 is as follows.
This is performed in the same manner as the method shown in FIG. 1D in the first embodiment.
【0031】かかるフリップチップ実装方法において
は、突起電極3の高さより一旦厚く設けて後加熱して硬
化させることによって得られた樹脂層71を、突起電極
3の少なくとも先端部が露出するような樹脂層7にする
ので、最初(加熱硬化させる前)に設ける樹脂層71の
厚みの精密な管理が不要になるため実装工程の合理化が
可能になる。In such a flip-chip mounting method, the resin layer 71 obtained by once providing a thickness thicker than the height of the bump electrode 3 and then heating and curing the resin layer 71 exposes at least the tip of the bump electrode 3. Since the layer 7 is used, it is not necessary to precisely control the thickness of the resin layer 71 provided first (before being heat-cured), so that the mounting process can be rationalized.
【0032】ここで、第1実施形態及び第2実施形態に
おいては、半導体基板8一括で実装面に樹脂層7の形成
処理を行って後、分離して形成したチップ1を回路基板
4にフリップチップ実装するものであるが、既に素子個
片に分離されたチップ1に対して図1(a)、(b)、
図2(a)、(b)に示したようにして樹脂層7を形成
してもよい。Here, in the first and second embodiments, the semiconductor substrate 8 is collectively processed to form the resin layer 7 on the mounting surface, and then the separately formed chips 1 are flipped onto the circuit board 4. Although mounted on a chip, the chip 1 which has already been separated into the element pieces is shown in FIGS.
The resin layer 7 may be formed as shown in FIGS. 2 (a) and 2 (b).
【0033】また、次に、チップ1の実装面に樹脂層7
を設ける他の工程を示す実施形態を、本発明の第3実施
形態として図3に基づいて説明する。図3は、本発明の
第3実施形態に係るフリップチップ実装方法の一部を示
す概略断面図である。なお、第1実施形態との共通部分
の説明は、同一箇所には同一符号を付して省略する。Next, the resin layer 7 is formed on the mounting surface of the chip 1.
An embodiment showing another step of providing the above will be described as a third embodiment of the present invention with reference to FIG. FIG. 3 is a schematic sectional view showing a part of a flip chip mounting method according to the third embodiment of the present invention. Note that the description of the same parts as those of the first embodiment will be omitted by giving the same reference numerals to the same parts.
【0034】第3実施形態においては、まず、平面部1
0aを有してなり離形性のあるステージ10を用意す
る。次に、ステージ10の平面部10aに、例えば樹脂
フィルム70 として厚み30μm程度のフ
ィルム状に加工した熱硬化性の樹脂であるエポキシ樹脂
を予め配置する。そして、図3(a)に示すように、チ
ップ1の実装面をステージ10上に設けた樹脂フィルム
70に向け、突起電極3の先端部がステージ10の平面
部10aに接触して該先端部が樹脂フィルム70から少
なくとも露出するように押圧する。次に、樹脂フィルム
70が硬化するように加熱処理を施す。In the third embodiment, first, the flat surface portion 1
A stage 10 having 0a and having releasability is prepared. Next, on the flat surface portion 10a of the stage 10, for example, an epoxy resin which is a thermosetting resin processed into a film shape having a thickness of about 30 μm as the resin film 70 is previously arranged. Then, as shown in FIG. 3A, the mounting surface of the chip 1 is directed toward the resin film 70 provided on the stage 10, and the tip portion of the protruding electrode 3 comes into contact with the flat surface portion 10 a of the stage 10 and the tip portion thereof is contacted. Is pressed so as to be at least exposed from the resin film 70. Next, heat treatment is performed so that the resin film 70 is cured.
【0035】なお、チップ1の回路基板4への搭載は、
第1実施形態において図1(d)に示した方法と同様に
して行う。The mounting of the chip 1 on the circuit board 4 is as follows.
This is performed in the same manner as the method shown in FIG. 1D in the first embodiment.
【0036】かかるフリップチップ実装方法において
は、チップ1の実装面側に樹脂層7として樹脂フィルム
70を用いるので、チップ1の実装面への樹脂層7の形
成が容易にできる。In such a flip chip mounting method, since the resin film 70 is used as the resin layer 7 on the mounting surface side of the chip 1, the resin layer 7 can be easily formed on the mounting surface of the chip 1.
【0037】ここで、第3実施形態においては、予め素
子個片に分離されたチップ1の実装面に対して樹脂層7
として樹脂フィルム70を設けるようにしているが、第
1実施形態及び第2実施形態のように半導体基板8一括
で実装面に樹脂フィルム70の形成処理を行って後、分
離して形成したチップ1を回路基板4にフリップチップ
実装するものであってもよい。Here, in the third embodiment, the resin layer 7 is formed on the mounting surface of the chip 1, which is previously separated into the element pieces.
As described above, the resin film 70 is provided, but as in the first and second embodiments, the semiconductor substrate 8 is collectively processed to form the resin film 70 on the mounting surface, and then the chip 1 is formed separately. May be flip-chip mounted on the circuit board 4.
【0038】また、第1実施形態乃至第3実施形態にお
いては、チップ1の実装面又は回路基板4側に設ける各
々の樹脂フィルム6、70としては、フィルム状に加工
した熱硬化性の樹脂であるエポキシ樹脂を用いたが、フ
ィルム状に加工した熱硬化性のポリイミド樹脂、シリコ
ーン樹脂、フェノール樹脂や、フィルム状に加工した異
方性導電性材料を含有してなる熱硬化性の樹脂、例えば
Ag粒子を含有したフィルム状に加工したエポキシ樹脂
や、プラスチック球にCu、Ni等をコーティングした
粒子を含有したフィルム状に加工したエポキシ樹脂等で
あってもよいし、UV照射することで硬化するエポキシ
樹脂、シリコーン樹脂、アクリル樹脂等をフィルム状に
加工したUV硬化性の樹脂等を用い、UV照射で硬化さ
せるようにしてもよい。In the first to third embodiments, each of the resin films 6 and 70 provided on the mounting surface of the chip 1 or the circuit board 4 side is a thermosetting resin processed into a film shape. Although a certain epoxy resin was used, a thermosetting polyimide resin processed into a film shape, a silicone resin, a phenol resin, or a thermosetting resin containing an anisotropic conductive material processed into a film shape, for example, It may be an epoxy resin processed into a film containing Ag particles or an epoxy resin processed into a film containing particles in which plastic spheres are coated with Cu, Ni or the like, or cured by UV irradiation. Even if a UV curable resin obtained by processing a film of epoxy resin, silicone resin, acrylic resin or the like is used and cured by UV irradiation. There.
【0039】[0039]
【発明の効果】上記のように請求項1に記載のフリップ
チップ実装方法にあっては、回路基板側に樹脂フィルム
を設けるとともに、チップ側に樹脂層を設けたので、前
記樹脂フィルムを前記回路基板の少なくとも導電部上に
複数枚使用する必要がなくなるため、前記回路基板と前
記チップとの安定した電気的接続を実現するフリップチ
ップ実装方法を提供することができた。また、前記回路
基板と前記チップとの電気的接続不良による歩留まりの
向上も達成できるという効果を奏する。As described above, in the flip chip mounting method according to claim 1, since the resin film is provided on the circuit board side and the resin layer is provided on the chip side, the resin film is provided on the circuit side. Since it is not necessary to use a plurality of sheets on at least the conductive portion of the board, it is possible to provide a flip-chip mounting method that realizes stable electrical connection between the circuit board and the chip. Further, it is possible to achieve an improvement in yield due to a poor electrical connection between the circuit board and the chip.
【0040】また、請求項2に記載のフリップチップ実
装方法にあっては、半導体基板の実装面に樹脂層を設け
て、前記半導体基板と前記樹脂層をともに切断して素子
個片であるチップへと分離することで、前記樹脂層を前
記チップの実装面に設けた前記チップが容易に作製でき
るという効果を奏する。また、前記回路基板と前記チッ
プとの安定した電気的接続を実現するフリップチップ実
装方法を提供することができた。また、前記回路基板と
前記チップとの電気的接続不良による歩留まりの向上も
達成できるという効果を奏する。In the flip-chip mounting method according to the second aspect, a resin layer is provided on the mounting surface of the semiconductor substrate, and the semiconductor substrate and the resin layer are cut together to form a chip that is an element piece. The effect of separating the resin layer on the mounting surface of the chip can be easily obtained. Further, it is possible to provide a flip-chip mounting method that realizes stable electrical connection between the circuit board and the chip. Further, it is possible to achieve an improvement in yield due to a poor electrical connection between the circuit board and the chip.
【0041】また、請求項3に記載のフリップチップ実
装方法にあっては、請求項1又は請求項2に記載の発明
において、チップ又は半導体基板の実装面側に樹脂層と
して樹脂フィルムを用いたので、前記チップ又は前記半
導体基板の実装面への前記樹脂層の形成が容易にできる
という効果を奏する。Further, in the flip chip mounting method described in claim 3, in the invention described in claim 1 or 2, a resin film is used as a resin layer on the mounting surface side of the chip or the semiconductor substrate. Therefore, it is possible to easily form the resin layer on the mounting surface of the chip or the semiconductor substrate.
【0042】また、請求項4に記載のフリップチップ実
装方法にあっては、請求項1乃至請求項3のいずれかに
記載の発明において、突起電極の高さより厚い樹脂層を
設け、該樹脂層の一部を除去することにより前記突起電
極の少なくとも先端部を露出させてチップ又は半導体基
板の実装面側に樹脂層を形成するので、最初にチップ又
は半導体基板の実装面に設ける樹脂層の厚みの精密な管
理が不要になるため実装工程の合理化が可能になるとい
う効果を奏する。Further, in the flip-chip mounting method described in claim 4, in the invention described in any one of claims 1 to 3, a resin layer thicker than the height of the protruding electrode is provided, and the resin layer is provided. Since the resin layer is formed on the mounting surface side of the chip or semiconductor substrate by exposing at least the tip of the protruding electrode by removing a part of the thickness of the resin layer provided on the mounting surface of the chip or semiconductor substrate first. This eliminates the need for precise management of the mounting process, and has the effect of enabling rationalization of the mounting process.
【0043】また、請求項5に記載のフリップチップ実
装方法にあっては、請求項1乃至請求項4のいずれかに
記載の発明において、チップ又は半導体基板の実装面に
設ける樹脂層は、熱硬化性の樹脂であるようにしたの
で、前記チップ又は前記半導体基板の実装面への前記樹
脂層の形成が容易にできるという効果を奏する。Further, in the flip-chip mounting method according to the fifth aspect, in the invention according to any one of the first to fourth aspects, the resin layer provided on the mounting surface of the chip or the semiconductor substrate is made of heat. Since it is made of a curable resin, it is possible to easily form the resin layer on the mounting surface of the chip or the semiconductor substrate.
【図1】本発明の第1実施形態に係るフリップチップ実
装方法を示す概略断面図である。FIG. 1 is a schematic sectional view showing a flip-chip mounting method according to a first embodiment of the present invention.
【図2】本発明の第2実施形態に係るフリップチップ実
装方法の一部を示す概略断面図である。FIG. 2 is a schematic sectional view showing a part of a flip chip mounting method according to a second embodiment of the present invention.
【図3】本発明の第3実施形態に係るフリップチップ実
装方法の一部を示す概略断面図である。FIG. 3 is a schematic sectional view showing a part of a flip chip mounting method according to a third embodiment of the present invention.
【図4】従来例に係るフリップチップ実装方法を示す概
略断面図である。FIG. 4 is a schematic sectional view showing a flip-chip mounting method according to a conventional example.
1 チップ 2 電極パッド 3 突起電極 4 回路基板 5 導電部 6、70 樹脂フィルム 7、71 樹脂層 8 半導体基板 9 ディスペンサ 10 ステージ 1 chip 2 electrode pad 3 protruding electrodes 4 circuit board 5 Conductive part 6,70 Resin film 7,71 Resin layer 8 Semiconductor substrate 9 dispensers 10 stages
───────────────────────────────────────────────────── フロントページの続き (72)発明者 木田 忍 大阪府門真市大字門真1048番地松下電工株 式会社内 Fターム(参考) 5F044 LL09 LL11 QQ00 ─────────────────────────────────────────────────── ─── Continued front page (72) Inventor Shinobu Kida 1048, Kadoma, Kadoma-shi, Osaka Matsushita Electric Works Co., Ltd. Inside the company F-term (reference) 5F044 LL09 LL11 QQ00
Claims (5)
路基板の表面に設けた導電部とを電気的に接続させる工
程を備えてなるフリップチップ実装方法において、 前記チップの実装面に前記突起電極の高さと略等しくな
るように樹脂層を設ける工程と、 少なくとも前記導電部上に樹脂フィルムを設ける工程
と、 前記突起電極が前記導電部に到達するように前記チップ
を前記樹脂フィルムに押圧して接続する工程とを含んで
なることを特徴とするフリップチップ実装方法。1. A flip-chip mounting method comprising a step of electrically connecting a protruding electrode provided on a mounting surface of a chip and a conductive portion provided on a surface of a circuit board, wherein the mounting surface of the chip is provided with: A step of providing a resin layer so as to be approximately equal to the height of the protruding electrode; a step of providing a resin film on at least the conductive portion; and pressing the chip against the resin film so that the protruding electrode reaches the conductive portion. And the step of connecting the flip chip mounting method.
路基板の表面に設けた導電部とを電気的に接続させる工
程を備えてなるフリップチップ実装方法において、 突起電極を備えてなる半導体基板の実装面に前記突起電
極の高さと略等しい厚さになるように樹脂層を設け、前
記半導体基板を前記樹脂層とともに切断し分離すること
により素子個片であるチップを形成する工程と、 少なくとも前記導電部上に樹脂フィルムを設ける工程
と、 前記突起電極が前記導電部に到達するように前記チップ
を前記樹脂フィルムに押圧して接続する工程とを含んで
なることを特徴とするフリップチップ実装方法。2. A flip-chip mounting method comprising a step of electrically connecting a protruding electrode provided on a mounting surface of a chip and a conductive portion provided on a surface of a circuit board, wherein a semiconductor provided with a protruding electrode. A step of forming a chip, which is an element piece, by providing a resin layer on the mounting surface of the substrate so as to have a thickness substantially equal to the height of the protruding electrode, and cutting and separating the semiconductor substrate together with the resin layer; A flip chip, comprising: a step of providing a resin film on at least the conductive portion; and a step of pressing and connecting the chip to the resin film so that the protruding electrode reaches the conductive portion. How to implement.
を樹脂フィルムに対して、樹脂フィルムと前記突起電極
の高さとが略等しくなるまで押圧して、前記樹脂フィル
ムを前記チップ又は前記半導体基板の実装面に設けるこ
とにより前記樹脂層を形成する請求項1又は請求項2に
記載のフリップチップ実装方法。3. The mounting surface of the chip or the semiconductor substrate is pressed against the resin film until the height of the resin film and the height of the protruding electrode become substantially equal to each other, and the resin film of the chip or the semiconductor substrate. The flip chip mounting method according to claim 1, wherein the resin layer is formed by providing the resin layer on a mounting surface.
け、該樹脂層の一部を除去することにより前記突起電極
の少なくとも先端部を露出させて前記樹脂層を形成する
請求項1乃至請求項3のいずれかに記載のフリップチッ
プ実装方法。4. The resin layer is formed by providing a resin layer thicker than the height of the protruding electrode, and removing at least a tip portion of the protruding electrode by removing a part of the resin layer. Item 5. The flip chip mounting method according to any one of Items 3.
求項1乃至請求項4のいずれかに記載のフリップチップ
実装方法。5. The flip chip mounting method according to claim 1, wherein the resin layer is a thermosetting resin.
Priority Applications (1)
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100868616B1 (en) * | 2006-04-28 | 2008-11-13 | 타이완 티에프티 엘씨디 오쏘시에이션 | Semiconductor flip-chip package component and fabricating method |
JP2009044113A (en) * | 2007-08-06 | 2009-02-26 | Korea Advanced Inst Of Sci Technol | Manufacturing method of organic substrate mounted with active element |
JP2012212864A (en) * | 2011-03-18 | 2012-11-01 | Sekisui Chem Co Ltd | Manufacturing method of connection structure and connection structure |
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Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100868616B1 (en) * | 2006-04-28 | 2008-11-13 | 타이완 티에프티 엘씨디 오쏘시에이션 | Semiconductor flip-chip package component and fabricating method |
JP2009044113A (en) * | 2007-08-06 | 2009-02-26 | Korea Advanced Inst Of Sci Technol | Manufacturing method of organic substrate mounted with active element |
JP2012212864A (en) * | 2011-03-18 | 2012-11-01 | Sekisui Chem Co Ltd | Manufacturing method of connection structure and connection structure |
JP2013030765A (en) * | 2011-06-22 | 2013-02-07 | Nitto Denko Corp | Method of manufacturing semiconductor device |
JP2013073955A (en) * | 2011-09-26 | 2013-04-22 | Hitachi Chemical Co Ltd | Manufacturing method of circuit connection structure |
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CN103988299B (en) * | 2011-09-30 | 2016-10-26 | 英特尔公司 | For the method handling very thin device wafer |
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