TWI287257B - Semiconductor integrated circuit device and process of the same - Google Patents

Semiconductor integrated circuit device and process of the same Download PDF

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Publication number
TWI287257B
TWI287257B TW090124713A TW90124713A TWI287257B TW I287257 B TWI287257 B TW I287257B TW 090124713 A TW090124713 A TW 090124713A TW 90124713 A TW90124713 A TW 90124713A TW I287257 B TWI287257 B TW I287257B
Authority
TW
Taiwan
Prior art keywords
forming
source
integrated circuit
semiconductor integrated
circuit device
Prior art date
Application number
TW090124713A
Other languages
English (en)
Chinese (zh)
Inventor
Masashi Sahara
Fumiaki Endo
Masanori Kojima
Katsuhiro Uchimura
Hideaki Kanazawa
Original Assignee
Hitachi Ltd
Hitachi Ulsi Sys Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Ulsi Sys Co Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TWI287257B publication Critical patent/TWI287257B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/0131—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/262—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by physical means only
    • H10P50/263—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by physical means only of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Drying Of Semiconductors (AREA)
TW090124713A 2000-10-20 2001-10-05 Semiconductor integrated circuit device and process of the same TWI287257B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000320572A JP2002134632A (ja) 2000-10-20 2000-10-20 半導体集積回路装置の製造方法

Publications (1)

Publication Number Publication Date
TWI287257B true TWI287257B (en) 2007-09-21

Family

ID=18798836

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090124713A TWI287257B (en) 2000-10-20 2001-10-05 Semiconductor integrated circuit device and process of the same

Country Status (4)

Country Link
US (1) US7132341B2 (enExample)
JP (1) JP2002134632A (enExample)
KR (1) KR100613804B1 (enExample)
TW (1) TWI287257B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100443087B1 (ko) * 2002-09-24 2004-08-04 삼성전자주식회사 반도체 소자의 실리사이드막 형성방법
US7271431B2 (en) * 2004-06-25 2007-09-18 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure and method of fabrication
JP2006032410A (ja) * 2004-07-12 2006-02-02 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
TW200816312A (en) * 2006-09-28 2008-04-01 Promos Technologies Inc Method for forming silicide layer on a silicon surface and its use

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2214708A (en) * 1988-01-20 1989-09-06 Philips Nv A method of manufacturing a semiconductor device
US5344793A (en) 1993-03-05 1994-09-06 Siemens Aktiengesellschaft Formation of silicided junctions in deep sub-micron MOSFETs by defect enhanced CoSi2 formation
JP2682410B2 (ja) 1993-12-13 1997-11-26 日本電気株式会社 半導体装置の製造方法
US6096638A (en) * 1995-10-28 2000-08-01 Nec Corporation Method for forming a refractory metal silicide layer
JPH09320987A (ja) 1996-05-31 1997-12-12 Sony Corp シリサイドの形成方法
US6117723A (en) * 1999-06-10 2000-09-12 Taiwan Semiconductor Manufacturing Company Salicide integration process for embedded DRAM devices
US6239006B1 (en) * 1999-07-09 2001-05-29 Advanced Micro Devices, Inc. Native oxide removal with fluorinated chemistry before cobalt silicide formation
US6303503B1 (en) * 1999-10-13 2001-10-16 National Semiconductor Corporation Process for the formation of cobalt salicide layers employing a sputter etch surface preparation step

Also Published As

Publication number Publication date
KR20020031065A (ko) 2002-04-26
US20020048947A1 (en) 2002-04-25
US7132341B2 (en) 2006-11-07
JP2002134632A (ja) 2002-05-10
KR100613804B1 (ko) 2006-08-18

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