TWI282123B - Using zeolites to improve the mechanical strength of low-k interlayer dielectrics - Google Patents

Using zeolites to improve the mechanical strength of low-k interlayer dielectrics Download PDF

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TWI282123B
TWI282123B TW094140480A TW94140480A TWI282123B TW I282123 B TWI282123 B TW I282123B TW 094140480 A TW094140480 A TW 094140480A TW 94140480 A TW94140480 A TW 94140480A TW I282123 B TWI282123 B TW I282123B
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polymer
layer
zeolite
zeolite layer
opening
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TW094140480A
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TW200625449A (en
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Boyan Boyanov
Grant Kloster
Michael Goodner
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Intel Corp
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Silicates, Zeolites, And Molecular Sieves (AREA)
  • Polymers With Sulfur, Phosphorus Or Metals In The Main Chain (AREA)

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1282123 (1) 九、發明說明 【發明所屬之技術領域】 本發明係有關一種用於將一聚合物浸入沸石低k介電 層細孔內而在其中形成一互連結構，由此機械地增強介電 層並防止金屬沉澱在細孔內部的方法。 【先前技術】 Φ 矽石薄膜，例如二氧化矽（Si〇2)，係在微電子工業 中用爲介電質。介電質是由其介電常數描述，更常稱爲介 電質的k-値。介電質係 使用來將金屬線或層彼此隔離。使用具有低介電常數 的介電質可幫助減少串音，電路部位間彼此的電容性或感 應性的非所欲交互作用。隨著積體電路上裝置密度的增 加，金屬線條變得愈小，且在金屬層之間的距離減少。隨 著裝置幾何的減小，串音效應就變得顯著。串音效應可經 # 由降低介電質的k-値來減低。當前的技術係使用k-値介於 2.5與4之間的介電質。 矽石具有約4.0的介電常數，其太高而不可用於下一 代的積體電路。由於空氣具有1·〇的介電常數，一種降低 矽石的介電常數之方法爲在矽石內加入空隙或細孔。在積 體電路製造程序中使用這種方法有數項缺點。第一，多孔 介電質通常不具有足夠的機械穩定性來支持後續的硏磨操 作。此外，多孔介電質可能讓金屬傳輸通過介電層。 (2) 1282123 【發明內容】 發明之詳細說明 術語晶片，積體電路，單晶裝置，半導體裝置與微電 子裝置’於此領域中經常可交換地使用。本發明可應用於 所有上述者’彼等係此領域中爲一般所了解者。 術語接點（contact )及通孔（via )兩者都是指稱從 不同互連位準的導體之電連接結構。這些名詞在技藝中有 i 時用來描述一絕緣體中的開口，於該絕緣體中要完成該結 構’且其本身爲該完成的結構。對於本揭露的目的而言， 接點及通孔即爲完成的結構。 詞句“低介電常數材料，，係指具有一比二氧化矽較低的 介電常數之材料，二氧化矽具有4的介電常數。例如，有 機聚合物’非晶型氟化碳，奈米發泡體，包括有機聚合物 的以矽爲基底的絕緣體，碳摻雜的矽氧化物及氯摻雜的矽 氧化物都具有較二氧化矽爲低的介電常數。 ί 字母k經常用來指稱介電常數。相似地，術語高-k及 低-k於此領域也分別指稱高介電常數與低介電常數有關， 其中高表示大於二氧化矽的介電常數，且低表低於二氧化 矽的介電常數。 由一互連線所見的寄生電容爲一個距另一導體的距離 及導體間材料介電常數的函數。不過，增加互連線間的間 隔也增加積體電路的實體尺寸，及由此的成本。所以，要 製造在互連線間具有低寄生電容的積體電路時，需要以一 具有低介電常數的絕緣體將諸導體彼此電隔離。 -6 - (3) 1282123 【實施方式】 要減少寄生電容不利影響的一個方法是使用低_k材料 在進階微電子中作爲絕緣體。要達到低介電常數，可在介 電薄膜內導入多孔性。隨然增加介電質的多孔性可降低薄 膜的k値，不過其也會降低薄膜的機械強度。圖1是一圖 形（1〇〇 )，其中顯示出三種低-k介電薄膜的薄膜模數與 • k値的關係：摻雜碳的氧化物（CDO )，二氧化矽 (Si02 )，及氟化氧化矽（SiOF )。隨著介電質多孔性的 增加，k値減少，且薄膜的模數或機械強度也同樣減少， 因此使得其更難以將這些多孔介電質整合到半導體製造程 序中。 因爲其有序的本質，沸石具有比多孔形以氧化矽爲底 的材料，例如多孔型Si〇2，SiOF，及CD0明顯較高的強 度。沸石具有高度有序多孔性，高機械強度，及低k値等 • 特徵。圖2繪示出多孔沸石結構200的影像及其相應的透 射電子顯微照片2 02。六角形結構2 1 0 ’ 2 1 2及薄片結構 220，222爲封閉系統，不會讓材料傳輸通過薄膜表面。立 方結構230，232具有可促成進出表面的傳輸之流通過整 個薄膜的通道。 當使用這些多孔介電質於半導體製造程序中時，沸石 介電層固有的多孔性及滲透性造成顯著的整合挑戰。化學 攝取可能在侵触或清理的過程中發生，顯著地增加介電常 數。多孔性可能損及金屬屏壁層的完整性’導致不足的間 (4) 1282123 隙塡充以及線間的洩漏。最後，滲透性及離子交換性質可 能導致可移動離子，在屏壁原子層沉積（ALD )過程中非 所欲反應的催化劑之捕獲。 圖3顯示出在半導體互連結構中的一多孔沸石低-k介 電層之橫截面圖。一包含細孔（3 04 )的多孔沸石層 ( 302)在一鈾刻停止層（ 306)及一底下半導體基板 (3 0 0 )之上形成。該基材典型地爲一晶圓，於其上已經 # 由實施過他半導體製造操作而形成各種電子組件’包括’ 但不限於電晶體及導電互連。蝕刻停止層可包括氮化矽’ 碳化矽，或其他材料。 鑲嵌或雙鑲嵌開口（ 3 0 8 )，其可包括溝槽（3 08 A ) 及/或通孔（3 0 8B )等開口，係經形成於多孔沸石層內。 溝槽（3 08A )係形成於沸石層（3 02 )內，而通孔開口 (3 0 8B )係穿過沸石層（302 )及蝕刻停止層（3 06 )兩者 形成。金屬障壁層（3 1 0 )係形成在鑲嵌開口之上。金屬 # 障壁層可由化學氣相沉積法（CVD )或由原子層沉積法 (ALD )形成。 ，當金屬障壁層經沉積覆蓋住多孔沸石層之時，可能於 . 細孔（3 1 2 )內部形成金屬沉積層。此可能導致電短路及/ 或介電質的低擊穿電壓。 藉由用一第二低-k介電質浸入沸石層細孔內，可密封 沸石內部的細孔，而沸石層仍可保持其合意的機械性質及 低-k性質。 圖4A爲闡明根據本發明一具體實例的方法之流程 -8- (5) 1282123 圖。首先，如在方塊402中所示者，於一基質上形成一多 孔沸石低-k介電層。該沸石可經由旋塗法及後續的煅燒於 晶圓上原位（in situ)合成，或者先驗地（α 以奈 米粒子懸浮液形式接著煅燒。 接著，如方塊404所示，以另一種低4材料浸入該沸 石。該低-k材料可爲旋塗或電漿沉積單體或聚合物，或可 爲另一種可以穿過沸石細孔的低-k材料。或者，該低4材 ^ 料可爲溶解於另一材料中的聚合物，或可爲與另一種材料 的混合物之一部分的聚合物。沸石被低_k材料的浸入可爲 完全者或部分者。 當沸石的細孔已經部份地或完全地以一聚合物或其他 低-k材料所塡充之時，可於沸石層內形成一鑲嵌或雙鑲嵌 開口，如方塊406所示。 接者’如方塊408所示，可在鑲嵌開口及沸石層上形 成一障壁層金屬。於一具體實例中，該障壁層金屬可包括 •銅或銅合金。 在形成障壁層金屬之後，可如方塊410所示者，以一 金屬，例如，但不限於銅或銅合金，塡充鑲嵌開口。由 此，形成鑲嵌或雙鑲嵌互連結構。 在形成雙鑲嵌結構之後，可以移除過量的銅及障壁層 材料，典型地係由化學機械硏磨（CMP )法，如方塊4 1 2 中所示者。雖然示出者爲雙鑲嵌結構，不過也在沸石介電 層中形成鑲嵌或其他互連結構。 圖4B爲闡述根據本發明另一具體實例的方法之流程 -9- (6) 1282123 圖。於此具體實例中，可使用沸石奈米粒子/低-k先質懸 浮液直接施加於晶圓上形成沸石層，如方塊452所示者。 接著，可處理該懸浮液以形成一經聚合物浸入的沸石層’ 如方塊4 5 4所示者。於一具體實例中，可以使用煅燒來處 理該懸浮液。懸浮液的煅燒可讓低-k先質在沸石細孔內聚 合。使用此方法，可以使製備成的沸石奈米粒子具有比完 全密實矽石（k = 3.9 )顯著較爲低的k値（k<2.0 )。 • 於處理懸浮液形成具有經聚合物浸入的細孔之沸石 後，即可進行後續的處理，包括形成在沸石層內的鑲嵌或 雙鑲嵌開口 （方塊456 )的，在鑲嵌開口及沸石層上形 成之障壁金屬層（方塊45 8 )，以金屬塡充鑲嵌開口 (方塊460)，及硏磨該金屬的上部表面（方塊462 )。 每一此等程序都已在上面配合圖4A更詳細地說明過。 圖5A到5G示出沸石介電層根據上面圖4所示且說 明過的方法之具體實例所形成的沸石介電層之橫截面圖。 β 圖5A顯示出一具有於一基質（502 )上形成的細孔 (5 05 )之多孔沸石層（504 )。該多孔沸石層（5 04 )經 暴露於一低-k聚合物先質（5 06 )。該沸石層（504 )可經 由蒸氣，液體，或超臨界流體暴露以浸入先質（5 06 )。 一1種可用的恰當先質爲一乙嫌基砂氧垸·苯并環丁燃 (DVS-BCB)，其在聚合後形成一低-k矽氧烷·有機混成 聚合物。另一組可用的先質爲C DO相關的先質，其形成 一低-k以二氧化矽爲底的介電質。於一具體實例中，可將 該聚合物先質溶解於另一物質中，或爲與另一物質的混合 -10- (7) 1282123 物之一部分。 先質（5 06 )的聚合可經由熱，電漿，或其他於浸入 程序之中或之後起始以幫助聚合反應。於一具體實例中， 可以經由施加熱至沸石層及聚合物先質而起始聚合反應。 於另一具體實例中，聚合反應可經由將沸石層及聚合物先 質暴露於電漿下而起始。 於另一具體貫例中’如圖 5 B中所示者，沸石層 • ( 5 04 )的細孔（5 05 )可直接浸入長鏈，未交聯聚合物 (5 07 )，例如聚伸對二甲苯（paraiyene )，聚（伸芳基 醚）（例如Honeywell的FLARETM )，聚伸苯基衍生物 (例如Dow Chemical的SiLKTM之未交聯形式），或其他 熱強固性，低-k介電材料。浸入操作可在液體或超臨界溶 液內實施’以增進聚合物進入沸石結構內的擴散。於一具 體實例中，可將聚合物溶解於另一物質中，或可爲與另一 物質的混合物之一部分。 ί 於另一具體實例中，可使用混成法浸入沸石，其中係 將一巨單體，例如低聚物型聚伸苯基，導入至沸石基體內 並接者反應形成一父聯網絡。藉由使用特殊的添加劑在一 廣範圍內修改沸石主體的化學性質之能力，可以針對特殊 應用訂製沸石。 圖5C示出在以聚合物或其他低_k材料（51〇 )部分或 完全浸入細孔之後之基材（5 〇 2 )上的沸石層（5 0 8 )。因 爲沸石的細孔已經以一低_ k聚合物所塡充，所以該沸石更 具機械強固丨生。^經聚合物塡充的沸石層可在後續程序操 -11 - (8) 1282123 作中作爲層間介電質（ILD )堆疊的機械強化材料。再 者，因爲沸石及聚合物兩者的低k値，所得堆疊的k値也 變小。 圖5 D示出在鑲嵌開口（ 5 1 2 )已經形成之後經聚合物 塡充的沸石層（5 0 8 )。鑲嵌開口（ 5 1 2 )可包括一通孔區 (5 1 2B )和一溝槽區（5 1 2A )，且可由光平版刻術及蝕刻 操作所形成。因爲沸石的細孔已由聚合物（5 1 0 )所密 • 封，所以可在光平版刻術，蝕刻，及後續的操作中阻止化 學攝取，離子交換及催化。 接著，如圖5E所示，在鑲嵌開口上形成一金屬障壁 層（514 )。該金屬障壁層可由化學氣相沉積法（CVD ) 或由原子層沉積法（ ALD )形成。因爲沸石（508 )的細 孔已由聚合物（510)所塡充，所以障壁金屬層不會穿過 沸石層。由此，不會在細孔內形成金屬沉積，且所得沸石 ILD層可更具電強固性。 ® 圖5F示出在以金屬（516)塡充鑲嵌開口（512)之 後的圖5E結構。於一具體實例中，該金屬爲銅或銅合 金。該金屬（516)形成銅互連，製造鑲嵌或雙鑲嵌互連 結構。 在形成鑲嵌或雙鑲嵌結構之後，要移除過量的銅及障 壁層材料，典型地係以一化學機械硏磨法（CMP )移除。 所得結構經描繪於圖5 G中。在具有經聚合物塡充的細孔 之沸石層內形成鑲嵌或雙鑲嵌結構（520 )。該經聚合年勿 塡充的沸石（5 0 8 )可在CMP程序及後續製造操作中作爲 -12- (9) 1282123 對層間介電質（ILD )堆疊的機械強化材料。 由此，如上面所述者，可用第二低-k介電質，例如聚 合物浸入多孔沸石IL D，以密封沸石內部細孔。因爲細孔 已被聚合物所塡充，所以所得結構可具有比多孔沸石更大 的機械強度。此外，所得結構的k値會因爲沸石及聚合物 皆爲低-k材料而保持低値。 於上面的說明書中，已參照本發明特殊示範具體實例 • 而說明過本發明。不過，顯然地可對其作出各種修飾及改 變而不違離本文所述本發明旨意和範圍。因此，說明書和 圖式要視爲示範說明性而非限制意義。 【圖式簡單說明】 從下列配合後面圖式的詳細說明可獲得對本發明的較 佳了解，其中： 圖1顯示出低-k介電材料的機械強度相對於介電常數 Φ 的關係之圖形。 圖2爲六角形，薄片狀，及立方體中孔性材料的圖 形。 圖3是在多孔沸石中鑲嵌開口的橫截面之圖形。 圖4A-4B爲圖解說明根據本發明具體實例的方法之流 程圖。 圖5A-5G爲圖解說明根據本發明具體實例的沸石介電 層的橫截面之圖形。 •13- (10) 1282123 【主要元件符號說明】 200 :多孔沸石結構 202 :透射電子顯微照片 210, 2 12 :六角形結構 2 2 0，2 2 2 :層狀結構 23 0，23 2 :立方結構 3 00 :半導體基板 • 3 02 :多孔沸石層 304,312， 505 ：細孔 3 0 6 :蝕刻停止層 308,512:開口 308A， 512A :溝槽 308B， 512B :通孑L 310，514:金屬障壁層 502 :基板 > 5 04 :多孔沸石層 506 :先質 5 07 :聚合物 5 08 :沸石層 5 10 :低-k材料 5 1 6 :金屬 5 2 0 :鑲嵌或雙鑲嵌結構 -14-

Claims (1)

  1. 1282123 c (1) 十、申請專利範圍 附件2A : 第94 140480號專利申請案 中文申請專利範圍替換本 民國96年1月15日修正 1 · 一種改進經聚合物浸入的沸石層之機械強度的方 法，其包括： g 於一基材上形成一沸石層，其中該沸石層包含細孔； 用一聚合物浸入該沸石層的細孔，以形成一經聚合物 浸入的沸石層； 於該經聚合物浸入的沸石層中形成開口；及 於該鑲嵌開口及該經聚合物浸入的沸石層上形成障壁 層。 2.根據申請專利範圍第1項的方法，其中用聚合物浸 入該沸石層的細孔之步驟包括將該沸石層暴露於聚合物先 II 質且隨後起始聚合反應。 3 .根據申請專利範圍第2項的方法，其中該聚合物先 質係選自由二乙烯基矽氧烷-苯并環丁烯（DVS_BCB)， 及碳摻雜氧化物（c D ◦)所組成的群組。 4.根據申請專利範圍第2項的方法，其中該聚合物先 質係呈蒸氣形式。 5 .根據申請專利範圍第2項的方法，其中該聚合物先 質係呈液體形式。 6.根據申請專利範圍第2項的方法，其中該聚合物先 (2) 1282123 質係呈超臨界流體形式。 7. 根據申請專利範圍第2項的方法，其中該聚合物先 質係經溶解於另一物質之中。 8. 根據申請專利範圍第2項的方法，其中該聚合物先 質爲與另一物質的混合物之一部分。 9. 根據申請專利範圍第2項的方法，其中起始聚合反 應之步驟包括加熱該沸石層及該聚合物先質。 φ 10.根據申請專利範圍第2項的方法，其中起始聚合 反應之步驟包括暴露該沸石層及該聚合物先質於一電漿。 1 1 .根據申請專利範圍第1項的方法，其中用聚合物 浸入該沸石層細孔之步驟包括暴露該沸石層於該聚合物。 1 2 .根據申請專利範圍第1 1項的方法，其中該聚合物 爲液體。 13·根據申請專利範圍第11項的方法，其中該聚合物 爲一超臨界溶液。 φ 1 4 ·根據申請專利範圍第1 1項的方法，其中該聚合物 係溶解於另一物質中。 1 5 ·根據申請專利範圍第1 1項的方法，其中該聚合物 爲與另一物質的混合物之一部分。 1 6 ·根據申請專利範圍第1 1項的方法，其中該聚合物 包括長鏈，未交聯聚合物。 1 7 ·根據申請專利範圍第1 6項的方法，其中該聚合物 係選自由聚伸對二甲苯（paralyene)，聚（伸芳基醚）， 及聚伸苯基衍生物所組成的群組。 -2 - (3) 1282123 1 8 ·根據申請專利範圍第1項的方法’其中該障壁層 包括一金屬層。 19·根據申請專利範圍第1項的方法’其進一步包括 用〜金屬層塡充該開口。 20. 根據申請專利範圍第19項的方法’其進一步包括 硏磨該金屬層。 21. 根據申請專利範圍第19項的方法’其中該金屬層 g 包括銅合金。 2 2 · —種改進經聚合物浸入的沸石層之機械強度的方 法，其包括： 施加一沸石奈米粒子先質懸浮液至一基材； 處理該懸浮液以形成一經聚合物浸入的沸石層， 於經聚合物浸入的沸石層內形成一開口；及 於該開口及該經聚合物浸入的沸石層上形成一障壁 層。 # 23 _根據申請專利範圍第22項的方法，其中處理該懸 浮液以形成經聚合物浸入的沸石層之步驟包括煅燒該懸浮 液。 24·根據申請專利範圍第22項的方法，其中該障壁層 包括一金屬層。 25.根據申請專利範圍第22項的方法，其進一步包括 以一金屬層塡充該開口。 2 6.根據申請專利範圍第25項的方法，其進一步包括 硏磨該金屬層。 -3- (4) (4)1282123 27·根據申請專利範圍第25項的方法，其中該金屬層 包括銅合金。 28. —種互連結構，其包括： 一通孔及一溝槽，係由經配置於底下層之上的經聚合 物浸入的沸石介電層所界定； 一障壁層，其係配置於該經聚合物浸入的沸石介電質 之表面上；及 一導電材料，其係配置於該通孔開口及該溝槽之內。 29. 根據申請專利範圍第28項的互連結構，其中該障 壁層爲一金屬層。 30·根據申請專利範圍第28項的互連結構，其中該導 電材料包括銅合金。 3 1 ·根據申請專利範圍第2 8項的互連結構，其中該底 下層爲一半導體基板。 3 2 ·根據申請專利範圍第3 1項的互連結構，其進一步 包括在該導電材料上形成的一蝕刻停止層。 33·根據申請專利範圍第32項的互連結構，其中該倉虫 刻停止層包括一碳化砂層。
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