TWI242863B - Heat dissipating structure and semiconductor package with the heat dissipating structure - Google Patents

Heat dissipating structure and semiconductor package with the heat dissipating structure Download PDF

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TWI242863B
TWI242863B TW092125310A TW92125310A TWI242863B TW I242863 B TWI242863 B TW I242863B TW 092125310 A TW092125310 A TW 092125310A TW 92125310 A TW92125310 A TW 92125310A TW I242863 B TWI242863 B TW I242863B
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heat sink
groove
patent application
semiconductor package
item
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TW200511538A (en
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Chin-Te Chen
Chang-Fu Lin
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Siliconware Precision Industries Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/162Disposition
    • H01L2924/16251Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/163Connection portion, e.g. seal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/163Connection portion, e.g. seal
    • H01L2924/16315Shape

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

1242863 五、發明說明(1) 【發明所屬之技術領域】 本發明係關於一種半導體封裝件(Semiconductor Package) ’尤指一種可穩固黏置散熱件並提昇該散熱件 與晶片承载件間之黏接信賴性(Adhesion Rel iabi 1 i ty) 之散熱件結構及具有散熱件之半導體封裝件。 【先前技術】 覆晶式球栅陣列(Flip-Chip Ball Grid Array, FCBGA)半導體封裝件係為一種同時具有覆晶與球柵陣列之 封^結構’以使至少一晶片的作用表面(Act ive Surf ace)
可藉由多數凸塊(Solder Bumps)而電性連接至基板 (Substrate)之一表面上,並於該基板之另一表面上植設 多數作為輸入/輸出(I/O)端之銲球(S〇ider Bal 1 );此一 封裝結構可大幅縮減體積,同時亦減去習知銲線(Wird之 設計,而可降低阻抗提昇電性,以避免訊號於傳輸過程中 衰退,因此確已成為下一世代晶片與電子元件的主流封裝 技術。
由於該覆晶式球栅陣列封裝的優越特性,使其多係運 用於高積集度(Integration)之多晶片封裝件中,以符該 型電子元件之體積與運算需求,惟此類電子元件亦由於其 高頻率運算特性,使其於運作過程所產生之熱能亦較二般 封裝件為高,因此’其散熱效果是否良好遂成為影響晶片 壽命及封裝製程良率的重要關鍵。 S 為提升覆晶式球柵陣列封裝件之散熱效能,業界一般 進行半導體晶片封裝時’會在基板等晶片承載件(Ch i p
1242863 五、發明說明(2)
Carrier)上接置至少一嵌入式散熱件(Embedded Heat Spreader),使得覆晶式半導體晶片運作時產生的熱量可 以透過該晶片的非作用表面(Non-act ive Surface,亦即 未佈設電路之晶片表面)傳遞至散熱件而逸散,不須透過 導熱性較差的封裝膠體(Encapsulant)來傳遞熱量而提高 晶片的散熱效果。
惟上述例如美國專利第5, 311,4 0 2號所述之半導體封 裝件,如第6圖所示,係在基板4 0上提供晶片4 2接置之區 域外另設有複數個凹槽40 1,再以膠黏劑45填入凹槽4〇 i提 供散熱件44黏接,其中,該散熱件44之支撐部44b係套入 基板40各凹槽401中,並透過該膠黏劑45之黏合而將散埶 件44牢固籍接於基板40上;利用支撐部入凹槽雖 可增加接觸面積,免除黏接面積過小而造成結合強 的問題,但在基板40上開設孔洞,不僅過程繁雜, 成 本,而且破壞基板40的結構,容易造成信賴性不良“成 f此’業者後續發展出在散熱件之支 之方式來取代基板凹槽設計,藉以迳ξ,丨据^ λ =開。又溝槽 間良好接合性之半導體封裝結構。放熱件與基板
導體封裝結構係於基板5G上未接£晶片5°2及二’此種半 先行定義出一或多個散熱件黏接區5 〇 〇, 品域上 :該散熱件54係包含一平坦部5數:=::4 坦部54a至晶片52上方之支撐部5仆,豆 戳们木撐该平 與基板5 0表面之散熱件黏接區5 〇 〇 ’、 ’ 4支樓部5 4b 或多個溝㈣,俾藉由一流動性:二域
1242863 五、發明說明(3) 5 4 b至該散熱件黏接區5 0 0上而將散熱件5 4牢固地箝接於美 板5 0上。 利用散熱件5 4支撐部5 4 b上之溝槽5 7容納該流動彳生# 黏劑55使其固化,雖可提供錨定作用(Anchor)力口強散'熱 件5 4與基板5 0間之接合強度,但該溝槽5 7充入膠黏劑$ 即呈一密閉空間,使得溝槽5 7内原本殘存的空氣無法排除 而積存於溝槽5 7中,導致後續製程之溫度循環 (Temperature Cycle)下,該散熱件54溝槽57中的空氣 受熱膨脹氣爆(P〇p c 〇 r η)而降低散熱件5 3與基板5 0間之 黏接信賴性(Adhesion Reliability)。 除此之外,由於溝槽内部的膠黏劑受到散熱件阻隔而 呈現密閉充填,因此從散熱件的外觀常無法正確檢知膠黏 劑的施膠量,而使得施膠量過多時,膠黏劑溢流至基板上 而發生溢膠;若施膠量過少時,溝槽内殘留的空氣又容易 產生氣爆等問題,是故,發展一種從散熱件外觀即能清楚 檢視出膠黏劑施膠量適量與否之方法,已成為業界的急切 之務。 【發明内容】 鑑於前述習知技術之缺失,本發明之主要目的旨在提 供一種可將散熱件中用於接觸基板之支撐部溝槽内的殘存 空氣排除’以提昇散熱件與基板間之黏接信賴性 (Adhesion Reliability)之具散熱件之半導體封裝件。 本發明之另一目的,即在提供一種低成本,且可避免 散熱件中用於接觸基板之支撐部的溝槽殘存空氣而損及後
1730]矽品.ptd 第7頁 1242863 五、發明說明(4) 續製程信賴性之具散熱件之半導體封裝件。 本發明之又一目的在於提供一種可以正確檢知膠黏劑 充填量,據以判斷膠黏劑之塗佈量是否適當之具散熱件之 半導體封裝件。 本發明之再一目的,則在提供一種散熱件結構,其用 於接觸在基板的支撐部設有一溝槽,且在支撐部上設有用 以將溝槽内的殘存空氣排除的排氣道,俾以提昇散熱件與 基板間之黏接信賴性。 為達成上揭及其他目的,本發明所提供之具有散熱件 之半導體封裝件,係包括:一基板;至少一接置於基板上 並與之電性連接之半導體晶片;一散熱件,係具有一平坦 部及一體連接於該平坦部上用以架撐該平坦部至晶片上方 之支撐部,其中,該支撐部與基板接觸之位置上係開設有 至少一溝槽,且溝槽之四周係形成有一或多個連通該溝槽 至外界之排氣道;以及,一充填於該溝槽及排氣道之膠黏 劑,用以穩固接合該散熱件至該基板上。 該溝槽可為單一環狀的凹槽或複數個凹狀的槽口所組 成,且該溝槽之截面係視沖壓器械之形狀及種類而定,一 般可為方形、V字型、半圓形或其他形狀。 藉由橫向貫穿溝槽之排氣道為該散熱件支撐部内之溝 槽提供一外接通道,可以使該膠黏劑充填入溝槽以後,原 本殘留於該溝槽内之空氣受到膠流擠壓而由各排氣道向外 排出,避免未排除的空氣受到後續製程之溫度循環 (Temperatur e Cyc 1 e)影響膨脹而損及散熱件與基板間
17301 矽品.ptd 第8頁 1242863
五、發明說明(5) 之黏接信賴性(Adhesion Reliability) 。i 士工
Lyj 冉一方面,封 裝操作人員亦能藉由該排氣道連通於外界出口處所溢出的 膠量多募,據以判定膠黏劑的充填量是否適當&而Z精準 地控制膠黏劑的充填品質。 μ / 【實施方式】
以下係藉由特定的具體實例說明本發明之實施方式, 熟悉此技藝之人士可由本說明書所揭示之内容二=地^解 本發明之其他優點與功效。本發明亦可藉由其他不同的具 體實例加以施行或應用’本說明書中的各項細節亦可基ς 不同觀點與應用’在不悖離本發明之精神下進行各種^掷 與變更。 首先, 半導體封裝 陣列封裝件 Carrier 置於該基板 凸塊1 1周圍 該基板1 0之 [4與該基板 該基板1 0之 的複數個銲 與自該平坦 以藉該支撐 時,該支撐 請參閱第1 A圖,其係為本發明之具有散敎件 件的較佳實施例剖視圖’其係為一覆晶式球米 1 (FCBGA),包括一作為晶片承载件(Chip 基板1 0,以導電凸塊1 1電性連接至基板丨〇且告 10之第一表面10a上的晶片12,填充於該導電: 的底部充填(U n d e r f i 1 1 )絕緣材料1 3,接置於 第一表面1 0a上的散熱件1 4,敷設於該散熱件 1 〇之第一表面1 0 a間的膠黏劑1 5,以:1… 咕 及植接於
第二表面1 〇 b且與複數個導電凸塊Jφ 4 i電性連接 球1 6 ;其中,該散熱件1 4係具有_伞± ^ 十垣部1 4 £ 部1 4 a周圍向該基板1 〇方向延伸的古 X辉部1 4 b, 部1 4b黏接於該基板1 〇之第一表面1 ^ ^ 丄u a上,同 W 1 4b底面上開設有一溝槽1 7,而該溝槽1 了係
1242863 五、發明說明(6) 為單一環狀的凹槽1 7 a或複數個凹狀的槽口 1 7 b所組成,該 支樓部1 4b之側邊係設有至少一橫向貫穿過溝槽丨7頂部的 排氣道1 8,使該溝槽1 7連通至外界。 該散熱件1 4係選用一鍍有鎳的銅材料,其係由一平坦 部1 4a及一體連結於該平坦部丨4a並將該平坦部1 4a架撐於 晶片1 2上方之支撑部丨4b所構成,其中,該平坦部丨4a係具 有約2 0〜4 0密爾(m i 1 )之厚度;相對地,該支撐部丨4b之高 度約可設計成1 0〜4 0密爾(m丨1 ),其數值可視晶片之厚度或 配置層數而定;惟該散熱件丨4之平坦部1 4a可藉由導熱膠 1 9而黏接於該晶片} 2之表面上,以藉由該導熱膠i 9將晶片 1 2產生之熱量傳遞至散熱件丨4復散逸至外界。 第2 A圖係進一步檢視本發明散熱件之底部示意圖。本 實施例之散熱件1 4之外形係為一方形,由圖式觀之該環狀 支撐部1 4b上係開設有一環狀封閉的凹槽1 7a,該凹槽1 7a 係環繞成方形,且該凹槽1 7 a頂部係開設有一或多個橫向 貫通該凹槽1 7 a之排氣道1 8,使得該散熱件1 4與敷設於該 基板1 0第一表面1 0 a上的膠黏劑1 5接觸後,該膠黏劑1 5可 以填入散熱件1 4底面的凹槽1 7a而將凹槽1 7a内的空氣擠入 該排氣道1 8,致使該膠黏劑1 5得以確實地填入該凹槽1 7 a 内。惟本發明所使用之膠黏劑1 5係為例如銀膠(S i 1 v e r Paste)或環氧樹脂(Epoxy)為主及其他類似材料之流動 性膠料,以本實施例為例,該膠黏劑1 5係以銀膠(S i 1 v e r Paste)為代表。 第2B圖係顯示該散熱件1 4之另一實施例,其不同於前
1242863 五、發明說明(7) 述散熱件之處在於該支撐部1 4b之底面係形成有複數個槽 口 17b,且每一個槽口 17 b之頂面各設有一或多個連通該槽 口 1 7b至外界之排氣道1 8,此種支撐部丨4b設計同樣得於銀 膠填入時將該槽口 1 7b中的空氣推擠入排氣道1 8而排出至 外界,以達到防止氣泡積存之目的。 膠黏劑1 5經由烘烤(B a k i n g )步驟固化後,如第1 B圖所 示’得使該凝固在排氣道1 8内的膠黏劑1 5具有鎖固 (Locking)之功效,同時,藉由該溝槽17及排氣道18 (如 第2 A、2B圖所示)之間隔排列方式,亦可令膠黏劑1 5對該 散熱件1 4之鎖固力的分布更形均勻,藉此強化其黏著強 度,而避免該散熱件1 4於受震後脫落,進而達到使散熱件 1 4與基板1 〇間穩固接合之功效。 再一方面,該溝槽1 7如第3 A圖所示,可藉由一方形沖 壓頭21a (Punch)沖製(Stamping)而成,令溝槽1 7的斷面 形狀為一方形,再以針沖頭2 1 b沖製貫穿的排氣道1 8,如 第3 B圖所示,因此,藉由沖壓方法,即可簡易且低成本地 製出所需的散熱件1 4之溝槽1 7與排氣道1 8。 又該溝槽1 7之斷面形狀亦非本發明之限制,如第4 A、4 B圖所示,即以一尖角沖壓頭2 2取代前述的方形沖壓 頭2 1 a,而可沖製出一 V字型溝槽2 7,亦同樣可如第4 B圖 般於其上形成排氣道1 8 ;至於第5 A、5 B圖,則顯示以圓 形沖壓頭2 3沖製而成的半圓形溝槽3 7及排氣道1 8,亦同樣 可發揮本發明之功效。 故,以橫向貫穿溝槽之排氣道作為該散熱件支撐部内
17301 矽品· Ptd 第11頁 1242863 五、發明說明(8) 之溝槽提供一外接通道,可以使該膠黏劑充填入溝槽以 後,原本殘留於該溝槽内之空氣受到膠流擠壓而由各排氣 道向外排出,避免未排除的空氣受到後續製程之溫度循環 (Temperature Cycle)影響發生膨脹而損及散熱件與基 板間之黏接信賴性(A d h e s i ο n R e 1 i a b i 1 i t y);另一方 面,封裝操作人員亦能藉由該排氣道連通於外界出口處所 溢出的膠量多募,據以判定膠黏劑的充填量是否適當,而 更精準地控制膠黏劑的充填品質。 又,藉由本發明散熱件上的溝槽與排氣道之設計,可 以讓固化成型之膠黏劑對散熱件產生錨定(Anchor)鎖固 功效,以免因為散熱件與基板間之材質熱應力差或震動等 因素而影響到散熱件與基板間之接合信賴性。 綜上所述,以上僅為本發明之較佳實施例而已,並非 用以限定本發明之實質技術内容範圍,本發明之實質技術 内容係廣義地定義於下述之申請專利範圍中,任何他人完 成之技術實體或方法,若是與下述之申請專利範圍所定義 者係完全相同,亦或為同一等效變更,均將被視為涵蓋於 此申請專利範圍中。
17301 矽品.ptd 第12頁 1242863 圖式簡單說明 【圖式簡單說明】 第1 A圖係為本發明具散熱件之半導體封裝件的剖視示 意圖; 第1 B圖係為本發明具散熱件之半導體封裝件的另一剖 視不意圖, 第2A圖係為本發明具散熱件之半導體封裝件的散熱件 底視圖; 第2B圖係為本發明具散熱件之半導體封裝件的另一散 熱件底視圖; 第3A圖係為本發明具散熱件之半導體封裝件的支撐部 溝槽之第一實施成形示意圖; 第3B圖係為本發明具散熱件之半導體封裝件的支撐部 溝槽之第一實施貫穿一排氣道的成形示意圖; 第4A圖係為本發明具散熱件之半導體封裝件的支撐部 溝槽之第二實施成形示意圖; 第4B圖係為本發明具散熱件之半導體封裝件的支撐部 溝槽之第二實施貫穿一排氣道的成形示意圖; 第5 A圖係為本發明具散熱件之半導體封裝件的支撐部 溝槽之第三實施成形示意圖; 第5B圖係為本發明具散熱件之半導體封裝件的支撐部 溝槽之第三實施貫穿一排氣道的成形示意圖; 第6圖係為美國專利第5,3 1 1,4 0 2號所揭示之半導體封 裝件之剖面示意圖;以及 第7圖係習知於散熱件上開設溝槽之半導體封裝件之
]730]石夕品.ptd 第13頁 1242863
圖式簡單說明 剖面示意圖。 1 覆 晶 式 球 栅 陣 列 封裝件 1 0,4 0, 50基板 10a 第 一 表 面 10b 第二 表面 11 導 電 凸 塊 12, 42, 5 2 晶片 13 底 部 充 填 絕 緣 材 料 14,44 散熱 件 14a 平 坦 部 14b,44b 支 撐部 15, 45 膠 黏 劑 16 鲜球 17, 27, 3 7溝槽 17a 凹槽 17b 槽 口 18 排氣 道 19, 49 導 献 膠 21a 方形 沖壓 頭 21b 針 沖 頭 22 尖角 沖壓 頭 23 半 圓 沖 壓 頭 401 基板 凹槽 500 散 熱 件 黏 接 區 17301石夕品· ptd 第14頁

Claims (1)

1242863 六、申請專利範圍 1. 一種具散熱件之半導體封裝件,係包括: 一基板; 至少一晶片,係接置於該基板上並與之電性連 接; 一散熱件,其具有一平坦部及一體連接於該平坦 部上用以架撐該平坦部至晶片上方之至少一支撐部, 其中,該支撐部供基板接觸之位置上係設有至少一溝 槽,且該溝槽之四周形成有一個以上連通該溝槽至外 界之排氣道;以及 一充填於該溝槽及排氣道内之膠黏劑,藉以黏接 該散熱件至基板上。 2. 如申請專利範圍第1項之具散熱件之半導體封裝件,其 中,該半導體封裝件係為一覆晶式球柵陣列封裝件。 3. 如申請專利範圍第1項之具散熱件之半導體封裝件,其 中,該溝槽係為一環狀的凹槽。 4. 如申請專利範圍第1項之具散熱件之半導體封裝件,其 中,該溝槽係為複數個凹狀的槽口。 5. 如申請專利範圍第1項之具散熱件之半導體封裝件,其 中,該溝槽之截面係為方形。 6. 如申請專利範圍第1項之具散熱件之半導體封裝件,其 中,該溝槽之截面係為V字型。 7. 如申請專利範圍第1項之具散熱件之半導體封裝件,其 中,該溝槽之截面係為半圓形。 8. 如申請專利範圍第1項之具散熱件之半導體封裝件,其
17301石夕品.ptd 第15頁 1242863 六、申請專利範圍 中,該溝槽係以一沖壓頭(P u n c h )沖製(S t a m p i n g )而 成。 9 .如申請專利範圍第1項之具散熱件之半導體封裝件,其 中,該排氣道係貫穿溝槽而設置於該溝槽之頂部。 1 0 .如申請專利範圍第1項之具散熱件之半導體封裝件,其 中,該膠黏劑係為一銀膠(S i 1 v e r P a s t e)。 1 1 . 一種散熱件,其中該散熱件具有一平坦部及一體連接 於該平坦部上用以架撐該平坦部至晶片上方之至少一 支撐部,其中,該支撐部底面係設有至少一溝槽,且 該溝槽之四周形成有一個以上連通該溝槽至外界之排 氣道。 1 2 .如申請專利範圍第1 1項之散熱件,其中,該溝槽係為 一環狀的凹槽。 1 3 .如申請專利範圍第1 1項之散熱件,其中,該溝槽係為 複數個凹狀的槽口。 1 4 .如申請專利範圍第1 1項之散熱件,其中,該溝槽之截 面係為方形。 1 5 .如申請專利範圍第1 1項之散熱件,其中,該溝槽之截 面係為V字型。 1 6 .如申請專利範圍第1 1項之散熱件,其中,該溝槽之截 面係為半圓形。 1 7 .如申請專利範圍第1 1項之散熱件,其中,該溝槽係以 一沖壓頭(Punch)沖製(Stamping)而成。 1 8 .如申請專利範圍第1 1項之散熱件,其中,該排氣道係
17301石夕品.ptd 第16頁 1242863 六、申請專利範圍 貫穿溝槽而設置於該溝槽之頂部。
1730]矽品.ptd 第17頁
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