TWI235025B - Circuit board structure and method for fabricating the same - Google Patents

Abstract

A circuit board structure and a method for fabricating the same are proposed, wherein a core substrate formed with a metal layer on surfaces thereof and a plurality of plated through holes therein is provided. A conductive layer is formed on the surface of the terminal portion of the plated through hole, and a resist layer is formed on the metal layer of the core substrate with a plurality of openings, wherein at least an opening is formed to expose the terminal portion of the plated through hole. After a plated metal layer is formed within the opening by an electroplating process, the resist layer is removed and the metal layer of the core substrate is patterned. By the arrangement, the plated metal layer can be selectively formed on the partial plated through hole for electrical connection pad without affecting the layout of electric trace and fine circuit process.

Description

1235025 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a circuit board structure and a manufacturing method thereof, and more particularly to a method for electrically connecting upper and lower acoustic circuit layers in a multi-layer circuit board by using a plated through-hole structure to conduct conduction. Circuit board structure and manufacturing method thereof. [Previous technology] With the vigorous development of the electronics industry, electronic products have gradually entered the trend of energy and high performance research and development. In order to meet the packaging requirements of high integration and miniaturizaion of semiconductor devices, 'for more active and passive components and circuit connections, the circuit board structure carrying semiconductor wafers has gradually evolved from double-layer boards. Multi-layer board (Muiti ir board), in a limited space, the use of inter-layer connection technology (

Interlayer connection) to expand the available circuit layout area on the circuit board, to meet the needs of high circuit density integrated circuit (ute circuit), in order to defeat the same thunder; circuit and components. η The larger number of circuit boards in the early area is to meet the high-performance computing requirements of microprocessors, chip sets, and graphics chips, etc. Circuit boards with wires need to raise the cover of theta-day film- " * Electrical and electronic board office can only use functions such as transmitting chip signals, improving bandwidth, and controlling impedance to achieve high performance .... In line with the development direction of semiconductor packages, thin, short, and multi-dagger, The circuit board has been oriented to :: i wide;! L circuit board, traditional 10 ° micron circuit size: = line width jLlne Wldth), line spacing (space) and Shenzhen, reduced to less than 30 microns, R & D. Green Rule

17658 懋 .ptd Page 10

1235025 --------------- V. Description of the invention (2) ~~ —— In order to improve the wiring precision of the circuit board, the industry has developed a build-up technology. That is, on the surface of a core circuit board (core circiJt board), multiple layers of insulation layers and circuit layers are alternately stacked by using a line build-up technology, and conductive blind vias (conduct 丨 ve viak are provided in the insulation layer for power between upper and lower lines). Among them, the process of increasing the layer thickness of the circuit is the key to the circuit density of the circuit board. According to the current technology, the industry usually makes multilayer circuit boards by adding two processes. Please refer to Figures 1A to 1C. One such as semi-additive method (

Semi-additive process (SAP). First, a core circuit board 10 is provided, and an insulating layer u is formed on the surface. The laser drilling (Laserdri 1 1 ing) technology is used in the insulating layer. An opening 1 1 0 is formed on 11 to communicate with the inner circuit layer 1 2 of the core circuit board 10 (as shown in FIG. 1 a). Next, a conductive seed layer 13 is formed on the insulating layer 11 by electroless copper plating, and a patterned resist layer 14 is applied on the seed layer 13 to perform electroplating on the seed layer 1 3 Patterned circuit layer 1 5 is formed on the surface (as shown in Fig. 1 β). After that, the resist layer 14 is peeled off and etched to remove the seed layer 1 3 previously covered under the resist layer 14 (as shown in FIG. 1C). In this way, using these steps to repeatedly form the insulating layer and Adding a circuit layer is to make a circuit board with a multilayer circuit structure. However, according to the conventional multi-layer circuit board produced by the build-up method, if the chip signal is to be transmitted from the upper layer of the circuit board to the lower layer, the signal must be added from the upper layer circuit, through the upper layer circuit layer, and between the upper circuit layers. The conductive blind hole, and the upper circuit layer on the core circuit board, then pass through the plated through hole (PTT), the core circuit

17658 全懋 .ptd Page 11 1235025 -S ^ ------------ V. Description of the invention (3)

The conductive blind holes between the lower circuit layer of the circuit board, the lower increased circuit layer and the lower increased circuit layer 'reach the lower layer of the circuit board. The signal transmission path is too long, which can easily lead to increased inductance and cause cross-talk or noise. In addition, since most of the electrical chain vias are formed in the core circuit board, when the patterned circuit layer is subsequently formed in the layered circuit layer formed on the core circuit board and the lower surface, the connection must be extended from the plated through hole. Pad space to form a conductive blind hole (Conductive v 1 a) 'This not only wastes the circuit board wiring area, is not conducive to the trend of miniaturized packaging, but also affects the circuit board because of the need to avoid the position of the plated vias in the circuit layout. Flexibility in the use of space.

Furthermore, there may be a way to form conductive blind vias directly on the plated vias. However, if conductive blind vias are to be formed directly on the plated through vias, the entire circuit board surface with the conductive vias must be formed first. Metal layer, and in order to form conductive blind holes in the plated vias, a metal layer of sufficient thickness must be formed on the plug hole resin of the plated vias to prevent the metal layer from being subject to plug hole resin in subsequent processes The effect of cracks or even separation, but because the metal layer is formed on the entire surface of the circuit board at the same time, often due to the thickness of the metal layer is too thick or uneven thickness problems, resulting in subsequent patterns such as In the chemical process, the accuracy of forming conductive lines and electrical connection pads is troubled, and a dense and fine circuit structure cannot be formed. And because of the reduction of integrated circuit (1C) area, and other packages with high density and multi-pin characteristics have gradually become the mainstream in the packaging market, and the circuit board manufacturing process accounts for 20% to 50% of the packaging cost, so The integrated circuit manufacturing process on semiconductor wafers has been reduced to 0.09 // m and the package size has been continuously reduced to

17658 Quan 懋 .Ptd Page 12 1235025 V. Description of the Invention (4) '' When it is almost the same size as a chip (about 2 times the size of the chip), how to develop a fine circuit and high circuit density that can be used with it At the same time, the circuit board structure does not increase excessive manufacturing costs, which is undoubtedly an important R & D issue for the semiconductor industry and other related electronics industries to enter the next generation of technology. [Summary of the Invention] In view of the shortcomings of the conventional technology described above, the main object of the present invention is to provide a circuit board structure and a manufacturing method thereof, which can be directly opened on a plated through hole > to form an electrical connection method & for a circuit The remaining electrical connection ends of the board and the conductive lines have a fine and thin circuit structure. In providing a layout area, the layout is flexible to provide a space, and the connection is related to providing a to avoid sexual quality. In the present invention, the core layer board, the vias; the electrical layer; the resistance layer, the end of the invention, to expand the circuit board circuit (Interlayer circuits), another purpose of the present invention is to shorten the conductive blind Hole wiring plating vias form better electrical properties. Another purpose of the present invention is to shorten the signal transmission path and increase the power of semiconductor devices in one step. To achieve the above and other objectives, the method includes: providing a layer and forming a majority of electricity. A patterned plating is formed on the conductive metal layer on the surface of the end of the plated via hole, and a patterned plating is exposed on the surface of the plating via hole. The circuit board structure and its manufacturing method are exposed and the interlayer circuit properties are improved. Hole plating and electrical circuit board structures and the production of crosstalk and noise have revealed a circuit board structure. The surface of the core board has metal to reveal the electrical selectivity of the core board on the surface of the core board. The patterned plating resist layer has an opening; a plating process is performed to

1235025 V. Description of the invention (5) Forming a plated metal in the opening of the plating resist layer and patterning the metal layer on the surface of the core layer board The direct plating (DP) on the surface of the end of the plated via hole is applied to the electrode. It can be formed into a conductive film such as Ji, or it can be formed by using a plug-hole insulation part of a plated-through hole or an electroplating method can be used on the core board as a whole. At the connection end, a gold pattern plating process can be used to form a case on the surface of the comprehensive circuit structure (including the electrical connection end of the key via), and the patterned circuit structure process is performed, and the solder layer is exposed outside. A metal shield is formed on the surface, or a patterned circuit structure process can be performed first, and then a metal shield is formed on the electrical connection end of the solder resist layer through electroplated wires or chemical deposition, and the electrical connection end can be used as a part. In addition, the end of the plated through hole can also be used as a layer in the subsequent layer build-up structure. A conductive blind hole is directly formed on the plated through hole to effectively increase the wiring layout space and enhance the line. The layer build-up process can be continued to form a circuit board. 〇 Electrical layer plating chemistry such as steel surface electricity pattern on electricity and after nickel, the protective layer is re-laminated, the protective layer circuit is conductive to remove the plating resist layer; can be directly plated through the square through hole The plug hole insulation is deposited in a way that is electrically conductive. After that, a thin metal layer is also formed, and the end of the via is straightened and electroplated GPP (the surface of the gold circuit board to form the rest of the circuit board / gold and other metal protective layer is covered with a patterned electrical connection terminal; also Covering a patterned solder mask to expose the patterned board and subsequently placing conductive elements to form electrical connections, the use of blind holes shortens the conductive pathway and allows for flexible layout. After that, a multi-layer circuit structure

17658 Quan 懋 .ptd Page 14 1235025 V. Description of the invention (6) That is, through the above process, the present invention uses a resistive layer to cover the area where a fine line is to be formed, and then selectively selects the end of a plated via hole Form a metal layer without affecting the rest of the layout space of the circuit and the process of fine lines. At the same time, it can be further applied in the process of layer buildup. The electrical connection end formed on the plated through hole reduces the number of conductive blind holes. The arrangement and wiring of the required electrical connection terminals occupy space on the circuit board, which effectively improves the density of the wiring. In addition, through the foregoing processes, the present invention also discloses a circuit board structure, which includes: a core board having a patterned circuit structure formed on its surface; and a plurality of plated through holes penetrating through the core board, wherein the patterning The circuit structure has a plurality of electrical connection ends and conductive lines, and at least one electrical connection end is formed on the key via. The core board may be a multi-layer circuit board that has completed the previous process. Therefore, with the circuit board structure and the manufacturing method of the present invention, the electrical connection terminal can be selectively formed directly on a part of the plated through-holes where the electrical connection terminal is to be formed for subsequent connection with a conductive element. The electrical connection between the circuit board and the rest of the electronic components (semiconductor wafer or circuit board), or a conductive blind hole of a circuit build-up structure can be directly formed on the electrical connection end of the plated through hole to reduce the conventional formation. When conducting blind vias (Connductivevia), it is necessary to extend the space of the connection pad (Pad) to increase the density and flexibility of the wiring, shorten the conductive path, reduce inductance, crosstalk and noise; in addition, the plating The electrical connection ends on the vias are formed independently in the manufacturing process, without affecting the process of the remaining electrical connection ends of the circuit board and the conductive lines, so as to avoid the formation of electricity on the plated through holes in the conventional technology.

17658 Quan 懋 .ptd Page 15 1235025 V. Description of the invention (7) When the connection is made, a metal layer with an excessively thick or uneven thickness must be formed on the overall circuit board, resulting in the subsequent formation of conductive lines in the patterning process. And the accuracy of the electrical connection end is troubled, and it is impossible to form a circuit board with a fine circuit structure, etc., and a circuit board structure with a fine circuit and a high wiring density can be provided. [Embodiment] The following is a description of specific embodiments of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied by other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the spirit of the present invention. Hereinafter, the preferred embodiments of the circuit board structure and the manufacturing method of the present invention will be described in detail with reference to FIGS. 2A to 2M. It should be noted that these drawings are simplified schematic diagrams, and the circuit board structure of the present invention is only illustrated schematically. However, the drawings only show the elements related to the present invention. The elements shown are not the actual implementation. The number, shape, and size ratio of the elements during actual implementation are an optional design. The layout pattern may be more complicated. As shown in Figs. 2A and 2B, first, a core board 20 having a thin metal layer formed on the surface is provided. The core board may also be a multilayer circuit board that has been pre-processed. In the drawing of this embodiment, the core layer board 20 is composed of an insulating layer 200 and a thin metal layer 2 01 formed on the surface of the insulating layer 200; further, a mechanical or laser drill is used. A plurality of through holes 2 0 2 are drilled in the core board 20

17658 Quan 懋 .ptd Page 16 1235025 V. Description of the invention (8) (as shown in Figure 2B). The insulating layer 2 0 may be epoxy resin (

Epoxy resin), Polyimide, Cyanate

Ester), glass fiber, bismaleimide triazine (BT) or FR 5 material mixed with epoxy resin and glass fiber, the metal thin layer is 2-1 It is based on copper (Cu), which has better conductivity, as a conductor material for signal transmission, and the thin metal layer 201 can be first laminated or deposited on the insulating layer 200, or resin can be used to laminate copper. Foil (Resin coated copper, RCC). This embodiment uses a resin-compressed copper pig (RCC) as an example for illustration. As shown in Figure 2C, next, physical vapor deposition (PVD), chemical vapor deposition (CVD), electroless plating, or chemical deposition are used, such as sputtering, evaporation, and arc vapor deposition. (Arc vapor deposition), Ion beam sputtering, Laser ablation deposition, Plasma promoted chemical vapor deposition or electroless plating, etc. A conductive layer (not shown) is formed on the surface of the through-hole 202, and the conductive layer is used as a current conduction path to be electroplated on the surface of the multilayer board 20 and on the wall of the through-hole 202 There is a metal layer 2 0 3 of sufficient thickness. As shown in FIG. 2D, a filler material 2 0 4 (such as an ink resin) is used to fill the remaining voids of the through hole 2 0 2 to form a plated through hole (PTH) 2 0 5 for electrical properties. The metal layers 200 on the upper and lower surfaces of the core board 20 are conducted. As shown in FIG. 2E, a conductive layer is formed on the surface of the end of the plated-through hole 20 5 where the core board 20 is exposed. It can be made by electroless plating, etc.

17658 Quan 懋 .ptd Page 17 1235025 ____ ______—— '— V. Description of the invention (9) A conductive layer (not shown) is formed on the surface of the core board 20, and the conductive layer is used as a current A conductive path to form a conductive thin layer 21, such as copper (Cu), on the surface of the core board 20 (the end of the filler material 204 containing the plated through-holes 2 0 5) (the thickness may generally be 3 to 1 〇 // m). In addition, as shown in FIG. 2E ′, processes such as direct bonding (DPirec 11 plating, DP) can also be performed on the core board 20 to form a surface such as I on the surface of the core board. The conductive film 2 0 3 a of Bar (P d) is subjected to a chemical stripping process to make the metal layer adhere to the end surface of the filling material 2 0 4 of the plated through hole 2 0 5 or chemical copper. Wait until the end surface of the filling material 204 of the plated through-hole 250 is covered with a conductive film 203a. Among them, the conductive thin layer 21 or conductive film 203a formed on the end surface of the filling material 20 4 of the plated through hole 20 5 is mainly used as a current conduction path, and can be selectively conducted in the plated conductive during subsequent plating processes. A plated metal layer is formed on the holes 2 0 5. The following description of the subsequent process is mainly based on forming a conductive thin layer 21 such as copper (Cu) on the core layer board 20, and the end of the filling material 2 0 4 of the plated through hole 2 0 5 A conductive film 203a, such as palladium or copper, is formed on the surface. The subsequent process is similar to the process steps described below, so it will not be repeated here, and it will be described first. As shown in FIG. 2F, a first resistive layer 22 is formed on the core layer board 20, and is subjected to a patterning process such as exposure, development, etc. to selectively make the first resistive layer 2 2 is formed with at least one opening 2 2 0 and a conductive thin layer 21 at an end portion of the electric money via hole 2 05 is exposed. The material of the first resistive layer 22 can be, for example, a dry film or a photoresist, which can be used as an electroplating resistive layer in a subsequent electroplating process.

17658 Quan 懋 .ptd Page 18 1235025 Explanation (10) As shown in FIG. 2G, the electric money port 220 is formed in the electric money port 220, such as copper metal, and the first-resistance layer 22 is removed (as shown in FIG. 2Η). As shown, electrical vias 2G5 of layer 23 are formed on the metal layer; ^ In this way, it can be selectively formed on part of the metal layer 23 only on the metal layer 23 of the electrical department, where ^ electricity = not formed in the core Layer # 20 The remaining galvanic ore conduction = 20 = \ and the electroplated vias 2 0 5 are electrically charged, or the area of the thin line or the Mr ^ ^ ^ ^ s electroplated I metal layer 23 series can be followed by After patterning, it is used as the electrical connection end of the circuit board as shown in Figure 2. Using gold pattern plating Gpp (Goid I at ing process) to form a metal layer with a patterned circuit structure. A metal protective layer is formed on the surface. First, a second resistive layer 2 4 ′ is formed on the core layer board 20, and a patterning process is performed to form a plurality of openings in the second resistive layer 24 to expose the core. The metal layer portion of the patterned circuit structure is to be formed on the surface of the layer plate 20. The material of the second resistive layer 24 can be, for example, a dry film or a photoresist for later use. It is used as a plating resist when electroplating. As shown in FIG. 2J, a plating process is performed to form a metal protective layer 25 such as nickel / gold in the opening of the second resist layer 24, and then, The gas barrier layer 24 is removed. In this way, a metal protective layer 2 5 is formed at the metal 1 & where the patterned circuit structure is to be formed (as shown in FIG. 2K). I “As shown in FIG. 2L It is shown that the metal protective layer 25 (such as eight nickel layers) is used as an etching resistance layer to perform an etching process, so as to remove a part of the metal thin layer 201 covered by the metal protective layer 25 of fujin. 4 metal layer 21 to form a patterned circuit structure 26, and the pattern and the conductive thin surface are covered with a metal protective layer such as nickel / gold 2. 5. The pattern in Fuzhong circuit structure

17658 Quan 懋 .ptd Page 19 1235025 V. Description of the invention (11) 26 packages of circuit structure and at least one electricity as shown in Figure 2M covered with a fresh and solder resist layer 2 7 forming a structure 2 6 want to be a brother of a circuit board The process shown in the figure 2 E 'is as follows: it is formed into an electroplated metal to form a metal protection, and it has a process of patterning and patterning into electrical connection terminals. The electrical connection terminal 260 and the conductive circuit 2 61 are included in the majority, and the electrical connection terminal 260 is formed on the plated through hole 205. As shown in the figure, the circuit structure 2 6 layer 27 of the patterning process is completed, and the patterning process of the solder resist layer 27 is performed to make the openings open, and the patterned circuit junction electrical connection ends are exposed. The metal protective layer 25 of part 260 is finished. In addition, please refer to FIG. 2M, which is the same as that when the electric film 2 0 4 at the end surface of the filling material 2 0 5 of the electric mine through hole 2 0 3 a is passed through the plated through hole 2 0 5 Upper layer 2 3. The upper layer 25 of the metal layer on which the patterned circuit structure is to be formed, the patterned circuit structure 26, and the circuit, the surface of the circuit board is covered with a solder resist layer 27 and privately exposed to reveal the pattern. In the circuit structure 26, the metal protective layer 2 5 to be part 2 60 is used to complete a circuit board. Therefore, the method for manufacturing the circuit board structure of the present invention described above is mainly through the surface of the end of the plated through hole directly. A plating method (Di 『⑶ 七 Plating, DP) or a chemical deposition method so that the plug insulating part of the plated through hole is covered with a conductive film such as palladium or copper, or a conductive thin layer is formed by electroplating. Subsequently, an electrical connection end can be selectively formed directly on the end of the through hole of the electric mine through electroplating. The GPP (Gold pattern plated) process can be used to fully pattern the circuit board surface. Line knot On a form such as a nickel / gold metallic protective layer, and patterning process to form comprises a plurality of electrically connected with a

1235025 V. Description of the invention (12) '" " After that, cover-patterning again. Electrical connection terminals with a metal protective layer formed on the second surface. The formation method of the Γ diffusion layer is not limited to the aforementioned Gpp process, and any process of forming a metal protective layer on the structure can be used. Please refer to the 2M 'diagram, which has been revealed before-a kind of f inverse structure, including-core board 2: there is a picture = line λ structure 26; and most of the electrical ore i through the core board i The circuit 261 is at least -electrical ^ on the plated through hole 205. In other words, an electrical remote post βββη is formed on the plated through hole 205 of the present invention, and it is born on the "I".丨 The knife covers the process of forming a thin line Λ: and connects 2 = ^ ㈣ to cover the thin line with a resist. And this electrical connection is used to connect conductive components. ρ can be used as a circuit board. In addition, as shown in FIG. 3, an electrical connection is formed at the end of the Mβ # 丄 :: in layer J 30 < after the conductive blind hole is received in the structure 31 through the conductive hole 亦It can be used to form conductive blind holes 328 on the subsequent layer build-up layer 305, so that it can directly set and connect the electrical connection end of the via of the mine. This can reduce the number of conductive blind holes and is effective. Increase the layout of the outer two workshops, shorten the conductive pathway, and continue to carry out the line management: S to improve the flexibility of the line layout. Then construct the circuit board. Layer process, 俾 formation-with multi-layer wiringΪ

Page 21 In addition, although the previous 17658 of the present invention is complete. Ptd 1235025 V. Description of the invention (13) The process of the invention can also be applied to multilayer boards, that is, the core board of the previous diagram can be a completed front-end process The multilayer board can be used to form a circuit board with a multilayer circuit structure according to the foregoing process. As shown in Figures 4A and 4B, it is a circuit board structure with a four-layer circuit structure obtained by applying the foregoing process of the present invention. , And a circuit board structure 40 B with a six-layer circuit structure. Of course, the application of the present invention is not limited to the aforementioned two-layer, four-layer, or six-layer circuit board structure, but it can be applied to any circuit board with a multilayer circuit structure. Therefore, with the circuit board structure and the manufacturing method of the present invention, the electrical connection terminal can be selectively formed directly on the plated through-holes where electrical connection terminals are to be formed for subsequent connection with conductive elements to provide the circuit. The electrical connection between the board and other electronic components (semiconductor wafer or circuit board), or a conductive blind hole of a circuit build-up structure can be directly formed on the electrical connection end of the plated through hole, and the conventional conductive conduction can be reduced. For a blind via (Conductive via), it is necessary to extend the space of the connection pad (Pad) to increase the density and flexibility of the wiring, shorten the conductive path, reduce inductance, crosstalk and noise generation; in addition, the plated via The above electrical connection terminals are formed independently in the manufacturing process without affecting the process of the remaining electrical connection terminals and conductive lines of the circuit board. In order to avoid the formation of electrical connection terminals on the plated through holes in the conventional technology, it is necessary to A metal layer with an excessively thick or uneven thickness is formed on the overall circuit board, resulting in subsequent precision in the formation of conductive lines and electrical connections in the patterning process Disturbance, and can not form a fine wiring structure deletions serve to provide a fine line (F i n e c i r c u i t) and high-density wiring circuit boards. Please refer to FIGS. 5A to 5I, which are the method of manufacturing the circuit board structure of the present invention.

17658 Quan 懋 .ptd Page 22 1235025 V. Description of the invention (14) Schematic diagram of the second embodiment. As shown in FIGS. 5A to 5D, at least one core board 50 with a metal thin layer 501 formed on the surface is provided, and the core board 50 may be a multi-layer circuit board with pre-processing completed. In the diagram of this embodiment, the core board 50 is composed of an insulating layer 500 and a thin metal layer 501 formed on the surface of the insulating layer, and the core board is mechanically drilled. A plurality of through holes 5 0 2 are set in the middle drill (as shown in Fig. 5B). Next, a conductive layer (not shown) is formed on the surface of the core board 50 and its through-holes 502, and an electroplated layer is formed on the surface of the core board 50 and the wall of the holes of the through-holes 50. A conductive metal layer 503 with sufficient thickness (as shown in Figure 5C). A filling material 5 0 4 is formed to fill the remaining gap of the through hole, and a plated-through hole (PTH) 5 0 5 is formed to electrically connect the metal layers 503 on the upper and lower surfaces of the core plate 5 0 (such as the 5D As shown). Thereafter, a process such as direct plating (DP) or chemical deposition is performed on the core layer plate 50, and then a chemical stripping process is performed to form a surface such as palladium (Pd) on the end filling material of the plating via hole. As shown in FIG. 5E, a conductive film 5 0 3 a of Pd) or copper (Cu) forms a resist layer 52 on the surface of the core layer board. The material of the resist layer 52 can be, for example, a dry film or a photoresist, which can be used as a plating resist layer in the subsequent plating process. As shown in FIG. 5F, an electroplating process is performed to form an electroplated metal layer 53 such as copper metal on the surface below the core layer board 50, and then the resist layer 5 2 is removed. In this way, an electroplated metal layer 53 ° can be selectively formed on the lower surface of the core board 50 (including the electroplated via hole 50 5 part of the lower surface of the core board).

17658 Quan 懋 .ptd Page 23 1235025 V. Description of the Invention (15) As shown in Figure 5G, a patterning process is performed to form a patterned circuit structure on the surface of the core layer 50. First, a patterned unetched resist layer (not shown) is formed on the metal layer on the surface of the core layer board 50. After the uncut process is performed to form a patterned circuit structure 56, the resist layer is removed. . As shown in FIG. 5H, a solder resist layer 57 is covered on the surface of the circuit board having a patterned circuit layer, and a patterning process of the solder resist layer 57 is performed to form a majority of the solder resist layer 57. The patterned circuit structure 56 is exposed through an opening. Wherein, the patterned circuit structure 56 includes a plurality of electrical connection terminals 5 6 0 and conductive circuits 5 6 1, and at least one electrical connection terminal 5 6 0 is formed on the electroplated conductive layer having the previously plated metal layer 5 3. Hole 5 05. As shown in FIG. 51, a method such as electroplating (such as electroplated wire) or chemical deposition (such as nickel / gold process) is then used to expose the electrical connection end 5 6 of the solder resist 5 7 opening. A metal protective layer 5 5 'such as a nickel / gold layer is formed on the surface to complete a circuit board manufacturing process. Among them, the electrical connection end 5 6 0 with the metal protective layer 5 5 can be used for subsequent connection with conductive components, and the electrical connection between the circuit board and other electronic components (such as semiconductor wafers or circuit boards) is provided. . Electricity = Description: ;;, Π: Electricity ore is formed on the single-surface covering of the core board ii: Table: Patterned lines with thicker lines are formed on the end surface of the vias of the mine. The electrical connection side of the surface circuit board with the key metal layer, and the circuit board can be used as an electrical connection with the semiconductor wafer when the surface of the circuit board is not opened. side. ,, '.结构 ’Available for the circuit board as

1235025 5. Description of the invention (16) Similarly, after the electrical connection end is formed at the end of the plated through hole, it can also be used to accept conductive blind holes in the subsequent layer buildup structure, so that it can be directly directly on the plated through hole. The conductive blind holes are formed to shorten the conductive path, and effectively increase the wiring layout space, improve the flexibility of the layout of the circuit, and then continue the process of adding layers to the circuit to form a circuit board with a multilayer wiring structure. In addition, the process of the present invention can also be applied to multi-layer boards, that is, a circuit board with a multi-layer circuit structure can be formed by referring to the foregoing process. As shown in FIGS. 6A and 6B, it is obtained by applying the foregoing process of the present invention. Circuit board structure with 4 layers and 6 layers circuit structure 60 A, 60 B. Of course, the application of the present invention is not limited to the aforementioned two-layer, four-layer, or six-layer circuit board structure, but it can be applied to any circuit board with a multilayer circuit structure. The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the essential technical content of the present invention. The essential technical content of the present invention is broadly defined in the scope of patent applications described below, and any technology completed by others. Entities or methods that are completely the same as those defined in the scope of patent application described below, or the same equivalent changes, will be considered to be covered by this patent application scope.

17658 Quan 懋 .ptd Page 25 1235025 Simple description of the drawings [Simplified illustration of the drawings] Figures 1 A to 1 C are the conventional semi-additive circuit board manufacturing process, which is not intended, Figures 2A to 2M FIG. 2E ′ and FIG. 2M ′ are schematic cross-sectional views of another embodiment of the circuit board structure manufacturing method of the present invention; FIG. 3 is a circuit board structure of the present invention. Sectional schematic diagram of the manufacturing method applied to the build-up structure; Figures 4A and 4B are schematic sectional diagrams of the manufacturing method of the circuit board structure of the present invention applied to the multilayer board; Figures 5A to 5I are the manufacturing method of the circuit board structure of the present invention FIG. 6A and FIG. 6B are schematic cross-sectional views of another embodiment of the method for manufacturing a circuit board structure according to the present invention, which are applied to a multilayer board. 10 Core circuit board 11 Insulation layer 110 Opening hole 12 Inner circuit layer 13 Seed layer 14 Resistance layer 15 Patterned circuit layer 20 Core board 200 Insulation layer 201 Metal layer 202 Through hole 203 Metal layer 2 0 3a Conductive film 204 Fill 205 Plating vias 21 Conductive thin layer

17658 Full 懋 .ptd Page 26 1235025

Brief description of the drawing 22 First resistance layer 220 Open α 23 Electroplated metal layer 24 Second resistance layer 25 Metal protective layer 26 Circuit structure 260 Electrical connection terminal 261 Conductive circuit 27 Solder resist layer 30 Core board 305 Plating conduction L 31 Line buildup structure 32 conductive blind hole 360 electrical connection terminal 40A four-layer circuit board structure 40B layer circuit board structure 50 core board 500 insulation layer 501 metal thin layer 502 shell perforation 503 metal layer 5 0 3a conductive film 504 filling material 505 Plating vias 52 Resistive layer 53 Plating metal layer 55 Metal protective layer 56 Circuit structure 560 Electrical connection terminal 561 Conductive circuit 57 Solder resist layer 60A Four-layer circuit board structure 60B Six-layer circuit board structure 17658 Full 懋 .ptd page 27

Claims (1)

1235025 _ Case No. 93105510 January / January __ VI. Application for patent scope 1. A method for manufacturing a circuit board structure includes: providing a core board, the core board having a metal layer on the surface, and the core board A large number of plated vias are formed, among which, the plated vias are filled with a filler material; a conductive layer is formed on the surface of the end of the plated vias that exposes the core board; on the surface of the core board Forming a patterned plating resist layer on the metal layer, the patterned plating resist layer having at least one opening exposing the end of the plating via hole; performing a plating process to form a plating metal layer in the opening of the plating resist layer; removing the plating A resist layer; and patterning a metal layer on the surface of the core board to form a patterned circuit structure. 2. For example, the method for manufacturing a circuit board structure according to item 1 of the patent application, wherein the conductive layer on the surface of the end of the plated-through hole is formed by direct plating (DP). 3. For the method for manufacturing a circuit board structure according to item 1 of the patent application, wherein the conductive layer on the surface of the end of the plated through hole is formed by chemical deposition. 4. The manufacturing method of the circuit board structure according to item 1 of the patent application scope, wherein the conductive layer on the surface of the end of the plated through hole is formed by electroless plating. 5. For the manufacturing method of circuit board structure in the scope of patent application item 3, where, 17658 Quan 懋 .ptc Page 28 1235025 __ Case No. 93105510_7 March 3rd of the year Amendment_ VI. Patent Application Scope The conductive layer on the surface of the end of the plated via is one of palladium and copper. 6. If the method of manufacturing a circuit board structure according to item 3 or 4 of the application for a patent, wherein the conductive layer on the surface of the end of the plated via is used as a current conduction path to form a plated metal layer on the end of the plated via . 7. The manufacturing method of the circuit board structure according to the first patent application scope, wherein the surface of the core board is offset from the conductive layer as the current conduction path 5 to form a conductive thin layer by electroplating on the surface of the core board. 8. If the method of manufacturing a circuit board structure according to item 1 of the patent application method, wherein the core board is a resin bonded copper (RCC). 9. For the method of manufacturing a circuit board structure according to item 1 of the patent application, wherein the core board may be a multi-layer circuit board that has completed the previous process. 10. The method for manufacturing a circuit board structure according to item 1 of the scope of patent application, wherein after the patterned circuit structure is formed, a patterned solder resist layer can be formed on the surface of the circuit board. 1 1. If the method of manufacturing a circuit board structure according to item 1 or 10 of the scope of patent application, before forming a patterned circuit structure, a metal protective layer may be formed on the surface of the patterned circuit structure to be formed. 12. The method for manufacturing a circuit board structure according to item 11 of the scope of patent application, wherein the metal protective layer is a metal / gold metal layer. 13. The method for manufacturing a circuit board structure according to item 11 of the scope of patent application, wherein the metal protective layer can be formed by a gold pattern plating (GPP) process. 1 4. If the method of manufacturing a circuit board structure according to item 1 of the scope of patent application, wherein ] 7658 全懋 .ptc Page 29 1235025 _Case No. 93105510 / Yi_iMi_ Patent Application Scope Patterned circuit structure includes electrical connection terminals and conductive circuits, and at least one electrical connection terminal is directly formed On the plated-through hole. 15. If the method of manufacturing a circuit board structure according to item 1 or 14 of the scope of application for a patent, wherein the electrical connection ends on the plated through holes are selectively selected on a part of the plated through holes, and a resistance layer is used to cover the Areas where fine lines are formed without affecting the layout space of the remaining lines and the process of fine lines. 16. If the method of manufacturing a circuit board structure according to item 1 or 14 of the scope of patent application, the electrical connection end can be used as a subsequent connection of conductive components on the circuit board. 0. If the scope of patent application is 1 or 1 The method of manufacturing a circuit board structure according to item 4, wherein the electrical connection end can be used to receive conductive blind holes in a subsequent layer build-up structure, so that conductive blind holes can be directly formed directly on the plated through holes to shorten the conductive path. Increase circuit layout space and increase flexibility in circuit layout. 1 8. A circuit board structure including: a core board, a patterned circuit structure is formed on the core board, and a plurality of plated via holes are formed in the core board, wherein the inside of the plated via holes It is filled with a filling material, and the patterned circuit structure has most of the electrical connection ends and conductive lines; a conductive layer is formed at least on the surface of the end of the plated through hole exposing the core board; and a plating A metal layer is formed on the plated through hole as an electrical connection terminal. 19. The circuit board structure according to item 18 of the scope of patent application, wherein the core layer 17658 All thoughts. Ptc page 30 1235025 case number 93105510 Amendment VI. The scope of the patent application board can be a tree 2 0. If the patent application board can be completed 2 1 · Ruhua 22 · Rujin and electricity 23 · Rubao 2 4 · Rudao 25 · Rulian 2 6 · Rulian, shrinking stem 27. — Core application for welding rejection application is guaranteed. The graphical connection applies for the cover to apply for the through hole without applying for termination application for termination. The patented layer of the electric lift-up board, the patented protective coating terminal patent is the nickel film patent, which can be used as a direct circuit board to form a fat-bonded copper junction (RCC). The circuit board structure of the scope item 18, wherein the core layer forms a multi-layer circuit board in a previous process. The circuit board structure of the scope item 18 includes a pattern formed on the patterned circuit structure. The circuit board structure of the range of item 18 or 21, including one, is formed on the entire surface of the patterned circuit structure. A solder resist layer is formed on the surface of the circuit, and the range of item 22 / gold metal layer is exposed. The 18th item in the range is electrically connected to the rest of the pattern. The 18th item is the circuit board range. The 18th item is the subsequent circuit that is connected to the plating guide to increase the circuit board structure of the wire. Among them, the metal circuit board structure, Among them, the electroplating is a fine circuit process for selectively forming a circuit structure on a part of the plated vias. A circuit board structure, in which the electricity is used for subsequent conductive elements. A circuit board structure, in which the conductive blind hole is directly formed on the through hole used to receive the conductive blind hole in the electrical build-up structure. The method of laying space by road and improving the layout structure of the circuit includes: a core layer board, the There is a metal layer on the surface of the core board, and there are a plurality of plated through holes, wherein the plated through 17658 Quan 懋 .ptc Page 31 March 1235025 / Revision __ Case No. 93105510 VI. Patent application hole The inside of the hole is filled with a filler; formed on the surface of the end of the plated through hole that exposes the core board A conductive layer; forming a resist layer on one surface of the core board; performing an electroplating process to form an electroplated metal layer on the other surface of the core board and removing the resist layer; and performing a patterning process to apply The metal layer on the surface of the core board forms a patterned circuit structure. 28. The method for manufacturing a circuit board structure according to item 27 of the scope of patent application, wherein the conductive layer on the surface of the end of the plated via is formed by direct plating (DP). 29. The method for manufacturing a circuit board structure according to item 27 of the application for a patent, wherein the conductive layer on the surface of the end of the plated-through hole is formed by chemical deposition. 30. The method for manufacturing a circuit board structure according to item 27 of the patent application scope, wherein the conductive layer on the surface of the end of the plated via hole is formed by electroless plating. 31. The method for manufacturing a circuit board structure according to item 27 of the scope of patent application, wherein the conductive layer on the surface of the end of the plated-through hole is one of palladium and copper metal. 32. The method for manufacturing a circuit board structure according to item 29 or 30 of the scope of patent application, wherein the conductive layer on the surface of the end of the plated via is used as a current conduction path to form the end of the plated via. Electroplated metal layer. 3 3. If the method of manufacturing a circuit board structure according to item 27 of the patent application scope, 17658 全懋 .ptc Page 32 1235025 _Case No. 93105510 March 20, __ VI. Patent Application Scope The surface of the core board uses the conductive layer as a current conduction path to form a plating on the surface of the core board A thin conductive layer. 34. The method for manufacturing a circuit board structure according to item 27 of the patent application scope, wherein the core layer board may be a resin laminated copper foil (RCC). 35. If the method of manufacturing a circuit board structure according to item 27 of the scope of patent application, the core board may be a multi-layer circuit board that has completed the previous process. 36. If the method of manufacturing a circuit board structure according to item 27 of the application for a patent, wherein the resistance layer on the surface of the core board can be one of a dry film and a photoresist, it can be used as electroplating in the subsequent electroplating process. Barrier layer. 37. The method for manufacturing a circuit board structure according to item 27 of the patent application scope, wherein after the patterned circuit structure is formed, a patterned solder resist layer can be formed on the surface of the circuit board. 38. If the method of manufacturing a circuit board structure according to item 27 or 37 of the scope of patent application, after forming the patterned solder mask layer, a metal can be formed on the surface of the patterned circuit structure where the patterned solder mask layer is exposed. The protective layer. 39. The method for manufacturing a circuit board structure according to item 38 of the scope of patent application, wherein the metal protective layer is a metal / gold metal layer. 40. The method for manufacturing a circuit board structure according to item 38 of the scope of patent application, wherein the metal protective layer can be formed by using one of electroplated wires and chemical deposition. 41. The method for manufacturing a circuit board structure according to item 27 of the scope of patent application, wherein the patterned circuit structure includes an electrical connection terminal and a conductive circuit, and at least one electrical connection terminal is directly formed on the plating via hole. . 4 2. If the manufacturing method of the circuit board structure in the scope of patent application No. 27 or 41, 17658 Full 懋 .ptc. 1235025 _ Case No. 93105510 Amended on March 4th_ Sixth, in the scope of patent application, the electrical connection end of the plated through hole is selectively on part of the plated through hole, and the resistive layer is used to cover the thin line to be formed in advance The area of the road does not affect the remaining line layout space and the process of thin lines. 4 For example, the method of manufacturing a circuit board structure in the scope of patent application No. 27 or 41, wherein the electrical connection end can be used as a circuit board. For subsequent connection of conductive elements. 4 4. If the method of manufacturing a circuit board structure according to item 27 or 41 of the scope of patent application, the electrical connection end can be used to receive conductive blind holes in the subsequent layer buildup structure, and can be used on the plated through holes. Form conductive blind holes to shorten the conductive pathway, increase the space for wiring, and increase the flexibility of wiring layout. 4 5. A circuit board structure including: a core board, a patterned circuit structure is formed on the core board, and a plurality of plated via holes are formed in the core board, wherein the inside of the plated via holes It is filled with a filling material, and the patterned circuit structure has most of the electrical connection ends and conductive lines; a conductive layer is formed at least on the surface of the end of the plated through hole that exposes the core board; an electric mine The metal layer 5 is formed on a single surface of the core layer board, and the plated metal layer formed on the plated through hole functions as an electrical connection end. 46. The circuit board structure according to item 45 of the scope of patent application, wherein the core board may be a resin-bonded copper junction (RCC). ] 7658 全懋 .ptc Page 34 1235025 _Case No. 93105510 / Year __ VI. Patent application scope 4 7. For example, the circuit board structure of the patent application scope No. 45, where the core board can be A multilayer circuit board that completes the previous process. 48. The circuit board structure according to item 45 of the scope of patent application, further comprising a patterned solder resist layer, formed on the surface of the circuit board that has completed the patterned circuit process. 4 9. The circuit board structure according to item 45 or 48 of the scope of patent application, further comprising a metal protective layer formed on the surface of the patterned circuit structure exposed on the patterned solder resist layer. 50. The circuit board structure according to item 49 of the patent application scope, wherein the metal protective layer is a metal / gold metal layer. 51. The circuit board structure according to item 45 of the scope of patent application, wherein the electrical connection ends on the plated vias are selectively selected on part of the plated vias without affecting the fine circuit manufacturing process of the remaining patterned circuit structures. . 5 2. If the circuit board structure according to item 45 of the scope of patent application, the electrical connection end can be used as a subsequent connection of the circuit board to the conductive element. 53. If the circuit board structure of item 45 of the scope of patent application, the electrical connection end can be used to receive conductive blind holes in the subsequent layer buildup structure, so that conductive blind holes can be formed on the plated through holes, In order to shorten the conductive path, increase the space for wiring, and increase the flexibility of wiring layout. 17658 懋 .ptc Page 35