TW583759B - Under bump metallurgy and flip chip - Google Patents

Under bump metallurgy and flip chip Download PDF

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Publication number
TW583759B
TW583759B TW092106131A TW92106131A TW583759B TW 583759 B TW583759 B TW 583759B TW 092106131 A TW092106131 A TW 092106131A TW 92106131 A TW92106131 A TW 92106131A TW 583759 B TW583759 B TW 583759B
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Taiwan
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layer
composition
barrier layer
titanium
scope
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TW092106131A
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TW200419748A (en
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Min-Lung Huang
Chi-Long Tsai
Chao-Fu Weng
Ching-Huei Su
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Advanced Semiconductor Eng
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Priority to TW092106131A priority Critical patent/TW583759B/zh
Priority to US10/708,664 priority patent/US20040183195A1/en
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Publication of TW583759B publication Critical patent/TW583759B/zh
Publication of TW200419748A publication Critical patent/TW200419748A/zh

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

583759
【發明所屬之技術領域】 本發明是有關 u + , 1 種球底金屬層（Under Bump Μ二lurgy，UBM )及覆晶晶片（FHpChip，F/c )結 之接人ί 是有關於1能有效改善晶片之銲墊與凸塊間 έ士槐〇 的球底金屬層及應用此球底金屬層之覆晶晶片 【先前技術】 在间，貧訊化社會的今日，多媒體應用的市場不斷地 :、、、擴張著。積體電路封裝技術亦需配合電子裝置的數位 網路化、區域連接化以及使用人性化 J成上述的要必須強化電子元件的高速處理化、多： 月:化積集化、小型輕量化及低價化等多方面的要求，於 是積體電路封裝技術也跟著朝向微型化、高密度化發展。、 八中球格陣列式構裝（Ba 1 1 Gr i d Array，BGA )、晶片 尺寸構M Chip-Scale Package，CSP )、覆晶晶片構裝（ FI ip Chip，F/C )以及多晶片模組（Mul ti—Chip Module ’ MCM )等高密度積體電路封裝技術也應運而生。 •承上所述’覆晶晶片構裝（F / C )之覆晶接合技術（
Flip Chip Interconnect Technology )主要係將晶片（ die )之多個銲墊（pad )，利用面陣列（area array )的 排列方式’配置於晶片之主動表面（active surface ) 上，並在各個銲墊上分別依序形成球底金屬層（Under
Bump Metallurgy，UBM )及凸塊（bump )，例如銲料凸塊 (solder bump )，接著將晶片翻面（fHp)之後，再利用
583759 五、發明說明（2) 凸塊來連接至基板（substrate )或印刷電路板（pcB )之 表面的接點。值得注意的是，由於覆晶接合技術係可適用 於高接腳數（High Pin Count )之晶片封裝結構，並具有 縮小封裝面積及縮短訊號傳輸路徑等優點，使得覆晶接合 技術已被廣泛地應用在晶片封裝結構，且特別是高腳位之 晶片封裝結構。 第1圖繪示為習知一種覆晶晶片結構的剖面示意圖。 請參閱第1圖所示，覆晶晶片結構丨0 〇係由一晶片j j 〇、〆 球底金屬層120及多個凸塊13〇(圖中僅繪示其一）所構成。 其中’晶片110具有一主動表面112、一保護層114( 9 passivation )及多個銲墊116(圖中僅繪示其一）。上述之 主動表面112係泛指晶片11〇之具有主動元件（active device )的一面’而保護層114及銲墊116均配置於此主動 表面11 2上，且保護層11 4係暴露出銲墊丨丨6。此外，球底 金屬層1 2 0係配置於銲墊11 6與凸塊丨3 〇之間，用以作為銲 墊11 6及凸塊1 3 0之間的接合介面。值得注意的是，由於錫 或錫-錯合金具有較佳之焊接特性，所以，凸塊丨3 〇之材質 經常採用錫或錫-鉛合金。而錫—鉛合金中之鉛對於自然環 境的影響甚矩，故又有無鉛銲料（lead free solder)之誕 生，但是不論上述含鉛或無鉛之銲料其組成成分中皆包括 · 有錫金屬。 /青繼縯茶閱第1圖，習知之球底金屬層12〇主要包括一 黏著層（adhesion layer)122、一 阻障層（barrier layer) 124及一沾錫層（wetting Uyer)126。其中，黏著層122係
l〇545twf.ptd 第8頁 583759 五、發明說明（3) 用以增加銲墊1 1 6及阻障層1 2 4之間的接合強度，其材質例 如為鈦金屬。此外，阻障層1 2 4係用以阻障凸塊1 3 0之擴散 (diffusion)反應，其常用材質例如為鎳-釩合金。另外， 沾錫層126係用以增加球底金屬層丨20對於凸塊丨30之沾附 能力’其常用材質例如是銅金屬。故由上述可得知，習知 之球底金屬層一般採用鈦/鎳—釩合金/銅之三層結構。 值得注意的是，當上述之球底金屬層丨2 〇的沾錫層1 2 6 的組成成分為銅時，在南溫反應下，由於銅層會與凸塊 130中之錫以及快速度反應生成錫銅介金屬化合物 (Inter-Metallic Compound，IMC)，故錫可容易再擴散至 阻障層124 (即鎳-釩層）中，並與鎳-釩合金反應產生錫 鎳介金屬化合物，其為不連續塊狀結構，當黏著層為鋁 時，由於此錫鎳介金屬化合物與鋁層接合甚差，凸塊13〇 易於從此介面脫落。 【發明内容】 m因ί i ί發明的目的就是在提供一種球底金屬層，其 月匕減、、羡；丨金屬化合物之生長速产。 本"發"明的另'一目的科、I ν ± &右兮& I曰μ ,)就疋在楗供一種覆晶晶片結構，其 ΐϊ:: 墊與凸塊之間的接合能力。 声，i於改上述目的’本發明提出-種球底金屬 塊之組成成分中包括錫。間的接合能力，且此凸 黏著層、-阻障層以及一ί;明广，底金屬層主要係由- 著層配置於銲墊上，阻障声占？且障層所構成。其中，黏 阻障層配置於黏著層上，而沾附-阻 583759 五、發明說明（4) 障層則配置於阻障層及 成成分例如為鎳金屬。▲ θ 此沾附-阻障層之組 έ士 土於本發明之上述目的，本發明再提出一插霜曰曰η 釔構，此覆晶晶片結構主要係由—耠出-種覆曰曰曰曰片 及一凸塊所構成。1中，曰片、且二、一球底金屬層以 及多個銲，，保護層及這：銲矣-保護層 層、-阻；；：；：墊。球底金屬層主要係由-黏著 配置於銲η占附-阻障層所構成。其中，黏著層 則配置於阻障声及：：配置於黏著層上’而沾附-阻障層 分例如為鋅全▲。a:之間，且此沾附-阻障層之組成成 組成成分㈡。凸塊配置於沾附-阻障層上，且凸塊之 成分明：”人實施例所述’上述之黏著層之組成 鋁或銅等全屬。1中烏\金、鉻、亂化鈦、氮化钽、鉅、 分例如為：敍其:人當銲塾為，銲塾，黏著層之組成成 等金屬A r執’、σ金、鉻、乳化鈦、氮化鉅、鈕或鋁 欽、鈦-鶴合：終為鋼二墊/二層广組成成分例如為 此外， 、、σ、虱化鈦、亂化鈕、鈕或銅等金屬。 t返阻障層之組成成分例如是鎳—釩合金。 可配ΐ’χ本f明的較佳實施例所述’沾附''阻障層上例如 几虱化層，而此抗氧化層之組成成分例如為4 塊中之：：因選用鎳金屬層與含錫凸塊接合，肖以減緩Λ 錫的擴散反應，以降低介金屬化合物生長、、、凸 4間地維持凸塊與銲墊之間的接合強度，進而二一故 ^致高覆 583759
晶晶片結構的使用壽命。 為讓本發明$ μ、+、 m e ^ 上述和其他目的、特徵、和優點能更明 ,^ 乂符舉一較佳實施例，並配合所附圖式，作詳 【實施方式】 第2圖緣示依照本發明一較佳實施例之覆晶晶片結構 面示意圖。請參閱第2圖，覆晶晶片結構2〇〇主要係由 曰曰片210、一球底金屬層22〇及多個凸塊23〇(圖中僅繪示 其一）所構成。其中，晶片21〇具有一主動表面212、一保 護層2 1 4及多個銲墊2 1 6 (圖中僅繪示其一）。上述晶片2 J 〇 之主動表面2 1 2係泛指晶片2 1 0之具有主動元件的一面，而 保護層214及銲墊216均配置於此主動表面212上，且保護 層214係暴露出銲墊216。值得注意的是，晶片21〇之組成 成分可包括矽、鍺、矽鍺、鎵砷、鎵磷、銦砷、銦磷等半 導體材料，而保護層2 1 4之組成成分可包括無機化合物， 例如為氧化矽（silicon oxide)、氮化矽（siiic〇n nitride)、磷矽玻璃（phospho si licate giass，pSG)等。
當然’保護層2 1 4亦可以是由上述之無機化合物材質所交 互疊合而成之複合層。此外’銲墊216例如為鋁銲墊、銅 銲塾或紹-銅合金銲蟄等。另外’球底金屬層22〇係配置於 銲塾216與鮮料凸塊230之間’用以作為銲墊gig及凸塊230 之間的接合介面。 A 承上所述’凸塊230之材質可例如是锡或錫—鉛合金 當然’凸塊2 3 0之材負亦可為無錯材質，例如是錫—銅合
錫 本 金銀合錫全銻錫’合金、錫-銦合金、錫-鋅合金 金、錫^ /ί—銀合金、錫U合金、錫-叙-鋅合 ;明：是：=或錫—銀—銅合金等。值得注意的是 22〇 - 二* ^、、友，丨孟屬化合物之生長速度。 黏 著戶參閱尸圖所示，球底金屬層220主要係由-b曰· ’ 一阻障層224及一沾錫—阻障層（wetting- 卜1maye〇 226所構成。黏著層222配置於銲墊216 ί化ί，222之組成成分可包括鈦、鈦-鎢合金、鉻、 人而成之？ ί鈕、鈕、鋁、銅或甚至可以由上述材料所組 之& # Α ^ 口層。其中，當銲墊21 6為鋁銲墊，黏著層222 、、，=則例如是鈦、鈦一鎢合金、鉻、氮化鈦、氮化 ^而當銲墊216為銅銲墊，黏著層222之組成成 二| σ=鈦、鈦—鎢合金、鉻、氮化鈦、氮化鈕、鈕或 ^黏著層222之主要作用乃是提供球底金屬層22〇與銲墊 2曰16間具有較佳的接合性，其可利用濺鍍（叩^^^叫）或 疋電鍍/f無電電鍍的方式形成於晶片21〇之銲墊上。 、、阻障層2 2 4係配置於黏著層2 2 2上，且阻障層2 2 4之組 成成分例如是鎳—釩合金。此外，阻障層224亦可利用濺鲈 或是電錢/無電電鍍的方式形成於黏著層222上。 又 沾錫-阻障層226係配置於阻障層224與凸塊23 0之間， 其主=作用係在於提供球底金屬層22〇與凸塊23〇之間較佳 的接合性，而沾錫—阻障層226之組成成分包括鎳，並同樣 可利用濺鍍或是電鍍/無電電鍍的方式，將沾錫—阻障層 583759
226形成於阻障層224上。 故仗上可得知，本發明 錄-叙合金/鎳、鈦—鎢合金/ /鎳、氮化鈦/鎳—鈒合金/鎳 鎳一釩合金/鎳、鋁/鎳-釩合 層結構。 σ 之球底金屬層2 2 0可例如為鈦/ 鎳-釩合金/鎳、鉻/鎳-釩合金 、氮化鈕/鎳-釩合金/鎳、鈕/ 金/鎳、銅/錄-飢合金/鎳的三
布八'=參閱第2圖所示，由於沾錫-阻障層226之組成 ^刀巴括鎳（即知用—鎳層），其與凸塊23〇中之錫反應 慢，除能保持球底金屬層22〇對於凸塊23〇之間的沾附“效果 外，並能有效減緩凸塊230中之錫的擴散現象，換言之， 沾錫-阻障層226即兼具了沾附及阻障之雙重效果。藉此， 可提咼凸塊230與銲墊216之間的接合強度，進而提高覆晶 晶片2 0 0結構的使用壽命。
第3圖為本發明之另一較佳實施例之覆晶晶片結構的 剖面示意圖。請參閱第3圖所示，其中此覆晶晶片結構2〇〇 中之晶片2 1 0與凸塊2 3 0皆與第2圖相同，已詳細說明於上 文，故在此即不再多作贅述，而其不同處為球底金屬層 2 2 0增加配置抗氧化層2 2 6 ’係配置於沾錫—阻障層2 2 6 上，其組成成分例如為金，藉由此抗氧化層226與外界隔 絕，係可避免球底金屬層220在與凸塊230焊接之前，球底 金屬層220之沾錫—阻障層226上產生一原生氧化層（native ox i de )，而需要額外增加一道去除此氧化層之步驟，故可 縮短覆晶晶片在凸塊製程進行時所耗費的時間。 綜上所述，本發明之球底金屬層及覆晶晶片結構，至
10545twf.ptd 第 13 頁 583759 五、發明說明（8) 少具有下列優點 1 ·由於本發 之錫反應慢，除 有效減緩介金屬 2 ·由於本發 可避免球底金屬 一道去除原生氧 的時間。 雖然本發明 以限定本發明， 神和範圍内，當 #範圍當視後附 明之沾錫-阻障層採用鎳層，其與凸塊中 能保持對於凸塊之間的沾附效果外，# & 化合物之生長速度，且兼具阻障的效果。 明之沾錫-阻障層上配置有一抗氧化層， 層上產生原生氧化層，故不需要額外9增加 化層之步驟，可進一步縮短覆晶晶片&程 已以車又佳實施例揭露如上，麸1 f 可作些許,在不脫離本發明之精 β 更動與潤飾，因此本發明之徂 之甲睛專利龁网ή匕田〜 卞奴1 <保 〜乾圍所界定者為準。
583759 圖式簡單說明 第1圖為習知一種覆晶晶片結構的剖面示意圖； 第2圖為本發明之較佳實施例之覆晶晶片結構的剖面 不意圖，以及 第3圖為本發明之另一較佳實施例之覆晶晶片結構的 剖面示意圖。 【圖式標示說明】 100 110 112 114 116 120 122 124 126 130 200 210 212 214 216 220 222 224 覆晶晶片結構 晶片 主動表面 保護層 銲墊 球底金屬層 黏著層 阻障層 沾錫層 2 3 0 :凸塊 2 2 6 :沾錫-阻障層 2 2 8 :抗氧化層
10545twf.ptd 第15頁

Claims (1)

  1. 583759 六、申請專利範圍 塊之間 底金屬 该沾附 2. 黏著層 化纽、 3. 該銲墊 合金、 4. 該鲜塾 合金、 5. 阻障層 6. 一抗氧 之間。 7. 技*氧化 種球底金屬層，適於改善一晶片之一銲墊及一凸 的接合能力，其中該凸塊之組成成分包括錫，該球 層包括： 黏著層，配置於該銲墊上； 阻障層，配置於該黏著層上；以及 沾附〜阻障層，配置於該阻障層及該凸塊之間，且 —阻障層之組成成分包括鎳。 如申請專利範圍第1項所述之球底金屬層，其中該 之組成成分包括鈦、鈦-鶴合金、鉻、氮化鈦、氮 叙、銘及銅其中之一。 如申睛專利範圍第1項所述之球底金屬層，其中該 為紹銲墊，且該黏著層之組成成分包括鈦、鈦—鎢 鉻、氮化鈦、氮化鈕、钽及鋁其中之一。 如申請專利範圍第1項所述之球底金屬層，其中該 為銅銲墊，且該黏著層之組成成分包括鈦、鈦一鎢 鉻、氮化鈦、氮化钽、钽及銅其中之一。 如申請專利範圍第1項所述之球底金屬層，其中該 之組成成分包括鎳〜釩合金。 如申請專利範圍第1項所述之球底金屬層，更包括 化層’该抗氧化層配置於該沾附-阻障層及該凸塊 如申請專利範圍第6項所述之球底金屬層，其中該 層之組成成分包括金。 一種覆晶晶片結構，包栝：
    1〇545tWf.ptd 第16頁 583759 六、申請專利範圍 一晶片，具有一主動表面、一保護層及複數個銲墊， 其中該保護層及該些銲墊配置於該主動表面上，且該保護 層係暴露出該些銲墊； 一球底金屬層，包括： 一黏著層，配置於該些銲塾上； 一阻障層，配置於該黏著層上； 一沾附-阻障層，配置於該阻障層上，且該沾附-阻 障層之組成成分包括鎳；以及 一凸塊，配置於該沾附-p且障層上，且該凸塊之組成 成分包括錫。 9 ·如申請專利範圍第8項所述之覆晶晶片結構’其中 該黏著層之組成成分包括鈦、鈦-鎢合金、鉻、氮化鈦、 氮化纽、趣、鋁及銅其中之一。 I 〇 ·如申請專利範圍第8項所述之覆晶晶片結構’其中 w亥&塾為紹鲜塾，且該黏著層之、组成成分包括欽、欽-鶴 合金、鉻、氮化鈦、氮化鈕、钽及鋁其中之一。 II ·如申請專利範圍第8項所述之覆晶晶片結構，其中 该銲墊為銅銲墊，且該黏著声之組成成分包括鈦、鈦-鎢 合金、鉻、氮化鈦、氮i匕鈕、曰鋥及銅其中之一。 ^ 12 ·如申請專利範圍第8項所述之覆晶晶片結構，其中 X阻障層之組成成分包括鎳—釩合金。 13·如申請專利範圍第8項所述之覆晶晶片結構，更包 括一抗氧化層，該抗氧化声配置於該沾附-阻障層及該凸 塊之間。 曰
    583759 六、申請專利範圍 1 4.如申請專利範圍第1 3項所述之覆晶晶片結構，其 中該抗氧化層之組成成分包括金。 ΒΪ 10545twf.ptd 第18頁
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JP4327656B2 (ja) * 2004-05-20 2009-09-09 Ｎｅｃエレクトロニクス株式会社 半導体装置
TWI278946B (en) * 2004-07-23 2007-04-11 Advanced Semiconductor Eng Structure and formation method for conductive bump
CN100428414C (zh) * 2005-04-15 2008-10-22 中芯国际集成电路制造(上海)有限公司 形成低应力多层金属化结构和无铅焊料端电极的方法
WO2007008171A2 (en) * 2005-07-09 2007-01-18 Gautham Viswanadam Integrated circuit device and method of manufacturing thereof
US7323780B2 (en) * 2005-11-10 2008-01-29 International Business Machines Corporation Electrical interconnection structure formation
US20080251916A1 (en) * 2007-04-12 2008-10-16 Taiwan Semiconductor Manufacturing Company, Ltd. UBM structure for strengthening solder bumps
CN101565160A (zh) * 2008-04-21 2009-10-28 鸿富锦精密工业（深圳）有限公司 微机电系统及其封装方法
CN117202767A (zh) * 2015-12-15 2023-12-08 谷歌有限责任公司 超导凸起接合件

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5234153A (en) * 1992-08-28 1993-08-10 At&T Bell Laboratories Permanent metallic bonding method
US6076723A (en) * 1998-08-19 2000-06-20 Hewlett-Packard Company Metal jet deposition system
FR2799337B1 (fr) * 1999-10-05 2002-01-11 St Microelectronics Sa Procede de realisation de connexions electriques sur la surface d'un boitier semi-conducteur a gouttes de connexion electrique
FR2799578B1 (fr) * 1999-10-08 2003-07-18 St Microelectronics Sa Procede de realisation de connexions electriques sur un boitier semi-conducteur et boitier semi-conducteur
TW449813B (en) * 2000-10-13 2001-08-11 Advanced Semiconductor Eng Semiconductor device with bump electrode
US20020086520A1 (en) * 2001-01-02 2002-07-04 Advanced Semiconductor Engineering Inc. Semiconductor device having bump electrode
US6818545B2 (en) * 2001-03-05 2004-11-16 Megic Corporation Low fabrication cost, fine pitch and high reliability solder bump
JP2003031576A (ja) * 2001-07-17 2003-01-31 Nec Corp 半導体素子及びその製造方法
TW526337B (en) * 2001-11-16 2003-04-01 Advanced Semiconductor Eng Device for testing the electrical characteristics of chip
TW521406B (en) * 2002-01-07 2003-02-21 Advanced Semiconductor Eng Method for forming bump
TW530402B (en) * 2002-03-01 2003-05-01 Advanced Semiconductor Eng Bump process
TW558821B (en) * 2002-05-29 2003-10-21 Via Tech Inc Under bump buffer metallurgy structure

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