TW566069B - Method of fabricating multi-layer printed circuit board - Google Patents

Method of fabricating multi-layer printed circuit board Download PDF

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Publication number
TW566069B
TW566069B TW92107794A TW92107794A TW566069B TW 566069 B TW566069 B TW 566069B TW 92107794 A TW92107794 A TW 92107794A TW 92107794 A TW92107794 A TW 92107794A TW 566069 B TW566069 B TW 566069B
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Taiwan
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layer
conductive
hole
blind
multilayer board
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TW92107794A
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Chinese (zh)
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TW200421959A (en
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Kuen-Yau He
Moriss Kung
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Via Tech Inc
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Abstract

A method of fabricating a build-up multi-layer board includes providing a multi-layer board on which has at least a conductive layer and a conductive through hole. A photo resist layer is formed on the conductive layer, which has the pattern of a circuit and blind via pad. A conductive material, such as solder, is printed on the conductive layer and is then treated by reflowing, so as to be positioned on the blind via pad for electrical conductivity. The self-alignment of the conductive material applied on the fabrication of conductive blind via simplifies the process of a build-up multi-layer board. Next, the pattern of circuit is formed with the photo resist layer and the conductive blind via as an etching mask. Then an out-layer circuit is formed after the removal of the photo resist layer and the formation of an insulative layer.

Description

566069 五、發明說明(1) 一、【發明所屬之技術領域】 本發明係有關於一種製作多層電路板的方法,其特別 是關於一種製作增層式多層板的方式,利用導電材料自行 對準的性質製作盲孔。 二、【先 印刷 糸統產品 平台,是 為單面板 型、輕量 及電子封 展,因此 合多層化 式多層板 Density 前技術】 電路板(Printed Circuit Board, PCB)向有電子 之母之稱,嵌載各式電子零組件,提供中繼傳輸 所有電子產品的必備零組件。印刷電路板可略分 、雙面板及多層板,由於近年來電子產品走向小 、薄型、高速、高機能、高密度、低成本化,以 裝技術亦朝向高腳數、精緻化(f i ne )與集積化發 印刷電路板亦走向高密度佈線、細線小孔化、複 、薄板化發展。在層數上最主要應用技術為增層 技術(b u i 1 d u p )及高密度互連技術(H i g h Interconnection, HDI)°566069 V. Description of the invention (1) 1. [Technical field to which the invention belongs] The present invention relates to a method for manufacturing a multilayer circuit board, and more particularly, to a method for manufacturing a multi-layer multilayer board, which is self-aligned by using a conductive material Nature makes blind holes. 2. [The first printed system product platform is a single-panel, lightweight, and electronic seal exhibition, so it is a multi-layer multi-layer Density front technology.] The printed circuit board (PCB) is known as the mother of electronics. Embedded electronic components, providing the necessary components for relay transmission of all electronic products. Printed circuit boards can be slightly divided, double-sided and multi-layered. Due to the recent trend of electronic products to be small, thin, high-speed, high-performance, high-density, and low-cost, the mounting technology is also geared towards high pin count and refinement (fi ne). And the integrated printed circuit board is also moving toward high-density wiring, fine-line pinholes, complex, and thin plates. The main application technologies in terms of the number of layers are layer-up technology (b u i 1 d u p) and high-density interconnect technology (H i g h Interconnection, HDI) °

所謂增層法,係在傳統壓合之多層板外面,再以背膠 銅箔(R C C )或銅箔加膠片增層,其與内在線路板的互連係 採Mi crovi a微盲孔之途徑。第一 A至第一 E圖為傳統製作增 層式多層板的剖面示意圖。如第一 A圖所示,提供一多層 板,包含一介電層1 2 6介於兩銅箔板1 2 4之間。利用適當的 方式,例如機械鑽孔方式,製作若干貫穿多層板的通孔 1 2 3。之後,於通孔1 2 3中鍍上孔銅1 2 1。接著,參照第一 BThe so-called build-up method is based on the conventional laminated multi-layer board, and then the layer is laminated with adhesive-backed copper foil (RCC) or copper foil and film. The interconnection with the internal circuit board is Mi crovi a micro-blind hole. The first A to E are schematic cross-sectional views of a conventional multi-layer multilayer board. As shown in FIG. 1A, a multilayer board is provided, which includes a dielectric layer 1 2 6 between two copper foil boards 1 2 4. Using appropriate methods, such as mechanical drilling, a number of through holes 1 2 3 are made through the multilayer board. After that, hole copper 1 2 1 is plated in the through holes 1 2 3. Then, refer to the first B

566069 五、發明說明(2) 圖,在本發明中,以樹脂塞孑L ( r e s i η p 1 u g g i n g )的方式, 填滿通孔 123(pass through hole,PTH),再鍍上面銅 125 。之後,先於面銅1 2 5上形成光阻層,將具有内層線路的 圖案移轉至光阻層上,蝕刻面銅1 2 5與銅箔板1 2 4後,剝除 光阻層,殘留的面銅1 2 5與銅箔板1 2 4即構成内層線路,如 第一 C圖所示。接著,參照第一 D圖,先形成介電層1 2 7, 覆蓋整個多層板上。然後,利用適當的方式,例如雷射鑽 孔方式,先於多層板的上表面、於通孔1 2 3上方及下方形 成盲孑L 128(blind via)。再者,如第一 E圖所示,以電鍍 導電層覆蓋於多層板上與填滿盲孔1 2 8中。最後,對於導 電層進行圖案移轉與蝕刻,以形成線路1 3 0與導電盲孔1 2 9 。雷增製需板亦 處用本濕亦層, 之利成等通多差 進需程銅導層誤 改孔製化的增位 待盲得鍍孔統對 干統使電盲傳之。 若傳,以與,孔制 在此貴需孔者鑽限 存因昂,通再射干 術,備通,。雷若 技素設導冗性供的 板因孔的繁雜以上 層等鑽孔驟複間度 多度射盲步的空密 式精雷或的上的線 層孔,孔程程外佈 增鑽作通製製額及 統械製統濕加留上 傳機式傳,增預計 ,量方,作,需設 而考的次製作墊路 然,孔其式製孔電 先鑽。方開盲成 首射加程分之造 三、【發明内容】 對於上述,欲簡化增層式多層板製程上的複雜性,本 ίΐ566069 V. Description of the invention (2) In the present invention, a through-hole 123 (pass through hole (PTH)) is filled with a resin plug 孑 L (r s i η p 1 u g g i n g), and then copper 125 is plated thereon. After that, a photoresist layer is formed on the surface copper 1 25, and the pattern with the inner layer circuit is transferred to the photoresist layer. After the surface copper 1 2 5 and the copper foil plate 1 2 4 are etched, the photoresist layer is stripped. The remaining surface copper 1 2 5 and the copper foil plate 1 2 4 constitute the inner layer circuit, as shown in the first C diagram. Next, referring to the first D diagram, a dielectric layer 1 2 7 is first formed to cover the entire multilayer board. Then, using a suitable method, such as a laser drilling method, a blind hole L 128 (blind via) is formed before the upper surface of the multilayer board, above the through hole 1 2 3 and the lower square. Furthermore, as shown in the first E diagram, the multilayer conductive board is covered with a plated conductive layer and the blind holes 1 2 8 are filled. Finally, the conductive layer is pattern-transferred and etched to form lines 130 and conductive blind holes 129. Lei Zeng needs the board to use the same wet layer. The benefit is equal to the difference. The copper guide layer of the process is wrong. The hole system is changed. The blind hole plating system will be blindly transmitted to the trunk system. If it is passed, then, and the hole system, where you need to drill the hole, you need to save the cause, and then shoot the dry technique to prepare for the pass. Lei Ruoji has provided redundant guides due to the complexity of holes in the upper layer and other drilling holes. The air-tight fine mines with multiple steps and blind shots or multiple layers of blind holes on the upper layer are drilled outside the hole. For the system-based system and the mechanical system, the system is designed to be used for wet-adding and uploading to the machine. It is expected to increase the quantity, work volume, and production time. Fang Kai blindly made the first shot plus range. [Abstract] For the above, to simplify the complexity of the multilayer build-up process, this text

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第6頁 566069 五、發明說明(3) 發明提供一種製作增層式多層板的方法,係以光阻直接形 成盲孔圖案,取代傳統的雷射鑽孔製程,節省盲孔製程的 成本。 對於簡化内層多層板製程,本發明提供一種製作增層 式多層板的方法,係以光阻直接形成盲孔圖案,利用進行 銲錫印刷與回銲的方式製作盲孔的導通。 對於簡化通孔或盲孔的導通,本發明提供一種製作多 層電路板的方法,係利用進行導電塞孔的方式製作通孔的 導通,利用進行銲錫印刷與回銲的方式製作盲孔的導通, 捨棄一般的濕製程導通製程,同時亦可節省盲孔與通孔所 佔之面積。 法 根 包 於其表 一線路 導電材 導電材 性導通 通盲孔 與盲孔 刻。再 據上述 含提供 面上。 與至少 料,例 料,使 之用。 ,簡化 的導電 接者去 ,本發明 一多層板 形成一光 一盲 如印 得導 利用 了一 材料 除光 孔墊 刷銲 電材 導電 般增 為钱 阻層 提供一種製作增層式多層 ,至少包含一導電通孔與 阻層於導電層上,其具有 (blind via pad)的圖案 < 錫於導電層上,再以回銲 料位於盲孔墊的位置,藉 材料的自行對準特性,直 層多層板的製程。之後, 刻阻障,進行導電層的線 、形成一絕緣層’以及於 板的方 一導電層 包含至少 形成一 方式處理 以作為電 接形成導 以光阻層 路圖案蝕 此絕緣層Page 6 566069 V. Description of the invention (3) The invention provides a method for making a multilayer multilayer board, which directly forms a blind hole pattern with a photoresist, instead of the traditional laser drilling process, and saves the cost of the blind hole process. For simplifying the manufacturing process of the inner multi-layer board, the present invention provides a method for manufacturing a multi-layer multi-layer board, which directly forms a blind hole pattern by using a photoresist and uses a method of solder printing and reflow to make the conduction of the blind hole. For simplifying the conduction of through-holes or blind vias, the present invention provides a method for manufacturing a multilayer circuit board. The method is to conduct the conduction of vias by conducting conductive plug holes, and to make the conduction of blind vias by solder printing and reflow. Abandon the general wet process and turn-on process, and also save the area occupied by blind holes and through holes. The method root covers the surface of a line. Conductive material Conductive material Conductive blind hole and blind hole engraving. According to the above, the surface is provided. With at least the materials, examples, use it. In order to simplify the conductive connection, a multilayer board of the present invention forms a light and a blind layer. As printed, a material is used to remove the light, a hole pad, and a brushed electrical material are conductive. It provides a layer of money for the resistance layer, at least including A conductive via and a barrier layer are formed on the conductive layer, and have a pattern of (blind via pad) < tin on the conductive layer, and then the solder is located at the position of the blind hole pad. Manufacturing of multilayer boards. After that, a barrier is etched, a conductive layer line is formed, an insulating layer is formed, and a conductive layer is formed on the side of the board. The conductive layer includes at least one process to be used as an electrical connection to form a conductive layer and a photoresist layer to etch the insulating layer.

566069 五、發明說明(4) 上形成圖案化之外層線路。 例大際 施放實。 實部在寸 明局,尺 發作外間 本例此空 述比。維 詳般知三 在一認的 ,依的度 下不定深 如會限及 述圖有度 描面為寬 細剖作、 詳的此度 圖板以長 1意路應含 式示電不包 方用層然應 施明多,, 實發示明中 ί本表說作 、 ,利製 四 時以的 本發明提供一種製作多層板的方法,應用於一印刷電 路板,包含提供兩導電層與一第一介電層,其中第一介電 層位於兩導電層之間。形成兩光阻層分別於兩導電層上, 此兩光阻層暴露出部分兩導電層。形成一導電材料於部分 被暴露之兩導電層上,再以回銲方式處理導電材料,使得 導電材料形成至少一導電盲孔(conductive blind via p o s t )於任一兩導電層上。 i 第二圖為本發明之製作增層式多層板的方法流程示意 圖。參照第二圖,本發明提供一多層板(步驟1 0 )。在一實 施例中,多層板包含一介電層介於兩銅箔板中。接著,藉 由適當的方式,例如機械鑽孔,於多層板上鑽出貫洞 (through hole)(步驟12)。之後,進行貫洞的導通與兩銅 箔板的鍍銅製程(步驟1 4)。於本發明中,利用導電材料塞 孔(p 1 u g g i n g )方式塞滿貫洞,取代原有濕製程鍍孔銅,簡 化貫洞的導通製程。566069 V. Description of the invention (4) A patterned outer layer circuit is formed. Case big occasions. The real part is in the inch and the round, and the ruler is outside. The detailed knowledge of the three is recognized, depending on the degree of indeterminate depth, such as the limit, and the picture has a degree and the description is wide and finely cut. The detailed chart is shown with a length of 1 and the road should be included. The side-use layer should be applied in a clear manner, and the present invention is described in the following. The invention described in the present invention is a method for making a multilayer board, which is applied to a printed circuit board and includes two conductive layers. And a first dielectric layer, wherein the first dielectric layer is located between two conductive layers. Two photoresist layers are formed on the two conductive layers respectively, and the two photoresist layers expose a part of the two conductive layers. A conductive material is formed on the partially exposed two conductive layers, and then the conductive material is processed by reflow, so that the conductive material forms at least one conductive blind via (pos t) on any two conductive layers. i The second diagram is a schematic flow chart of a method for manufacturing an increased multilayer board according to the present invention. Referring to the second figure, the present invention provides a multilayer board (step 10). In one embodiment, the multilayer board includes a dielectric layer between two copper foil boards. Next, a through hole is drilled in the multilayer board by a suitable method, such as mechanical drilling (step 12). After that, the through-hole conduction and the copper plating process of the two copper foil plates are performed (step 14). In the present invention, the through hole is plugged by using a conductive material plug hole (p 1 u g g i n g) to replace the original wet process copper plating, which simplifies the conduction process of the through hole.

第8頁 566069 五、發明說明(5) 接著,本發明方 圖案以製作盲孔及線 適當的方式,分別於 路與盲孔墊的圖案移 作為直接形成盲孔。 印刷· 導電材料’並 驟1 8 )。在本發明中, 案的位置上印刷導電 屬或合金,在一實施 者,本發明的特徵之 (self-al ignment)的 盲孔位置,彌補印刷 接形成盲孔的導通, 及具有自行對準的導 完成導通盲孔,不需 法,利用光阻直接形成盲孔墊與線路 路(步驟1 6)。在一實施例中,以任何 兩銅箔板上形成光阻層,再將具有線 轉至光阻層上,如此的光阻圖案便可 接下來,在具有盲孔圖案的光阻層上 進行此導電材料的回銲(r e f 1 〇 w )(步 利用選擇性印刷的方式,於盲孔圖 材料,此導電材料可以為一低熔點金 例中,導電材料為銲錫(solder)。再 一,在於利用導電材料具有自行對準 特性,於回銲時,導電材料可流回至 時精度的問題。經由此一步驟,可直 因此本發明的特徵之一,在於以光阻 電材料之設計,經過印刷與回銲,即 經過傳統雷射鑽孔及濕製程導通製程 之後,以適當的方式,例如蝕刻方式,處理兩銅箔板 以蝕刻出兩銅箔板上的線路圖案(步驟2 0 ),並剝除光阻。 再利用適當的方式,於多層板上形成絕緣層與外層導電層 ,並於外層導電層做出外層線路(步驟2 2 )。 第三A至第三E圖為根據本發明之製作增層式多層板的Page 8 566069 V. Description of the invention (5) Next, the inventor's pattern is used to make blind holes and lines in an appropriate manner, and the pattern of the road and the blind hole pad are respectively moved to directly form the blind holes. Print and Conductive Materials' and step 18). In the present invention, a conductive metal or alloy is printed on the position of the case. In an implementer, the position of the blind hole of the self-al ignment of the present invention compensates for the conduction of the blind hole formed by the printing connection and has self-alignment. The blind hole is completely turned on, and there is no need to use the photoresist to directly form the blind hole pad and the circuit (step 16). In one embodiment, a photoresist layer is formed on any two copper foil plates, and then the wires are transferred to the photoresist layer. Such a photoresist pattern can then be performed on the photoresist layer with a blind hole pattern. The reflow soldering of this conductive material (ref 1 〇w) (in the step of selective printing, the blind hole pattern material, the conductive material can be a low melting point gold, the conductive material is solder.) The problem lies in the use of conductive materials with self-alignment characteristics. When reflowing, the conductive materials can flow back to the accuracy problem. Through this step, one of the characteristics of the present invention lies in the design of photoresistive electrical materials. After printing and re-soldering, that is, after the traditional laser drilling and wet process conduction processes, the two copper foil plates are processed in an appropriate manner, such as etching, to etch out the circuit patterns on the two copper foil plates (step 20) Then, the photoresist is removed. Then, an appropriate method is used to form an insulating layer and an outer conductive layer on the multilayer board, and an outer layer circuit is formed on the outer conductive layer (step 2 2). Production of the invention Layered multilayer

第π頁 566069 五、發明說明(6) 剖面示意圖。參照第三A圖,提供一多層板,包含一介電 層2 6介於兩銅箔板2 8之間,與若干貫穿多層板的通孔2 3。 在本發明中,多層板可作為多層電路板的内層之用,但不 限於此應用,而利用適當的方式,例如機械鑽孔方式,製 * 作通孔2 3。接著,參照第三B圖,在本發明中,以導電材 料塞孔的方式,取代傳統濕製程方式,使得通孔2 3因導電 塞孔而具有電性導通的導電通孔2 3。本發明的特徵之一, 在於利用導電材料塞孔,簡化製作導電通孔的製程。要注 意的是,只要適合作為印刷電路板的導電材料,皆不脫本 發明應用範圍。之後,利用一般鍍銅方式,於兩銅箔板2 8 ^ 上鍍上一層化銅2 4以作為後續之用。 參照第三C圖,於化銅2 4上先形成一光阻層3 2,再將 具有線路3 1與盲孔墊3 0之圖案移轉至光阻層3 2上。在本發 明中’通孔2 3已經由導電材料塞滿’並有化銅2 4於其上, 可提供位置設計盲孔。因此,本發明的盲孔與通孔2 3可以 重疊,位於上下關係的位置,如此節省盲孔與通孔2 3所佔 用的面積,增進電路設計的彈性。本發明的特徵之一,在 於利用具有線路與盲孔墊圖案的光阻層以暴露出盲孔墊, 而不需購置昂貴的雷射鑽孔機台。 · 參照第三D圖,將導電材料,以選擇性印刷的方式先 塗佈於光阻層3 2上之盲孔墊3 0的位置,再利用回銲 (r e f 1 〇 w)的方式,使導電材料自行對準於盲孔墊3 0的位置Π 566069 V. Description of the invention (6) A schematic cross-sectional view. Referring to FIG. 3A, a multilayer board is provided, which includes a dielectric layer 26 between two copper foil boards 28, and a plurality of through holes 23 penetrating through the multilayer board. In the present invention, the multilayer board can be used as the inner layer of the multilayer circuit board, but it is not limited to this application, and a through hole 23 is made by a suitable method, such as a mechanical drilling method. Next, referring to FIG. 3B, in the present invention, the conductive wet material is used instead of the traditional wet process method, so that the through hole 23 has the conductive through hole 23 which is electrically conductive due to the conductive plug hole. One of the features of the present invention is that the conductive material is used to plug the hole to simplify the manufacturing process of the conductive through hole. It should be noted that, as long as it is suitable as a conductive material of a printed circuit board, it does not depart from the scope of application of the present invention. After that, a layer of copper 24 is plated on the two copper foil plates 2 8 ^ by a general copper plating method for subsequent use. Referring to FIG. 3C, a photoresist layer 32 is formed on the copper 24 first, and then the pattern having the lines 31 and the blind hole pad 30 is transferred to the photoresist layer 32. In the present invention, the 'through hole 23 has been filled with a conductive material' and a copper 24 is formed thereon, and a blind hole can be provided for position design. Therefore, the blind hole and the through hole 23 of the present invention can be overlapped and located in an up-and-down position. This saves the area occupied by the blind hole and the through hole 23 and improves the flexibility of circuit design. One of the features of the present invention is to use a photoresist layer having a pattern of lines and blind hole pads to expose the blind hole pads without the need to purchase an expensive laser drilling machine. · Referring to the third D diagram, the conductive material is selectively applied to the position of the blind hole pad 30 on the photoresist layer 32 by selective printing, and then the reflow (ref 1 〇w) method is used to make Conductive material aligns itself at the position of blind hole pad 30

第10頁 566069 五、發明說明(7) 。本發明的特徵之一,在於利用回銲時,導電材料熔成液 體,此液狀的導電材料之内聚力會使得導電材料聚集。再 者,盲孔墊3 0的材料,也就是暴露出的化銅2 4,對於導電 材料有拉力作用,使得其對位於盲孔位置。在本發明中, 導電材料可以是低熔點的金屬或是合金,例如銲錫 (s ο 1 d e r ),只要可應用於塞孔製程,皆屬於本發明應用範 圍。本發明的特徵之一,在於此導電材料於回銲時具有自 行對準的特性,即使選擇性印刷時的若干偏差,造成導電 材料殘留於光阻上時,可藉由回銲時對準於盲孔墊3 0的位 置,完成導電盲孔4 0。因此,本發明的特徵之一,在於利 用印刷與回銲導電材料,取代一般雷射鑽孔及濕製程製作 導電盲孔。此外,利用銲錫的特性,使得本發明之導電盲 孔的熱傳導亦較傳統盲孔佳。並且,因導電材料自行對準 之性質,盲孔墊所需面積較習知雷射鑽孔製程所需的盲孔 墊面積小,故可提高多層板内層線路之佈線密度。 接著,如第三E圖所示,以光阻層3 2及導電盲孔4 0為 遮罩,對於銅箔板2 8與化銅2 4進行線路的蝕刻,再移除光 阻層3 2,然後繼續於多層板上依序形成絕緣層3 4與導電層 ,然後於導電層上製作外層電路3 8。在本發明中,考慮到 導電盲孔4 0所造成的平坦度問題,可於絕緣層3 4形成後, 先進行一磨平(ρ ο 1 i s h i n g )步驟,再進行導電層的形成製 作。本發明的特徵之一,在於以導電材料自行對準形成導 電盲孔4 0,具有一向上突起的形狀,減少了導電盲孔4 0與Page 10 566069 V. Description of the Invention (7). One of the features of the present invention is that the conductive material is melted into a liquid when reflow is used, and the cohesive force of the liquid conductive material causes the conductive material to aggregate. Furthermore, the material of the blind hole pad 30, that is, the exposed copper 24, has a tensile effect on the conductive material, so that it is located at the position of the blind hole. In the present invention, the conductive material may be a metal or an alloy with a low melting point, such as solder (s ο 1 d e r), as long as it is applicable to the plugging process, it belongs to the application scope of the present invention. One of the features of the present invention is that the conductive material has self-alignment characteristics during reflow. Even if some deviations in selective printing cause the conductive material to remain on the photoresist, it can be aligned during reflow. The position of the blind hole pad 30 completes the conductive blind hole 40. Therefore, one of the features of the present invention is to make conductive blind holes by using printing and resoldering conductive materials instead of general laser drilling and wet processes. In addition, due to the characteristics of the solder, the thermal conduction of the conductive blind via of the present invention is also better than that of the conventional blind via. In addition, due to the self-aligning nature of the conductive material, the area required for the blind hole pad is smaller than that required for the conventional laser drilling process, so the wiring density of the inner layers of the multilayer board can be increased. Next, as shown in the third E diagram, with the photoresist layer 32 and the conductive blind hole 40 as a mask, the copper foil plate 28 and the copper copper layer 4 are etched, and then the photoresist layer 3 2 is removed. Then, the insulating layer 3 4 and the conductive layer are sequentially formed on the multilayer board, and then an outer layer circuit 38 is formed on the conductive layer. In the present invention, in consideration of the flatness problem caused by the conductive blind hole 40, after the insulating layer 34 is formed, a flattening (ρ ο 1 i s h i n g) step is performed first, and then the conductive layer is formed. One of the features of the present invention is that the conductive blind hole 40 is formed by self-alignment of the conductive material, and has a shape of an upward protrusion, which reduces the conductive blind hole 40 and

第11頁 566069 五、發明說明(8) 形成外層電路3 8之導電層的接觸面積。因此,導電盲孔4 0 上方最外層的導電墊面積的減少,有助於外層電路38或元 件的佈局密度提高。 綜上所述,本發明方法,利用導電材料塞孔,簡化製 作導電通孔的製程;利用具有線路與盲孔墊圖案的光阻層 形成盲孔墊,不需使用昂貴的雷射鑽孔機台;利用導電材 料於回銲時具有自行對準的特性,製作導電盲孔;利用導 電材料所形成的導電盲孔,具有較佳的熱傳導性與較小的 上接觸面積,可提高内層線路之佈線密度,與可減少上方 最外層導電墊面積。 以上所述之實施例僅係為說明本發明之技術思想及特 點,其目的在使熟習此項技藝之人士能夠瞭解本發明之内 容並據以實施,當不能以之限定本發明之專利範圍,即大 凡依本發明所揭示之精神所作之均等變化或修飾,仍應涵 蓋在本發明之專利範圍内。 ❿Page 11 566069 V. Description of the invention (8) The contact area of the conductive layer forming the outer layer circuit 38. Therefore, the reduction of the area of the outermost conductive pad above the conductive blind hole 40 contributes to the increase in the layout density of the outer circuit 38 or the component. In summary, the method of the present invention uses a conductive material to plug holes to simplify the manufacturing process of conductive vias; a photoresist layer with a pattern of lines and blind hole pads is used to form a blind hole pad, without using an expensive laser drilling machine Table; the use of conductive materials with self-alignment characteristics during reflow, making conductive blind holes; conductive blind holes formed using conductive materials, has better thermal conductivity and smaller upper contact area, which can improve the inner layer of the circuit The wiring density can reduce the area of the outermost conductive pad above. The above-mentioned embodiments are only for explaining the technical ideas and characteristics of the present invention. The purpose is to enable those skilled in the art to understand the contents of the present invention and implement them accordingly. When the scope of the patent of the present invention cannot be limited, That is, any equivalent changes or modifications made in accordance with the spirit disclosed in the present invention should still be covered by the patent scope of the present invention. ❿

一第12頁 566069First page 12 566069

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Claims (1)

該 含 圖 導。 於 包 的 一 孔 層 有 墊 第盲 電 具 孔 該通 導 層 盲 得導 一 阻 該使一 含 光 的 ,為 :包 該 ·,層 料作 含少 ,口阻 材以 包至 上開光 電, ,板 層案該 導置 法層 電圖於 一位 方多 導的料 第的 的該 該塾材 該塾 板, 於孔電 理孔 層板 層盲導處盲 多層 阻一一 式該 式多 光少第 方於 層一 一至一 銲位 增供 成與成及回對 作提;形路形·,以行 制衣}上}線}中}自 abed 種 {板{ 一 C 口彳料 一 層 少開材 1 多至案 電 566069 六、申請專利範圍 2.如申請專利範圍第1項之製作增層式多層板的方法,更 包含: 移除部分該導電層,藉以形成該線路,該移除步驟係 以該光阻層與該導通盲孔為一遮罩;及 移除該光阻層。 3.如申請專利範圍第1項之製作增層式多層板的方法,其 中該(a )步驟更包含: 移除部分該多層板以形成至少一通洞於該多層板中; 以一弟二導電材料基孔方式填滿該通洞以作為電性導 通之用;及 電鍍一第三導電材料於該通洞與該導電層上。 4.如申請專利範圍第3項之製作增層式多層板的方法,其The map guide. One hole layer of the package is provided with a blind blind electrical tool hole, and the through conductive layer is blind to guide and block a light-containing material, which is: package the material, the layer material is small, and the mouth resistance material is packaged to open the photoelectricity. The layer method of the guide method is based on the one-sided multi-conductor material of the slab and the screed board. The blind layer is blindly guided at the blind layer of the hole electrical layer, and the multi-light is blocked. The lesser party increases the supply and formation and back-to-back on the layer one to one welding position; the shape of the road is to make clothes} up} line} in the} from the abed species {板 {一 C 口 彳 料 一层Less open material 1 More than case electricity 566069 6. Application for patent scope 2. The method for making a multi-layer multilayer board such as the first scope of patent application, further includes: removing part of the conductive layer to form the circuit, the transfer The removing step uses the photoresist layer and the blind via as a mask; and removes the photoresist layer. 3. The method for manufacturing a multi-layer multilayer board according to item 1 of the patent application scope, wherein the step (a) further comprises: removing a part of the multilayer board to form at least one through hole in the multilayer board; The material hole fills the through hole for electrical conduction; and a third conductive material is plated on the through hole and the conductive layer. 4. The method for making a multi-layer multilayer board according to item 3 of the patent application scope, which 第15頁 566069 六、申請專利範圍 中該盲孔的位置於該通洞上方。 法 方 的 板 層 多 式 層 增 作 製 之 該。 成罩 形遮 以一 藉為 ,孔 層亡目 電通 導導 亥亥 =口=口 與與 料層 材阻 i電光 項 3導該 第三以 圍第係 範該驟 利分步 專部除 請除移 申移該 如含, 5包路 更 線 專 請)# C 中 C 如該 6 中 第 圍 範 利 以 含 包 馬 其 法。 方料 的材 板電 層導 多 一 式第 層該 增成 作形 製式 之方 項刷 r--*- 印 其 法 方 的 板 層 多 式 層 增 作 製 之項、一 ,—I 含 第包。 圍料料 範材材 利電屬 專導金 請一點 申第炼 如該低 7中或 料 材 金 合 點 熔 低 或 % 料 材 錫 銲 作 製 該 板 路 電 刷 印 - 於 用 應 法 方 的: 板含 層包 多法 作方 製的 種板 一 層 8 多 層 阻 光 兩 亥 =口 上 , 層 層 電 電 導 介 兩 一 該 第 於 一 別 與 分 砠 層 電;阻 導間光 兩之兩 供層成 提電形 )^ ) a b C 兩 c 該 於 位 層 電 介 1 第 亥 =口 層 電 導 兩 該 之 露 暴 被 分 ΚΓ Jet口 於 料 材 •, 電 層導 電 一 導第 兩一 該成 分形 部} C 出 C 露 暴 上 及 導上 一 層 第電 該導 得兩 使該 ? 一 料任 材於 電孔 導盲 一 電 第導 該一 理少 處至 式成 方形 銲位 回對 以行 自 d C料 材 電Page 15 566069 6. The position of the blind hole in the scope of patent application is above the through hole. The multi-layer layer addition system of the French side should. In the form of a cover, a hole is used, and the hole layer is dead, and the electrical conduction is conducted. Hai = mouth = mouth and the material layer resistance i electro-optical item 3 leads the third line. In addition to the application, you should include the 5 packages, please refer to the special line) # C 中 C As the 6th in the range, Fan Li uses the method of inclusion. The square material of the sheet and the electric layer is more conductive and the first layer is the form item of the formation system. R-*-The item of the plate multi-formation layer production system that prints its method. One, --I contains the first package. . The material of the material is a special guide for gold and electricity. Please apply at one point if the low 7 or the metal melting point of the material is low or the material is soldered to make the board brush.-For the application method : The board contains a layer of multi-layered seeding system. One layer of multi-layer light-blocking light is two holes. The layers of electrical conductivity are two by one and the other are separate from the bifurcated layer. Into electric form) ^) ab C two c the bit layer dielectric 1 第 = mouth layer conductance two dew exposure is divided ΚΓ Jet mouth on the material •, the electric layer conducts one to the second one of the component shape部} C 出 C Exposure to the upper layer and the upper layer of the first layer of electricity should be two to make the first one. Any material should be blinded in the hole. The first piece of electricity should be straightened to a square welding position. d C material electricity 第16頁 566069 六、申請專利範圍 9.如申請專利範圍第8項之製作多層板的方法,更包含: 移除部分該兩導電層與該第一介電層,藉以形成至少 一通洞於該兩導電層與該第一介電層中; 以一第二導電材料塞孔方式填滿該通貫洞以作為電性 導通之用;及 電鍍一第三導電材料於該通洞與該兩導電層上。 1 0 .如申請專利範圍第8項之製作多層板的方法,更包含: 移除部分該兩導電層,藉以形成一電路線路,該移除 步驟係以該光阻層與該導電盲孔為一遮罩;及 移除該光阻層。 1 1.如申請專利範圍第1 0項之製作多層板的方法,更包含 形成一第二介電層於該導電盲孔與該電路線路上。 1 2.如申請專利範圍第8項之製作多層板的方法,其中該兩 導電層包含兩銅箔層。 1 3.如申請專利範圍第8項之製作多層板的方法,其中該第 一導電材料包含一銲錫材料、或低熔點合金材料、或低熔 點金屬材料。 1 4.如申請專利範圍第8項之製作多層板的方法,其中該(cPage 16 566069 6. Application for Patent Scope 9. The method for making a multilayer board according to item 8 of the patent application scope further includes: removing part of the two conductive layers and the first dielectric layer to form at least one through hole in the Two conductive layers and the first dielectric layer; filling the through hole with a second conductive material for the purpose of electrical conduction; and plating a third conductive material between the through hole and the two conductive layers on. 10. The method for manufacturing a multilayer board according to item 8 of the scope of patent application, further comprising: removing a part of the two conductive layers to form a circuit line, and the removing step is based on the photoresist layer and the conductive blind hole as A mask; and removing the photoresist layer. 1 1. The method for manufacturing a multilayer board according to item 10 of the scope of patent application, further comprising forming a second dielectric layer on the conductive blind hole and the circuit line. 1 2. The method for manufacturing a multilayer board according to item 8 of the patent application, wherein the two conductive layers include two copper foil layers. 1 3. The method for manufacturing a multilayer board according to item 8 of the scope of patent application, wherein the first conductive material comprises a solder material, or a low melting point alloy material, or a low melting point metal material. 1 4. The method for making a multilayer board as claimed in item 8 of the patent application, wherein (c 第17頁 566069 六、申請專利範圍 )步驟包含以印刷方式形成該第一導電材料。 1 5. —種導通盲孔結構,位於一多層板中,該多層板具有 一多層板核心,該導通盲孔結構包含: 一底面,係連接於相對靠近該多層板核心之一第一導 電層上; 一頂面,係連接於相對遠離該多層板核心之一第二導 電層上;及 一外凸圓弧表面,係由於一盲孔材質之内聚力所造成 其中該底面與該第一導電層接觸的面積大於該頂面與 該第二導電層接觸的面積。 1 6 .如申請專利範圍第1 5項之導通盲孔結構,其中該盲孔 材質包含一銲錫材料。 1 7 .如申請專利範圍第1 5項之導通盲孔結構,其中該盲孔 材質包含一低熔點合金材料。 1 8 .如申請專利範圍第1 5項之導通盲孔結構,其中該盲孔 材質包含一低熔點金屬材料。Page 17 566069 6. Scope of Patent Application) The step includes forming the first conductive material by printing. 1 5. A blind via structure is located in a multilayer board, the multilayer board has a multilayer board core, and the blind via structure includes: a bottom surface, which is connected to a first one relatively close to the core of the multilayer board On the conductive layer; a top surface connected to a second conductive layer relatively far away from the core of the multilayer board; and a convex arc surface caused by the cohesion of a blind hole material in which the bottom surface and the first surface The area where the conductive layer contacts is larger than the area where the top surface contacts the second conductive layer. 16. The conductive blind hole structure according to item 15 of the scope of patent application, wherein the material of the blind hole includes a solder material. 17. The conductive blind via structure according to item 15 of the patent application scope, wherein the material of the blind via comprises a low melting point alloy material. 18. The conductive blind via structure according to item 15 of the patent application scope, wherein the material of the blind via comprises a low melting point metal material. 第18頁Page 18
TW92107794A 2003-04-04 2003-04-04 Method of fabricating multi-layer printed circuit board TW566069B (en)

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Publication number Priority date Publication date Assignee Title
TWI498067B (en) * 2012-04-27 2015-08-21 Zhen Ding Technology Co Ltd Multilayer circuit board and method for manufacturing same

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TWI578873B (en) * 2016-06-13 2017-04-11 健鼎科技股份有限公司 Manufacturing method of high-density multilayer board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI498067B (en) * 2012-04-27 2015-08-21 Zhen Ding Technology Co Ltd Multilayer circuit board and method for manufacturing same

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