TW200421959A - Method of fabricating multi-layer printed circuit board - Google Patents

Method of fabricating multi-layer printed circuit board Download PDF

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TW200421959A
TW200421959A TW92107794A TW92107794A TW200421959A TW 200421959 A TW200421959 A TW 200421959A TW 92107794 A TW92107794 A TW 92107794A TW 92107794 A TW92107794 A TW 92107794A TW 200421959 A TW200421959 A TW 200421959A
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Taiwan
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conductive
layer
multilayer board
patent application
hole
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TW92107794A
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Chinese (zh)
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TW566069B (en
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Kwun-Yao Ho
Moriss Kung
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Via Tech Inc
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Abstract

A method of fabricating a build-up multi-layer board includes providing a multi-layer board on which has at least a conductive layer and a conductive through hole. A photo resist layer is formed on the conductive layer, which has the pattern of a circuit and blind via pad. A conductive material, such as solder, is printed on the conductive layer and is then treated by reflowing, so as to be positioned on the blind via pad for electrical conductivity. The self-alignment of the conductive material applied on the fabrication of conductive blind via simplifies the process of a build-up multi-layer board. Next, the pattern of circuit is formed with the photo resist layer and the conductive blind via as an etching mask. Then an out-layer circuit is formed after the removal of the photo resist layer and the formation of an insulative layer.

Description

2Θ042192Θ04219

五、發明說明(1) 一、【發明所屬之技術領域】 本發明係有關於一種製作多層電路板的方法, 是關於一種製作增層式多層板的方式,利用導電材 對準的性質製作盲孔。 一、【先前技術】 印刷電路板(Printed Circuit Board, PCB)向 系統產品之母之稱,嵌載各式電子零組件,提供中 平台’是所有電子產品的必備零組件。印刷電路板 為單面板、雙面板及多層板,由於近年來電子產品 型、輕量、薄型、高速、高機能、高密度、低成本 及電子封裝技術亦朝向高腳數、精緻化(f i ne )與集 展,因此印刷電路板亦走向高密度佈線、細線小孔 合多層化、薄板化發展。在層數上最主要應用技術 式多層板技術(bui Id up)及高密度互連技術(High Density Interconnection, HDI)° 所謂增層法,係在傳統壓合之多層板外面,再 銅羯(RCC )或銅箔加膠片增層,其與内在線路板的^ 採Micro via微盲孔之途徑。第一 a至第一 e圖為傳統 層式多層板的剖面示意圖。如第一 A圖所示,提供一 板’包含一介電層1 2 6介於兩銅羯板1 2 4之間。利用 方式’例如機械鑽孔方式,製作若干貫穿多層板的 1 2 3。之後’於通孔1 2 3中鍍上孔銅1 2 1。接著,參只 其特別 料自行 有電子 繼傳輸 可略分 走向小 化,以 積化發 化、複 為增層V. Description of the invention (1) 1. [Technical field to which the invention belongs] The present invention relates to a method for manufacturing a multilayer circuit board, and relates to a method for manufacturing a multi-layered multilayer board. hole. I. [Previous Technology] The printed circuit board (PCB) is called the mother of the system product. It embeds various electronic components and provides a platform. It is a necessary component for all electronic products. Printed circuit boards are single-sided, double-sided, and multi-layered. Due to the recent electronic product type, light weight, thin, high speed, high performance, high density, low cost, and electronic packaging technology, they have also moved to high pin count and refined (fi ne ) And exhibitions, so printed circuit boards are also moving towards high-density wiring, thin lines, small holes, multi-layering, and thinning. In terms of the number of layers, the most commonly applied technologies are multi-layer board technology (bui Id up) and high-density interconnect technology (High Density Interconnection (HDI) °). The so-called build-up method is based on the traditional laminated multi-layer board, and copper ( RCC) or copper foil plus film to increase the layer, and its internal circuit board using the Micro via micro blind via. The first a to the first e are schematic cross-sectional views of a conventional multilayer multilayer board. As shown in FIG. 1A, a board is provided including a dielectric layer 1 2 6 between two copper cymbals 1 2 4. Using the method ', such as mechanical drilling, a number of 1 2 3 penetrating through the multilayer board are produced. After that, hole copper 1 2 1 is plated in the through holes 1 2 3. Then, the special materials have their own electronic relay transmission, which can be slightly divided to reduce, to accumulate and develop, and to add layers.

以背膠 L連係 製作增 _多層 適當的 通孑L ;、第一 BConnect with adhesive L to make multi-layer appropriate general L; First B

剔 4219Tick 4219

五、發明說明(2) 圖,在本發明中,以樹脂塞孔(r e s i η p 1 u g g i n g )的方,式, 填滿通孔 123(pass through hole,PTH),再鍵上面銅 125 。之後,先於面銅1 2 5上形成光阻層,將具有内層線路的 圖案移轉至光阻層上,蝕刻面銅1 2 5與銅箔板1 2 4後,剝除 光阻層,殘留的面銅1 2 5與銅箔板1 2 4即構成内層線路,如 第一 C圖所示。接著,參照第一 D圖,先形成介電層1 2 7, 覆蓋整個多層板上。然後,利用適當的方式,例如雷射鑽 孔方式,先於多層板的上表面、於通孔1 2 3上方及下方形 成盲孔128( blind via)。再者,如第一 E圖所示,以電鍍 導電層覆蓋於多層板上與填滿盲孔1 2 8中。最後,對於導 電層進行圖案移轉與蝕刻,以形成線路13 0與導電盲孔1 2 9 。雷增製需板亦 處用本濕亦層, 之ίι成等通多差 進需程銅導層誤 改孔製化的增位 待盲得鍍孔統對 干統使電盲傳之。 若傳,以與,孔制 在此貴需孔者鑽限 存因昂,通再射干 術,備通,。雷若 技素設導冗性供的 板因孔的繁雜以上 層等鑽孔驟複間度 多度射盲步的空密 式精雷或的上的線 層孔,孔程程外佈 增鑽作通製製額及 統械製統濕加留上 傳機式傳,增預計 ,量方,作,需設 而考的次製作墊路 然,孔其式製孔電 先鑽。方開盲成 首射加程分之造 三、【發明内容】 對於上述,欲簡化增層式多層板製程上的複雜性,本V. Description of the invention (2) Figure. In the present invention, the resin through hole (r e s p n u g g i n g) is used to fill the through hole 123 (pass through hole, PTH), and then copper 125 is bonded. After that, a photoresist layer is formed on the surface copper 1 25, and the pattern with the inner layer circuit is transferred to the photoresist layer. After etching the surface copper 1 2 5 and the copper foil 1 24, the photoresist layer is stripped. The remaining surface copper 1 2 5 and the copper foil plate 1 2 4 constitute the inner layer circuit, as shown in the first C diagram. Next, referring to the first D diagram, a dielectric layer 1 2 7 is first formed to cover the entire multilayer board. Then, using a suitable method, such as a laser drilling method, a blind via 128 is formed before the upper surface of the multilayer board, above the through hole 1 2 3 and the lower square. Moreover, as shown in the first E diagram, the multilayer conductive board is covered with a plated conductive layer and the blind holes 1 2 8 are filled. Finally, the conductive layer is pattern-transferred and etched to form a circuit 130 and a conductive blind hole 1 2 9. Lei Zeng needs the board to use the same wet layer. The copper lead layer of the process is wrong. The increase of the hole system is changed. The blind hole plating system will be blindly transmitted to the trunk system. If it is passed, then, and the hole system, where you need to drill holes, you need to limit the memory, and then shoot the dry technique to prepare for the pass. Lei Ruoji has set up redundant guides due to the complexity of holes on the upper layer and other drilling holes. The air-tight fine mines with multiple steps and blind shots or multiple layers of holes on the upper layer are drilled outside the hole. For the system-based system and the system-based system, the system is designed to be used for wet-and-retain uploading and uploading by machine type. It is expected to increase the quantity, work volume, and production time. Fang Kai blindly made the first shot plus the third. [Abstract] For the above, in order to simplify the complexity of the multilayer build-up process, the present

第6頁 2904219 五、發明說明(3) 發明提供一種製作增層式、多層板的方法,係以光阻直接形 成盲孔圖案,取代傳統的雷射鑽孔製程,節省盲孔製程的 成本。 對於簡化内層多層板製程,本發明提供一種製作增層 式多層板的方法,係以光阻直接形成盲孔圖案,利用進行 銲錫印刷與回銲的方式製作盲孔的導通。 對於簡化通孔或盲孔的導通,本發明提供一種製作多 層電路板的方法,係利用進行導電塞孔的方式製作通孔的 導通,利用進行銲錫印刷與回銲的方式製作盲孔的導通, 捨棄一般的濕製程導通製程,同時亦可節省盲孔與通孔所 佔之面積。 法 根 包 於其表 一線路 導電材 導電材 性導通 通盲孔 與盲孔 刻。再 據上述 含提供 面上。 與至少 料,例 料,使 之用。 ,簡化 的導電 接著去 本發明提供一種製作增層式多層板的方 多層板,至少包含一導電通孔與一導電層 形成一光阻層於導電層上,其具有 (blind via pad)的圖案( 錫於導電層上,再以回銲 料位於盲孔墊的位置,藉 材料的自行對準特性,直 層多層板的製程。之後, 刻阻障,進行導電層的線 一盲 如印 得導 利用 了一 材料 除光 孔墊 刷銲 電材 導電 般增 為蝕 阻層 形成一絕緣層,以及於 包含至少 形成一 方式處理 以作為電 接形成導 以光阻層 路圖案蚀 此絕緣層Page 6 2904219 V. Description of the invention (3) The invention provides a method for making a multilayer, multi-layer board, which directly forms a blind hole pattern with a photoresist, instead of the traditional laser drilling process, and saves the cost of the blind hole process. For simplifying the manufacturing process of the inner multi-layer board, the present invention provides a method for manufacturing a multi-layer multi-layer board, which directly forms a blind hole pattern by using a photoresist, and uses a method of solder printing and reflow to make the conduction of the blind hole. For simplifying the conduction of vias or blind vias, the present invention provides a method for manufacturing a multilayer circuit board. The method is to conduct the vias of a conductive plug hole, and to make the vias of a blind hole by solder printing and reflow. Abandon the general wet process and turn-on process, and also save the area occupied by blind holes and through holes. The method covers the surface of a line. Conductive material Conductive material Conductive blind hole and blind hole engraving. According to the above-mentioned containing surface. With at least the materials, examples, use it. Simplified conductivity. Next, the present invention provides a square multi-layered board for manufacturing an additive multilayer board, which at least includes a conductive via and a conductive layer to form a photoresistive layer on the conductive layer, which has a pattern of blind via pad. (Tin is on the conductive layer, and then the solder is located at the position of the blind hole pad. Based on the self-alignment characteristics of the material, the process of the straight multilayer board is etched. After that, the barrier is etched, and the conductive layer lines are printed as blind as possible. A material removing hole pad is used to brush the electrical material to increase the conductivity to form an insulating layer, and at least one process is included to form an electrical connection to form a photoresist layer to etch the insulating layer.

第7頁 獅 4219 五、發明說明(4) 上形成圖案化之外層線路。 四、【實施方式】 本發明用示意圖詳細描述如下,在詳述本發明實施例 時,表示多層電路板的剖面圖會不依一般比例作局部放大 以利說明,然不應以此作為有限定的認知。此外,在實際 的製作中,應包含長度、寬度及深度的三維空間尺寸。 本發明提供一種製作多層板的方法,應用於一印刷電 路板,包含提供兩導電層與一第一介電層,其中第一介電 層位於兩導電層之間。形成兩光阻層分別於兩導電層上, 此兩光阻層暴露出部分兩導電層。形成一導電材料於部分 被暴露之兩導電層上,再以回銲方式處理導電材料,使得 導電材料形成至少一導電盲孔(conductive blind via p o s t)於任一兩導電層上。 第二圖為本發明之製作增層式多層板的方法流程示意 圖。參照第二圖,本發明提供一多層板(步驟1 0 )。在一實 施例中,多層板包含一介電層介於兩銅箱板中。接著,藉 由適當的方式,例如機械鑽孔,於多層板上鑽出貫洞 (through hole)(步驟12)。之後,進行貫洞的導通與兩銅 箱板的鑛銅製程(步驟1 4)。於本發明中’利用導電材料塞 孔(p 1 u g g i n g )方式塞滿貫洞,取代原有濕製程鑛孔銅,簡 化貫洞的導通製程。Page 7 Lion 4219 V. Description of the invention (4) A patterned outer layer circuit is formed. 4. [Embodiments] The present invention is described in detail with schematic diagrams. In the detailed description of the embodiments of the present invention, the cross-sectional view showing a multilayer circuit board will not be partially enlarged according to the general scale to facilitate the description, but it should not be used as a limitation. Cognition. In addition, in actual production, three-dimensional space dimensions of length, width and depth should be included. The invention provides a method for manufacturing a multilayer board, which is applied to a printed circuit board and includes providing two conductive layers and a first dielectric layer, wherein the first dielectric layer is located between the two conductive layers. Two photoresist layers are formed on the two conductive layers respectively, and the two photoresist layers expose a part of the two conductive layers. A conductive material is formed on the partially exposed two conductive layers, and then the conductive material is processed by reflow, so that the conductive material forms at least one conductive blind via (pos t) on any two conductive layers. The second figure is a schematic flow chart of a method for manufacturing an increased multilayer board according to the present invention. Referring to the second figure, the present invention provides a multilayer board (step 10). In one embodiment, the multilayer board includes a dielectric layer between two copper box boards. Next, a through hole is drilled in the multilayer board by an appropriate method such as mechanical drilling (step 12). After that, the through-hole conduction and the copper mining process of the two copper boxes are performed (steps 14). In the present invention, a full hole is plugged by using a conductive material plug hole (p 1 u g g i n g), replacing the original wet process copper ore, and simplifying the conduction process of the through hole.

第8頁 2904219 五、發明說明(5)Page 8 2904219 V. Description of the invention (5)

接著,本發明方法,利用光阻直接形成盲孔墊與線路 圖案以製作盲孔及線路(步驟1 6)。在一實施例中,以任何 適當的方式,分別於兩銅箔板上形成光阻層,再將具有線 路與盲孔墊的圖案移轉至光阻層上,如此的光阻圖案便可 作為直接形成盲孔。接下來,在具有盲孔圖案的光阻層上 印刷一導電材料,並進行此導電材料的回銲(r e f 1 〇 w )(步 驟1 8 )。在本發明中,利用選擇性印刷的方式,於盲孔圖 案的位置上印刷導電材料,此導電材料可以為一低熔點金 屬或合金,在一實施例中,導電材料為銲錫(solder)。再 者,本發明的特徵之一,在於利用導電材料具有自行對準 (s e 1 f - a 1 i g n m e n t)的特性,於回銲時,導電材料可流回至 盲孔位置,彌補印刷時精度的問題。經由此一步驟,可直 接形成盲孔的導通,因此本發明的特徵之一,在於以光阻 及具有自行對準的導電材料之設計,經過印刷與回銲,即 完成導通盲孔,不需經過傳統雷射鑽孔及濕製程導通製程 之後,以適當的方式,例如蝕刻方式,處理兩銅箱板 以蝕刻出兩銅箔板上的線路圖案(步驟2 0 ),並剝除光阻。 再利用適當的方式,於多層板上形成絕緣層與外層導電層 ,並於外層導電層做出外層線路(步驟2 2)。 第三A至第三E圖為根據本發明之製作增層式多層板的 2904219 五、發明說明(6)Next, in the method of the present invention, a blind hole pad and a circuit pattern are directly formed using a photoresist to make a blind hole and a circuit (step 16). In one embodiment, a photoresist layer is formed on the two copper foils in any suitable manner, and then the pattern with the circuit and the blind hole pad is transferred to the photoresist layer. Such a photoresist pattern can be used as Blind holes are formed directly. Next, a conductive material is printed on the photoresist layer having a blind hole pattern, and reflow soldering (ref 1 0w) of the conductive material is performed (step 18). In the present invention, a conductive material is printed on the position of the blind hole pattern by means of selective printing. The conductive material may be a low-melting metal or alloy. In one embodiment, the conductive material is solder. Furthermore, one of the features of the present invention is that the conductive material has the characteristics of self-alignment (se 1 f-a 1 ignment). During reflow, the conductive material can flow back to the position of the blind hole, which compensates for the accuracy of printing. problem. Through this step, the conduction of the blind hole can be directly formed. Therefore, one of the features of the present invention is to design a photoresist and a conductive material with self-alignment through printing and re-soldering to complete the conduction of the blind hole. After the conventional laser drilling and wet process conduction processes, the two copper box boards are processed in an appropriate manner, such as etching, to etch out the circuit patterns on the two copper foil boards (step 20), and the photoresist is stripped. Then an appropriate method is used to form an insulating layer and an outer conductive layer on the multilayer board, and to form an outer circuit on the outer conductive layer (step 2 2). The third A to the third E are 2904219 for making a multilayered board according to the present invention. 5. Description of the invention (6)

剖面示意圖。參照第三A圖,提供一多層板,包含一介電 層2 6介於兩銅箔板2 8之間,與若干貫穿多層板的通孔2 3。 在本發明中,多層板可作為多層電路板的内層之用,但不 限於此應用,而利用適當的方式,例如機械鑽孔方式,製 作通孔2 3。接著,參照第三B圖,在本發明中,以導電材 料塞孔的方式,取代傳統濕製程方式,使得通孔2 3因導電 塞孔而具有電性導通的導電通孔2 3。本發明的特徵之一, 在於利用導電材料塞孔,簡化製作導電通孔的製程。要注 意的是,只要適合作為印刷電路板的導電材料,皆不脫本 發明應用範圍。之後,利用一般鍍銅方式,於兩銅箔板2 8 上鍍上一層化銅2 4以作為後續之用。 參照第三C圖,於化銅2 4上先形成一光阻層3 2,再將 具有線路3 1與盲孔墊3 0之圖案移轉至光阻層3 2上。在本發 明中’通孔2 3已經由導電材料基滿’並有化銅2 4於其上’ 可提供位置設計盲孔。因此,本發明的盲孔與通孔2 3可以 重疊,位於上下關係的位置,如此節省盲孔與通孔2 3所佔 用的面積,增進電路設計的彈性。本發明的特徵之一,在 於利用具有線路與盲孔墊圖案的光阻層以暴露出盲孔墊, 而不需購置昂貴的雷射鑽孔機台。 ® 參照第三D圖,將導電材料,以選擇性印刷的方式先 塗佈於光阻層32上之盲孔墊30的位置,再利用回銲 (ref low)的方式,使導電材料自行對準於盲孔墊30的位置 2904219 五、發明說明(7) 。本發明的特徵之一,在於利用回銲時,導電材料熔成液 體,此液狀的導電材料之内聚力會使得導電材料聚集。再 者,盲孔墊3 0的材料,也就是暴露出的化銅2 4,對於導電 材料有拉力作用,使得其對位於盲孔位置。在本發明中, 導電材料可以是低熔點的金屬或是合金,例如銲錫 (solder),只要可應用於塞孔製程,皆屬於本發明應用範 圍。本發明的特徵之一,在於此導電材料於回銲時具有自 行對準的特性,即使選擇性印刷時的若干偏差,造成導電 材料殘留於光阻上時,可藉由回銲時對準於盲孔墊3 0的位 置,完成導電盲孔4 0。因此,本發明的特徵之一,在於利 用印刷與回銲導電材料,取代一般雷射鑽孔及濕製程製作 導電盲孔.。此外,利用銲錫的特性,使得本發明之導電盲 孔的熱傳導亦較傳統盲孔佳。並且,因導電材料自行對準 之性質,盲孔墊所需面積較習知雷射鑽孔製程所需的盲孔 墊面積小,故可提高多層板内層線路之佈線密度。 接著,如第三E圖所示,以光阻層32及導電盲孔40為 遮罩,對於銅箔板2 8與化銅2 4進行線路的蝕刻,再移除光 阻層3 2,然後繼續於多層板上依序形成絕緣層3 4與導電層 ,然後於導電層上製作外層電路3 8。在本發明中,考慮到 導電盲孔4 0所造成的平坦度問題,可於絕緣層3 4形成後, 先進行一磨平(ρ 〇 1 i s h i n g )步驟,再進行導電層的形成製 作。本發明的特徵之一,在於以導電材料自行對準形成導 電盲孔4 0,具有一向上突起的形狀,減少了導電盲孔4 0與Schematic cross-section. Referring to FIG. 3A, a multilayer board is provided, which includes a dielectric layer 26 between two copper foil boards 28 and a plurality of through holes 23 passing through the multilayer board. In the present invention, the multilayer board can be used as the inner layer of the multilayer circuit board, but is not limited to this application, and the through hole 23 is made by a suitable method, such as a mechanical drilling method. Next, referring to FIG. 3B, in the present invention, the conventional wet process method is replaced by a conductive material plug hole method, so that the through hole 23 has a conductive via hole 23 that is electrically conductive due to the conductive plug hole. One of the features of the present invention is that the conductive material is used to plug holes to simplify the manufacturing process of conductive vias. It should be noted that as long as it is suitable as a conductive material of a printed circuit board, it does not depart from the scope of application of the present invention. After that, a layer of copper 24 is plated on the two copper foil plates 2 8 by a general copper plating method for subsequent use. Referring to the third figure C, a photoresist layer 32 is formed on the copper 24 first, and then the pattern having the lines 31 and the blind hole pad 30 is transferred to the photoresist layer 32. In the present invention, the 'through-holes 2 3 are already filled with a conductive material' and have copper 2 4 thereon 'to provide position design blind holes. Therefore, the blind hole and the through hole 23 of the present invention can be overlapped and located in an up-and-down position. This saves the area occupied by the blind hole and the through hole 23 and improves the flexibility of circuit design. One of the features of the present invention is that a photoresist layer having a pattern of lines and a blind hole pad is used to expose the blind hole pad, without the need to purchase an expensive laser drilling machine. ® Refer to Figure 3D, apply the conductive material to the blind hole pad 30 on the photoresist layer 32 by selective printing first, and then use the ref low method to make the conductive material self-align. Position of the blind hole pad 30 2904219 V. Description of the invention (7). One of the features of the present invention is that the conductive material is melted into a liquid when reflow soldering is used, and the cohesive force of the liquid conductive material causes the conductive material to aggregate. In addition, the material of the blind hole pad 30, that is, the exposed copper 24, has a tensile effect on the conductive material, so that it is located at the position of the blind hole. In the present invention, the conductive material may be a metal or alloy with a low melting point, such as solder, as long as it can be applied to the plugging process, it belongs to the application scope of the present invention. One of the features of the present invention is that the conductive material has self-alignment characteristics during reflow. Even if some deviations in selective printing cause the conductive material to remain on the photoresist, the conductive material can be aligned during reflow. The position of the blind hole pad 30 completes the conductive blind hole 40. Therefore, one of the features of the present invention is to use conductive materials such as printing and re-soldering to replace conventional laser drilling and wet processes to make conductive blind holes. In addition, due to the characteristics of solder, the thermal conduction of the conductive blind hole of the present invention is better than that of the conventional blind hole. In addition, due to the self-aligning nature of the conductive material, the area required for the blind hole pad is smaller than that required for the conventional laser drilling process, so the wiring density of the inner layer wiring of the multilayer board can be increased. Next, as shown in FIG. 3E, using the photoresist layer 32 and the conductive blind hole 40 as a mask, the copper foil 28 and the copper 24 are etched, and the photoresist layer 32 is removed. Continue to sequentially form an insulating layer 3 4 and a conductive layer on the multilayer board, and then fabricate an outer layer circuit 38 on the conductive layer. In the present invention, in consideration of the flatness problem caused by the conductive blind hole 40, after the insulating layer 34 is formed, a flattening (ρ 〇 1 i s h i n g) step is performed before the conductive layer is formed. One of the features of the present invention is that the conductive blind hole 40 is formed by self-alignment of the conductive material, and has a shape of an upward protrusion, which reduces the conductive blind hole 40 and

第11頁 2904219 五、發明說明(8) 形成外層電路3 8之導電層的接觸面積。,因此’導電盲孔4 0 上方最外層的導電墊面積的減少,有助於外層電路38或元 件的佈局密度提高。 綜上所述,本發明方法,利用導電材料塞孔,簡化製 作導電通孔的製程;利用具有線路與盲孔墊圖案的光阻層 形成盲孔墊,不需使用昂貴的雷射鑽孔機台;利用導電材 料於回銲時具有自行對準的特性,製作導電盲孔;利用導 電材料所形成的導電盲孔,具有較佳的熱傳導性與較小的 上接觸面積,可提高内層線路之佈線密度,與可減少上方 最外層導電墊面積。 以上所述之實.施例僅係為說明本發明之技術思想及特 點,其目的在使熟習此項技藝之人士能夠瞭解本發明之内 容並據以貫施’當不能以之限定本發明之專利範圍’即大 凡依本發明所揭示之精神所作之均等變化或修飾,仍應涵 蓋在本發明之專利範圍内。Page 11 2904219 V. Description of the invention (8) The contact area of the conductive layer forming the outer layer circuit 38. Therefore, the reduction of the area of the outermost conductive pad above the 'conductive blind hole 40' contributes to the layout density of the outer layer circuit 38 or the component. In summary, the method of the present invention uses a conductive material to plug holes to simplify the manufacturing process of conductive vias; a photoresist layer with a pattern of lines and blind hole pads is used to form a blind hole pad, without using an expensive laser drilling machine Stage; the use of conductive materials with self-alignment characteristics during reflow, making conductive blind holes; conductive blind holes formed using conductive materials, with better thermal conductivity and smaller upper contact area, can improve the inner layer of the circuit The wiring density can reduce the area of the outermost conductive pad above. The above-mentioned embodiments are only for explaining the technical ideas and characteristics of the present invention, and the purpose is to enable those skilled in the art to understand the content of the present invention and apply it accordingly. The scope of the patent, that is, any equivalent change or modification made according to the spirit disclosed by the present invention, should still be covered by the patent scope of the present invention.

第12頁 2904219 圖式簡單說明 五、【圖式肩單說明】 第一 A至第一 E圖為傳統製作增層式多層板的剖面示意 圖。 第二圖為本發明之製作增層式多層板的方法流程示意 圖。 第三A至第三E圖為根據本發明之製作增層式多層板的 剖面示意圖。 元件符號說明 ❿ 1 0〜2 2步驟 2 3導電通孔 24化銅 26介電層 28銅箔板 _ 3 0盲孔墊 3 1線路 3 2光阻層 3 4絕緣層 38外層電路 40導電盲孔 121孔銅 1 2 3通孔 1 2 4銅猪板 1 2 5面銅Page 12 2904219 Brief description of the drawings 5. [Illustration of the shoulder chart of the drawings] The first A to the first E are schematic cross-sectional views of the traditional production of multi-layer multilayer boards. The second figure is a schematic flow chart of a method for manufacturing an increased multilayer board according to the present invention. Figures A through E are schematic cross-sectional views of a multilayer build-up board according to the present invention. Description of component symbols: 1 0 ~ 2 2 step 2 3 conductive vias 24 copper 26 dielectric layer 28 copper foil_ 3 0 blind hole pad 3 1 circuit 3 2 photoresist layer 3 4 insulating layer 38 outer layer circuit 40 conductive blind Hole 121 hole copper 1 2 3 through hole 1 2 4 copper pig plate 1 2 5 side copper

第13頁 2904219Page 13 2904219

Claims (1)

該 於 層 電 導 - 含 • ·包 含少 包至 ,,板 法層 方多 AR=口 板, 層板 多層 式多 層一 增供 作提; 製上 a 種{板 一 層 含 圖 包 的 声 墊 具 孔 層 盲 阻 該 光 的 該·,層 ,口阻 上開光 層案該 電圖於 導的料 該塾材 於孔電 層亡目導 阻一 一 光少第 一至一 成與成 形路形 }線} b C Γ\ 一 ΓΧ 少 至 導。 一孔 第盲 該通 得導 使一 ’ 為 料作 材以 電 , 導置 一位 第的 該墊 理孔 處盲 式該 方於 銲位 及回對 ; 以行 中 自 d 口 C料 開 材 案 電 2904219 六、申請專利範圍 2.如申請專利範圍第1項之製作增層式多層板的方法,更 包含: 移除部分該導電層,藉以形成該線路,該移除步驟係 以該光阻層與該導通盲孔為一遮罩;及 移除該光阻層。 3. 如申請專利範圍第1項之製作增層式多層板的方法,其 中該(a )步驟更包含: 移除部分該多層板以形成至少一通洞於該多層板中; 以一第二導電材料塞孔方式填滿該通洞以作為電性導 通之用;及 電鍍一第三導電材料於該通洞與該導電層上。 4. 如申請專利範圍第3項之製作增層式多層板的方法,其This layer of conductance-contains • · Includes less packages, and the board method is more AR = mouth plate, layered multi-layered multi-layered multi-layered for additional mention; a kind of {{a layer of sound pad with a picture package with holes} The layer blindly blocks the light, the layer, the mouth, and the opening layer on the case. The electrograph is guided by the material. The metal material in the hole electrical layer is blindly guided. One by one the light is less than the first. } b C Γ \ -ΓX is as low as derivative. A hole should be blind to make one's material to be used as electricity, and a bit of the cushioning hole should be placed blindly at the welding position and back to the right; the material is opened from the d port C in the row. Case 2904219 6. Scope of patent application 2. The method for making a multi-layer multilayer board as described in item 1 of the patent application scope further includes: removing part of the conductive layer to form the circuit, and the removing step is based on the light The resist layer and the blind via are a mask; and the photoresist layer is removed. 3. The method for manufacturing a multi-layer multilayer board according to item 1 of the patent application scope, wherein the step (a) further comprises: removing a part of the multilayer board to form at least one through hole in the multilayer board; using a second conductive A material plugging method is used to fill the via hole for electrical conduction; and a third conductive material is plated on the via hole and the conductive layer. 4. If the method of making a multi-layered multi-layer board is applied for item 3 of the scope of patent application, which 第15頁 2904219 六、申請專利範圍 中該盲孔的位置於該通洞上方。 5. 如申請專利範圍第3項之製作增層式多層板的方法,更 包含移除部分該第三導電材料與該導電層,藉以形成該線 路,該移除步驟係以該光阻層與該導通盲孔為一遮罩。 6. 如申請專利範圍第1項之製作增層式多層板的方法,其 中該(c)步驟包含以印刷方式形成該第一導電材料。 7. 如申請專利範圍第1項之製作增層式多層板的方法,其 中該第一導電材料包含一銲錫材料、或低熔點合金材料、 或低熔點金屬材料。 8. —種製作多層板的方法,應用於一印刷電路板,該製作 多層板的方法包含: (a) 提供兩導電層與一第一介電層,該第一介電層位 於該兩導電層之間; (b) 形成兩光阻層分別於該兩導電層上,該兩光阻層 暴露出部分該兩導電層; (c) 形成一第一導電材料於部分被暴露之該兩導電層 上;及 (d )以回銲方式處理該第一導電材料,使得該第一導 電材料自行對位形成至少一導電盲孔於任一該兩導電層上Page 15 2904219 6. The position of the blind hole in the scope of patent application is above the through hole. 5. If the method of making a layered multilayer board according to item 3 of the patent application scope further includes removing part of the third conductive material and the conductive layer to form the circuit, the removing step is based on the photoresist layer and The conductive blind hole is a mask. 6. The method for manufacturing a multi-layer multilayer board according to item 1 of the patent application, wherein the step (c) includes forming the first conductive material by printing. 7. The method for manufacturing a build-up multilayer board according to item 1 of the application, wherein the first conductive material comprises a solder material, a low melting point alloy material, or a low melting point metal material. 8. A method for manufacturing a multilayer board, which is applied to a printed circuit board. The method for manufacturing a multilayer board includes: (a) providing two conductive layers and a first dielectric layer, the first dielectric layer being located on the two conductive layers; Between the two layers; (b) forming two photoresistive layers on the two conductive layers, the two photoresistive layers exposing part of the two conductive layers; (c) forming a first conductive material on the two conductive layers that are partially exposed Layer; and (d) the first conductive material is processed by reflow, so that the first conductive material aligns itself to form at least one conductive blind hole on either of the two conductive layers. K6頁 2904219 六、申請專利範圍 9.如申請專利範圍第8項之製作多層板的方法,更包含: 移除部分該兩導電層與該第一介電層,藉以形成至少 一通洞於該兩導電層與該第一介電層中; 以一第二導電材料塞孔方式填滿該通貫洞以作為電性 導通之用;及 電鍍一第三導電材料於該通洞與該兩導電層上。 1 0.如申請專利範圍第8項之製作多層板的方法,更包含: 移除部分該兩導電層,藉以形成一電路線路,該移除 步驟係以該光阻層與該導電盲孔為一遮罩;及 移除該光阻層。 1 1.如申請專利範圍第1 0項之製作多層板的方法,更包含 形成一第二介電層於該導電盲孔與該電路線路上。 1 2 .如申請專利範圍第8項之製作多層板的方法,其中該兩 導電層包含兩銅箱層。 1 3.如申請專利範圍第8項之製作多層板的方法,其中該第 一導電材料包含一銲錫材料、或低熔點合金材料、或低熔 點金屬材料。 1 4 .如申請專利範圍第8項之製作多層板的方法,其中該(cK6Page 2904219 6. Application for Patent Scope 9. The method for making a multilayer board according to item 8 of the patent application scope further includes: removing part of the two conductive layers and the first dielectric layer to form at least one through hole in the two A conductive layer and the first dielectric layer; filling the via hole with a second conductive material for electrical conduction; and plating a third conductive material on the via hole and the two conductive layers . 10. The method for manufacturing a multilayer board according to item 8 of the scope of patent application, further comprising: removing a part of the two conductive layers to form a circuit, the removing step is based on the photoresist layer and the conductive blind hole as A mask; and removing the photoresist layer. 1 1. The method for manufacturing a multilayer board according to item 10 of the patent application scope, further comprising forming a second dielectric layer on the conductive blind hole and the circuit line. 12. The method for manufacturing a multilayer board according to item 8 of the scope of patent application, wherein the two conductive layers include two copper box layers. 1 3. The method for manufacturing a multilayer board according to item 8 of the scope of patent application, wherein the first conductive material comprises a solder material, or a low melting point alloy material, or a low melting point metal material. 1 4. The method for making a multilayer board according to item 8 of the scope of patent application, wherein (c 第17頁 2904219 六、申請專利範圍 )步驟包含以印刷方式形、成該第一導電材料。 1 5. —種導通盲孔結構,位於一多層板中,該多層板具有 一多層板核心,該導通盲孔結構包含: 一底面,係連接於相對靠近該多層板核心之一第一導 電層上; 一頂面,係連接於相對遠離該多層板核心之一第二導 電層上;及 一外凸圓弧表面,係由於一盲孔材質之内聚力所造成 其中該底面與該第一導電層接觸的面積大於該頂面與 該第二導電層接觸的面積。 1 6 .如申請專利範圍第1 5項之導通盲孔結構,其中該盲孔 材質包含一銲錫材料。 1 7.如申請專利範圍第1 5項之導通盲孔結構,其中該盲孔 材質包含一低熔點合金材料。 1 8 .如申請專利範圍第1 5項之導通盲孔結構,其中該盲孔 材質包含一低熔點金屬材料。Page 17 2904219 VI. Scope of Patent Application) The steps include forming and forming the first conductive material by printing. 1 5. A blind via structure is located in a multilayer board. The multilayer board has a multilayer board core. The blind via structure includes: a bottom surface, which is connected to one of the cores relatively close to the multilayer board. On the conductive layer; a top surface connected to a second conductive layer relatively far away from the core of the multilayer board; and a convex arc surface caused by the cohesion of a blind hole material among which the bottom surface and the first surface The area where the conductive layer contacts is larger than the area where the top surface contacts the second conductive layer. 16. The blind via structure according to item 15 of the patent application scope, wherein the material of the blind via comprises a solder material. 17. The conductive blind hole structure according to item 15 of the patent application scope, wherein the material of the blind hole comprises a low melting point alloy material. 18. The conductive blind hole structure according to item 15 of the patent application scope, wherein the material of the blind hole comprises a low melting point metal material. 第18頁Page 18
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CN103379750B (en) * 2012-04-27 2016-06-01 富葵精密组件(深圳)有限公司 Multilayer circuit board and preparation method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
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