TWI238032B - Method of fabricating printed circuit board with blind vias - Google Patents

Abstract

A method of fabricating a printed circuit board with blind vias is provided. First, a layer structure is provided with a conductive surface. At least one solid conductive blind via is formed by patterning the conductive surface on the layer structure. Next, an insulating layer covers the conductive surface and exposes the top surface of the solid conductive blind via. And then a conductive layer covers both the insulating layer and the solid conductive blind via. Then the conductive layer is patterned to form a circuit. The formation of the solid conductive blind via is prior to the formation of the circuit, which simplifies the fabricating process and has better electrical and thermal performance.

Description

! 238〇32 ~ __ V. Description of the invention (1) ~ ^-— [Technical field to which the invention belongs] The present invention relates to-a method for making a blind hole of a circuit board, especially two; a method for making a layered circuit The method of plate blind holes uses etching and electricity to directly produce solid conductive blind holes (SC) (Ud cQnduetlve blindvia). 2. [Previous Technology] ^ Printed Circuit Board (PCB) is known as the mother of electronic system products. It embeds various electronic components and provides a relay transmission platform. It is a necessary component for all electronic products. Printed circuit boards can be divided into single-panel, double-panel, and multilayer boards. As electronic products have become smaller, lighter, thinner, higher-speed, higher-performance, higher-density, lower-cost, and electronic packaging technology has become more advanced in recent years. The number of pins, fineness and accumulation have developed, so printed circuit boards are also moving towards high-density wiring, fine line pinholes, composite multilayers, and thin plates. The most important application technology in the number of layers is bui Id up and High Density Interconnection (HDI). The so-called build-up method is outside the traditional laminated multi-layer board. Then use adhesive-backed copper foil (RCC) or copper foil and film to increase the layer. The interconnection with the internal circuit board adopts the method of Mi crovi a micro-blind hole. As shown in the first figure, a conventional build-up multilayer board, such as a three-layer board with a metal core, is first provided with a copper foil having a thickness of about 12 to 40 micrometers (0.5 to 1.4 mi 1). In the plate 1 10, a number of through holes are made in the copper foil plate 1 10 by means of etching. Laminated on copper foil with insulating layer 1 1 2

Page 5 1238032 V. Description of the invention (2) The top and bottom of the board 1 1 0 are filled into the through hole together, and then two other conductive layers 1 1 3 are formed on the insulating layer, such as a copper foil layer, so as to form a Three-layer board structure. The through-holes 1 1 4 penetrating the three-layer board structure are also made by mechanical drilling. Blind vias are formed by laser drilling, and vias such as electroless copper plating are used to make through holes and blind vias 1 1 5 for electrical continuity. Furthermore, the surface of the conductive layer 113 is plated with copper (not shown) by electroplating. Plug it into the conductive vias and blind holes with the resin 1 1 6 plug hole method. Then, electroless copper plating and electroplating are used to form a conductive layer 1 1 7 on the conductive layer 1 1 3 having surface copper. Finally, using appropriate methods, for example, pattern transfer and etching on the conductive layers 1 17 and 1 1 3 to form the outer layer circuit. However, the traditional build-up multilayer board technology, especially for flip-chip packaging (FI ip Chip, For FC) carrier boards, there are several areas for improvement. First of all, considering the factors such as mechanical drilling accuracy, traditional Flip Chip (FC) carrier board blind holes need to be made by laser drilling. Laser drilling equipment is expensive, which increases the manufacturing cost. Secondly, the traditional build-up flip-chip package carrier requires a larger connection capture pad, resulting in a larger conductive via design and a larger spacing between conductive vias (pitch III. [Contents of the Invention] For the above, in order to simplify the complexity of the multilayer build-up process, the present invention provides a method for manufacturing a blind hole of a circuit board by transferring the blind hole pattern.

1238032 V. Description of the invention (3) Directly make blind holes on a conductive layer, and replace the laser drilling process required by the traditional build-up multilayer board with an etching and plating process, which can save the cost of blind hole production. In the manufacturing process of a layered circuit board, the present invention provides a method for manufacturing a blind hole of a layered circuit board. Before the circuit is formed, a solid conductive blind hole is directly formed. According to the above, the present invention provides a method for manufacturing a blind hole of a circuit board. First, a layered structure is provided with a conductive surface, and the conductive surface is patterned to form at least one solid conductive blind hole; then, an insulating layer is formed to cover the layered structure and expose the top of the solid conductive blind hole. Then, a conductive layer is used to cover the insulating layer and the through-hole conductive blind hole, and finally the conductive layer is patterned to form a circuit. Among them, a solid conductive blind hole is directly formed first and then an insulating layer is formed, which can simplify the process of the blind hole of the circuit board, and at the same time, obtain a solid conductive blind hole with better electrical and thermal performance. 4. [Embodiments] The present invention is described in detail with schematic diagrams. In the detailed description of the embodiments of the present invention, the cross-sectional view showing a multilayer circuit board will not be partially enlarged according to the general scale to facilitate the description, but it should not be used as a limitation. Cognition. In addition, in the production of actual sound, the three-dimensional space dimensions of length, width and depth should be included. The invention provides a method for manufacturing a blind hole of a circuit board. Can be applied to

Page 7 1238032 V. Description of the invention (4) Circuit board with conductive core layer or circuit board with dielectric core layer. The second figure is a schematic flowchart of a method for manufacturing a blind hole of a circuit board according to an embodiment of the present invention. Referring to the second figure, an embodiment of the present invention performs blind hole fabrication from a layered structure (step 10). In the first embodiment, the layered structure may be a single thick conductive plate with a thickness of about several hundred micrometers, such as a copper plate of 250 micrometers, which is thicker than a commonly used copper foil plate, which may provide a conductive surface as a blind hole. Connected conductive plate. In the second embodiment, the layered structure may be a general multilayer plate structure, such as a three-layer plate structure. Two copper foil plates are used to provide a conductive surface, and a dielectric core layer is sandwiched therein. Then, in a proper manner, a conductive via is formed in the layered structure (step 12). In the first embodiment, a larger through hole can be made in the layered structure, and then a resin plug hole is used, and then a suitable through method such as mechanical drilling is used to make a smaller through hole in the resin, and then The small through hole is filled with a conductive material plug hole to become a conductive through hole. In the second embodiment, after making a through-hole in the layered structure, hole copper and surface copper are plated by electroplating to make it a conductive through-hole. Then, a photoresist layer is formed on the layered structure, and a pattern having a blind hole is transferred to the photoresist layer by a lithography method (step 14). After that, using the photoresist layer with a blind hole pattern as a mask, a solid conductive blind hole is formed by etching (step 16). In the first embodiment, a part of the original conductive surface of the layered structure is removed by etching to form a through-hole conductive blind hole. In a second embodiment, the layered structure contains plated copper, which is removed by etching.

1238032 V. Description of the invention (5) Part of the surface copper is used to form a solid conductive blind hole. In this embodiment, an internal circuit can be made on the conductive surface of the layered structure through a lithographic etching step. One of the features of the embodiments of the present invention is to directly form a conductive solid blind hole L, which simplifies the process of making blind holes. After that, the layered structure is covered with an insulating layer and the upper surface of the solid conductive blind hole is exposed, and then a conductive layer is covered on the insulating layer, and a circuit is formed on the conductive layer in an appropriate manner (step 17). In the second embodiment, the insulating layer can also be used to fill the conductive vias. FIGS. 3A to 3D are schematic cross-sectional views of a multi-spring-layer circuit board according to a first embodiment of the present invention. Referring to FIG. 3A, a thick conductive plate 22 with a thickness of about 250 micrometers is provided. In this embodiment, a thick conductive plate, such as a copper plate, is used to provide good heat dissipation and mechanical strength. It should be noted that the thick conductive plate in this embodiment is not limited to a copper plate. As long as it is suitable as a conductive material for a printed circuit board, it does not depart from the scope of application of the present invention. One of the features of this embodiment is that the thick conductive plate 22 can be used to increase the mechanical strength of the multilayer board to support more embedded electronic components. At the same time, the thick conductive plate 22 is used to increase the heat dissipation of the multilayer board, and it can quickly dissipate thermal energy when the high-speed circuit is executed on the multilayer board. Next, as shown in FIG. 3B, a through hole 20 is made on the thick conductive plate 22 by an appropriate method, such as an etching method. After that, referring to the third figure C, after making a number of etched through holes 20 penetrating the thick conductive plate 22, the etched through holes 20 are filled with a resin 24 plug method. then,

1238032 V. Description of the invention (6) As shown in the third D diagram, a through hole 21 is drilled through the thick conductive plate 22 through the resin 2 4 by an appropriate method, such as a mechanical drilling method. After that, referring to the third E diagram, the via hole 21 is filled with a conductive material 26 base hole to become a conductive via hole. In this embodiment, the conventional wet process method is replaced by the conductive material 26 base hole, so that the through hole 21 has the property of electrical conduction due to the conductive material 26 plug hole. Furthermore, the conductive material may be a metal or an alloy, such as solder, as long as it can be applied to the plugging process, it belongs to the application scope of the present invention. Next, a photoresist layer (not shown in the figure) is formed on the thick conductive plate 22 first. After transferring a blind hole pattern, the photoresist layer is used as an etching mask to remove a part of the thick conductive plate 2 by etching. 2 to form a solid conductive blind hole 5 2, and then remove the Lu photoresist layer as shown in the third F diagram. One of the characteristics of this embodiment is that the conductive surface of the thick conductive plate 22 is used as the solid conductive blind hole 5 2, the size of the solid conductive blind hole 5 2 or the thickness of the blind hole, the thickness of the photoresist layer, or the thickness of the etched thick conductive plate. 2 2 depends on the capabilities. One of the features of this embodiment is that a solid conductive blind hole 5 2 is directly made by using a photoresist layer as a mask, which simplifies the general use of laser drilling and wet processes to make conductive blind holes. Another feature of this embodiment is that a solid conductive blind hole has better electrical and thermal performance than a conventional blind hole. Referring to the third G diagram, a thick conductive plate 2 2 On the surface, ® is first formed into an insulating layer 2 8, and then a conductive layer 2 9 ′ is formed on the insulating layer 2 8, such as a copper layer, covering the insulating layer 28, conductive vias, and solid conductive blind holes 5 2. Next, as shown in the third figure, a photoresist layer (not shown in the figure) is first formed to properly

Page 10 1238032_ V. Method of Invention (7), such as pattern transfer formation and etching, remove part of conductive layer 29, and form conductive layer 29 with connection pad 5 8 (or solder pad) With the circuit pattern of circuit 5 6, and then remove the photoresist layer. In this embodiment, the size of the conductive material 26 of the via is smaller than the entire size of the via (including the resin 24 and the conductive material 26). Therefore, the connection 塾 58 may also be smaller than the entire size of the via. The size of can be reduced, so the design of two or more circuits can be accommodated between the two connection pads, which makes the density of the circuit layout even higher. In the second embodiment of the present invention, the cross-sectional schematic diagrams of making a blind hole in a multilayer board are illustrated in FIGS. 4A to 4G. As shown in FIG. 4A, a layered structure composed of a dielectric core layer 32 and a conductive layer 38 is provided. In this embodiment, the dielectric core layer 32 is a conventional dielectric layer in a general multilayer circuit board, and may be formed by stacking a plurality of different dielectric layers. The conductive layer 38, for example, a copper foil layer generally having a thickness of about 12 to 40 micrometers (0.5 to 1.4 mi 1), is laminated with the dielectric layer 32 2 by a suitable method, such as lamination. Combine to form a layered structure and serve as a conductive surface for the layered structure. Referring to the fourth diagram B, a plurality of through holes 31 are formed in a proper manner through the layered structure. Next, as shown in FIG. 4C, a conductive thin layer 39 is plated in an appropriate manner, such as electroplating. In this embodiment, a thin conductive layer 39, such as a copper layer, is a hole copper on the side wall of the through hole 31, and a face copper on the conductive layer 3 8®. After that, a photoresist layer (not shown in the figure) is formed on the conductive thin layer 39, and a pattern with a blind hole is transferred to the photoresist layer. Then, using a photoresist layer with a blind hole pattern as a mask, a part of the conductive thin layer 39 is removed, and

1238032_ V. Description of the invention (8) The remaining conductive thin layer 39 on the conductive layer 38 forms a solid conductive blind hole 40, and then strips the photoresist layer with the blind hole pattern, as shown in the fourth D diagram. Then, according to the design requirements, the inner layer circuit 41 can be made by removing a part of the conductive layer 38 in an appropriate manner, such as a lithographic etching method, as shown in FIG. 4E. One of the features of this embodiment is that a solid conductive blind hole 40 is formed first, and then an inner layer circuit 41 is formed. A solid conductive blind hole 40 is formed by using a conductive thin layer 39, which simplifies the general wet process steps, and also has good Electrical and thermal performance. Next, as shown in the fourth F diagram, an insulating layer 35 is formed first, wherein the insulating layer 35 is filled between the through hole 31 and the inner layer circuit 41. Next, a conductive layer 37, such as a copper layer, is formed on the insulating layer 35, the through hole 31, the solid conductive blind hole 40 and the inner layer circuit 41. Finally, in a suitable manner, such as lithography and etching, a part of the conductive layer 37 is removed to form the connection pad 49 and the outer layer wiring 48, as shown in the fourth G diagram. To sum up, the present invention is to directly make a solid conductive blind hole by lithographic etching before the production of the circuit of the circuit board build-up process, without using expensive laser drilling, which not only simplifies the process, but also forms the The solid conductive blind hole has better electrical properties and heat dissipation efficiency. * The above-mentioned embodiments are only for explaining the technical ideas and features of the present invention, and the purpose is to enable those skilled in the art to understand the present invention.

Page 12 1238032

Page 13 1238032 Brief description of the drawings 5. [Simplified description of the drawings] The first diagram is a schematic cross-sectional view of a conventional build-up multilayer board. The second figure is a schematic flowchart of a method for manufacturing a blind hole of a circuit board according to the present invention. The third to third figures are schematic cross-sectional views of manufacturing a multi-layer circuit board according to the first embodiment of the present invention. FIGS. 4A to 4G are schematic cross-sectional views of manufacturing a Dou-layer circuit board according to a second embodiment of the present invention. DESCRIPTION OF SYMBOLS 1 0, 1 2, 1 4, 1 6, 1 7 Step 20 Through hole 2 1 Through hole 2 2 Thick conductive plate 2 4 Resin 2 6 Conductive material 2 8 Insulating layer_ 29 Conductive layer 31 Through hole 32 Dielectric Core layer

Page 14 1238032 Brief description of drawings 3 5 Insulating layer 37 Conductive layer 38 Conductive layer 39 Conductive thin 40 Solid conductive blind hole 41 Inner circuit 48 Outer circuit 4 9 Connection pad 52 Solid conductive blind hole 56 Circuit 5 8 Connection pad_ 1 1 0 copper foil 1 1 2 insulating layer 113 conductive layer 1 1 4 through holes 1 1 5 holes copper 1 1 6 resin 117 conductive layer

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Claims (1)

1238032_ VI. Scope of patent application 1. A method for manufacturing a blind hole of a circuit board, comprising: (a) providing a layered structure having at least one conductive surface; (b) removing a portion of the conductive surface to form At least one solid conductive blind via is formed on the layered structure, wherein the solid conductive blind via is a part of the conductive surface; (c) forming an insulating layer to cover the conductive surface and exposing the conductive surface The top surface of the solid conductive blind hole; (d) forming a first conductive layer covering the insulating layer and the solid conductive blind hole; and (e) removing a portion of the first conductive layer to form a first circuit. 2. The method for manufacturing a blind hole of a circuit board as described in item 1 of the scope of patent application, wherein the step (a) above includes providing a conductive plate. 3. The method for making a blind hole of a circuit board as described in item 2 of the scope of patent application, wherein the conductive surface is a part of the conductive board. 4. The method for manufacturing a blind hole of a circuit board as described in item 2 of the scope of patent application, wherein the step (a) further includes: removing a part of the conductive plate to form a first through hole penetrating the conductive plate; A dielectric material is filled into the first through hole; a portion of the dielectric material is removed to form a second through hole in the first through hole; and Page 16 1238032 6. Scope of patent application Fill the second through hole with a conductive material. 5. The method for manufacturing a blind hole of a circuit board according to item 1 of the scope of patent application, wherein the step (a) above includes: providing a dielectric core layer; forming at least a second conductive layer on the dielectric core layer; Removing a portion of the dielectric core layer and the second conductive layer to form a through hole penetrating the dielectric core layer and the second conductive layer; and electroplating a third conductive layer on a side wall of the through hole and the second conductive layer On the conductive layer, the conductive surface is a part of the third conductive layer. 6. The method for manufacturing a blind hole of a circuit board as described in item 5 of the scope of patent application, wherein the step (b) further includes removing a portion of the second conductive layer to form a second circuit on the dielectric core layer. . 7. The method for manufacturing a blind hole of a circuit board according to item 5 of the scope of patent application, wherein the step (c) above further includes filling the through hole with the insulating layer. 8. The method for manufacturing a blind hole of a circuit board as described in item 1 of the scope of patent application, wherein before step (b) further comprises: forming a photoresist layer on the conductive surface; transferring a blind hole pattern to the photoresist Layer; and removing a portion of the photoresist layer to form a blind hole mask. Page 17 1238032_ VI. Application for Patent Scope 9. The method for making a blind hole of a circuit board as described in item 8 of the patent application scope, wherein the step (b) above uses the blind hole mask as an etching mask. Hole-blind plate circuit electric dress making method with package method. Plate core nuclear conductance-Provide and guide blind core solid-as little as plate core nuclear conductance; the last plate β—, > Denuclear transfer electricity} The hole b C should be in the hole; the hole is exposed to expose the electric storm and the core is solid. The core and the core layer are electrically isolated from each other. 10% of the formed hole-shaped blind cd conductance and course formation are based on the layer conductance. The βτ entrance is removed, please apply for the hole-blind plate circuit as described in the French ^ Β. The upper part of the entrance is removed and its first shape is removed and the first shape is formed to thicken the plate conductance. The nuclear conductance is equal to the perforation of the perforation, and / or the perforation of the perforation ^ a. The perforation of the perforation is consistent; the first hole is consistently formed. Filled with dielectric material, the dielectric part is divided by the moving hole conduction-forming with the same ,, / / second Xuan = mouth full filling material conductivity and a •, the plate method of the hole blind plate circuit Narrative ： Item includes 1 package. First step.) 利 b / | \ 专 tf-ii 卩 上 Ψ, D 中士 其 Page 18 1238032_ VI. The scope of the patent application forms a photoresist layer on the conductive core board; transfers a blind hole pattern to the photoresist layer; uses the photoresist layer with a blind hole pattern as a mask and etch Removing a portion of the conductive core plate to form at least one solid conductive blind hole in the conductive core plate; and removing the photoresist layer. The electrical layer of the hole-blind board circuit with the encapsulation method is mostly made-• 一一 | This kind of layer conductance-the first one is to form and layer core nuclear dielectric 1 to provide blind conductance. • In fact, the layer is less conductive to one. The first layer is conductive on the electrical layer, the second conductive layer is the second one; the first layer is removed, and the second layer is moved. 'B C Myf \ / fv The electric hole route is the first one. The first layer is formed by the layer conductivity-the first one. Removal Xuan = Mouth cover Xuan = ° And the layer conductance and the edge of the layer, and the blind cover conductance layer of the overlying layer of the top cover. The three absolute centers are the first to form the shape} 露} 6 f C and C Combo layered blind cores and cores with conductive cores and pores routed to form the first layer of the third layer of the conductance of the third part β, stand 0 divided by 1 4. Make a multilayer circuit as described in item 13 of the scope of the patent application The method for plate blind holes, wherein the step (a) further includes: removing a part of the dielectric core layer and the first conductive layer to form a through hole penetrating the dielectric core layer and the first conductive layer; and (b Included in the step Page 19 1238032 Page 20