1376171 九、發明說明： 【發明所屬之技術領域】 本發明與電路板製造技術有關，尤其涉及在電路板内嵌 埋電子元件的技術。 【先前技術】 tt著電子積集化及微小化’對嵌埋電子元件於電 路板之要求與日倶增。 美國專利第6928726號揭露一種内埋電子元件之電路 板及製法。其中該電子元件之兩端電極係呈上下配置（直立 式）’並利用盲孔及錫球而與上、下線路層做「縱向電性連 通」。惟，直立式的電子元件本身高度高，加上縱向電性連 通結構，導致電路板整體厚度大幅提高，無法滿足薄型電路 板之要求。 為解決上述厚度增加之問題’美國專利第7242591號提 出一種「橫向電性連通」的電路板及製法。其中該電子元件 之兩端電極係呈左右配置（平躺式），並利用導電膏及導電 通孔而與相鄰的線路層做橫向導通。惟，為達成橫向電性連 通之目的’該製法包括：1)於一貫穿孔進行電鍍，以於其孔 壁上形成一鍍層；2)固定電子元件於該導電孔中；3)塗導電 嘗於該電子元件之兩側；以及4)切割及擴大該導電孔等諸 多繁複之製程。其中該切割之步驟僅在於造成連接該電子元 件的兩端電極的該鍵層形成開路，以免短路而無法動作。 61376171 IX. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to circuit board manufacturing technology, and more particularly to a technique of embedding electronic components in a circuit board. [Prior Art] tt With the accumulation and miniaturization of electrons, the demand for embedded electronic components on circuit boards has increased. U.S. Patent No. 6,928, 726 discloses a circuit board and a method of manufacturing an embedded electronic component. The electrodes at both ends of the electronic component are arranged vertically (upright) and are "longitudinally electrically connected" to the upper and lower circuit layers by blind holes and solder balls. However, the vertical electronic components themselves are highly high, and the vertical electrical connection structure results in a substantial increase in the overall thickness of the circuit board, which cannot meet the requirements of a thin circuit board. In order to solve the above problem of the increase in thickness, U.S. Patent No. 7,242,591 proposes a "transverse electrical connection" circuit board and a method of manufacturing the same. The electrodes of the two ends of the electronic component are disposed on the left and right sides (flat type), and are electrically connected to the adjacent circuit layers by using the conductive paste and the conductive vias. However, in order to achieve the purpose of lateral electrical communication, the method includes: 1) electroplating in a consistent perforation to form a plating layer on the wall of the hole; 2) fixing the electronic component in the conductive hole; 3) coating the conductive taste The two sides of the electronic component; and 4) cutting and expanding the conductive hole and many other complicated processes. The step of cutting only causes the key layer connecting the electrodes at both ends of the electronic component to form an open circuit to avoid short circuit and cannot operate. 6
f發明内容J 本發明提供一種嵌埋電子元 ^後述騎步H提供’之^^包括 表面有-金屬層，.且其板厚方向界丄==芯板 件之兩相對側各具有 貝穿孔。該電子元 該電子元件峡於該芯板$穿二，=—絕緣填充料將 電極係面對該芯板之貫穿孔的孔壁。每二件之端 面係外露於該貫穿孔的一孔口。二::電極頂部之-端 ί之貫穿孔的孔壁與該電子元件係 蓋住每i佳是覆 進行圖案化f程m 接考’對該芯板的金屬層 於該丄成一線路層。最後，形成-導電結構 輕電H電件之間，用以電性連接奴板之線路層 該電子70件之端電極頂部之該端面。 構二步述肢所製造的電路板，其結 該電件、緣填充層及—導電結構。 該；子線路層，且其板厚方向界定有-貫穿孔。 側各具有—端電 、，孔中。該电子讀之兩相對 的孔辟 /、中’各端電極係面對該芯板之貫穿孔 -二：：一個端電極頂部的一端面係外露於該貫穿孔的 雷子-杜填充層係填充於該芯板之貫穿孔的孔壁與該 的另間的間隙中，且較佳是覆蓋住每一個端電極底部 面。該導電結構係橋接該電子元件之端電極頂部之 該=及料板之線路層，以達成兩者之電性連接。 在本發明中，該電路板更包括H該阻層係形成於 i〇/01 /1 該芯板上，且界定有一開口以接收該導電結構。如此，該兩 端電極上的導電結構不致因為壓合過程中造成坍塌而形成 短路’導致低良率。 無論如何’本發明強調嵌埋電子元件於電路板内不會造 成厚度增加之負擔，且製程簡單。 至於本發明的其它發明内容與更詳細的技術及功效說 明’將揭露於隨後的說明。 【實施方式】 本發明方法係為一種製造嵌埋電子元件之電路板的方 法，其一較佳實施方式係顯示於第idO圖，其中指出該方 法包括隨後述及的步驟。 首先，如第1圖所不，提供一芯板（c〇re) i，其包括 一介電層20及兩金屬層10分別被覆於該介電層2〇之上、 下表面。該芯板1在其板厚方向界定有一貫穿孔1〇〇，該貫 穿孔100係貫穿該介電層20及金屬層1〇。在本例中，該芯 板1係一銅箔基板(Copper Clad ^血⑽㈣其表面覆有該些 金屬層10’但不限於此’例如可為一完成前處理之多層電 路板’其表面壓合具有金屬層的介電層。此外，該貫穿孔 100可藉由機械或雷射鑽孔以及沖模等方式加工成形。 接著，如第2圖所示，先將該芯板丨放置於黏貼有一可 剝離膠層31的一載板3上，續將欲嵌埋的一電子元件4置 入2芯板1的貫穿孔1〇〇中，並使該電子元件4黏置於位在 該貫穿孔100底面的可_移層31上。藉由該可剝離膠層 8 31 ’該電子元件4得以暫時地定位於該芯板〗的貫穿孔咖 中的適當位置。在本财，該可卿膠層31為—種雙面點 性不同且可重複黏貼的雙面㈣，但不限於此，舉凡雙面具 有錄或單面有黏性但可提供承載，且容易撕除之物體都 做為剝離層。其中’該雙面膠帶在黏貼該載板3之一側面的 黏性，高於黏貼該電子元件4及該芯板i之另一冑面，以方 便在後續步驟中將該可剝離膠層31連同該載板3 一併移除。 在本實施例中，該電子元件4為一晶片型元件，例如一 晶片型電容或電阻等’其多為扁平社兩相對侧各具有一端 電極41。如第2 ®所示，該電子元件4係水平地放置於該 貫穿孔100中’使得其端電極41的側面是面對該芯板！ ^ 貫穿孔100的孔壁101。 續參閱第3圖，係顯示利用_絕緣填充料，例如填充、、由 墨（Pi— ink)等’將該電子元件4固定於該芯板^ 貫穿孔1〇0中的步驟。首先，將該絕緣填充料填充於該芯板 1之貝穿孔10G中’使得該;^、板！之的孔壁i⑴與該電子元 件4之間的間隙佈滿該絕緣填充料。待該絕緣填充料固化 (⑽)後’即成為一絕緣填絲5 ’帛以將該電子元件 久性地固定於該芯板i之貫穿孔丨⑼中。其中，該絕緣殖充 料可顧纽方式、印刷方式、或其它方式填該貫穿孔 100 中。 〜只小村战电于兀件4固定於智 貫穿孔剛中的另-種作法。在第2八圖中，該芯板_ 穿孔動中預先填充-絕緣填充料。同時，在第沈圖中 1376171 該電子元件4係被暫時地定位於該可剥離膠層31及該載板 3上的適當位置。接著’將該載板3與該芯板i對位疊合(1吖 up)’並使付該黾子元件4恰置於該芯板1的貫穿孔中。 待該絕緣填充料5a固化(cure)後，即第3圖中所示的絕緣填 充層5，從而使得該電子元件1能永久性地固定於^工 之貫穿孔⑽中。藉由對位疊合的方式，可避免該電^元件 4邊緣產生空穴(void)現象，防止當進行高溫製程或可靠度 測試時產生爆板狀況。 & 接、第三® ’第4圖係顯示—併移除該可剝離膠層31 連同該載板3，得到下側裸露之基板。值得—提的是^曰由於 該電子元件1與該芯板丨之底面原先同受該載板3及該可剝 離朦層3丨的支撐而相互齊平。因此，在該可剝離师η ==電子元件4的底面係以與該芯板1 復將第4圖的整個基板上下顛倒（flip)放置，使得兮 電：與該芯板i齊平的面朝上，如第5圖所示： 二一二Γ編1面410係外露於該貫穿孔刚的 絕緣填充層；蓋t電極41底部的另一端面4U係被該 作業參:=== 及清潔電^件4及物^面孔⑽的部份，以 程以板行曝^顯影、⑽等圖案化製 ^板1表面的金屬層㈣刻形成具有線路圖 案的線路層l〇a。 參閱第續在邮w與該電子元件4 ί:電=6’用以電性連接該芯板1之的線路層二該 电70牛之4電極41之該端面_。在本例中，該導電 結構6可利用網板或鋼板’以印刷的 導〆 塗印在職騎置上_成1九圖糾 ^ 圖。如第九圖所示，本發明相較於先前技 術…、須進行切割之步驟，製程相對簡單。 、 圖，可再利用多層印刷電路製造技術，於 電:二聶力二各疊加一線路增層結構7,其包括-介 3二層73上的—線路層7ι，以及形成於 二的—導通結構72 ’且該導通結構72電性連 接至該心板！表面的線路層1〇a。又’該線路 面更形成-畴層74，且該轉層74表 複 孔，，俾以形成複數電性連接塾75於祕開:1 75係供電性連接其他導體元件(未顯示)，藉 2導體讀以電性連接其他電抒置。其中該線路增層結 構7可以如前述中地為多層結構’亦可為單層結構。 第11〜14®侧示本發明方法之另— 後段製造流程，其前段製造流程與第i至7圖相同，容^資 述。 在完成上述第7圖所示的步驟之後，接著如第Η圖所 不地於該芯板i表面塗佈的—絲像材料％ (_。也啡 materiai)，並進行圖案化製程以形成一阻層9， 圖 11 1376171 戶斤系。該阻層9界定有複數開口 90 ’以外露出該電子元件4 的端電極41的端面410,以及部份的該芯板i的線路層 l〇a。續利用一刮刀91將一導電膏92 (conductivepaste)填 入該些開口 90中。 ' 參閱第13圖並配合第12圖，待該開口 9〇中的該導電 膏92固化後，成為一導電結構6，用以電性連接該芯板工 之的線路層l〇a與該電子元件4。 續參閱第14圖’復於該第13圖的基板上下侧各疊加一 線路增層結構7，其類似於第10圖之結構，容不贅述。值 得一提的是，在本實施例中，該兩導電結構6中間係以該阻 層9相隔，且齊平，這對於後續之疊加之製程相當有助益。 該阻層9 一方面可作為多層電路板的介電層，另一方面可阻 隔該電子元件4上的兩導電結構6，以避免該兩導電結構6 在增層壓合的過程中坍塌，導致兩端.電極短路。 從上述說明中，可以理解到本發明之電路板的線路層與 其内埋之電子元件的兩端電極之間係藉由橫向導通者，不增 加該電路板之厚度。尤其是該導電結構與該絕緣填充層的空 間配置是經過精心設計的，使其製程相對簡單。 無論如何’任何人都可以從上述例子的說明獲得足夠教 導，並據而了解本發明内容確實不同於先前技術，且具有產 業上之利用性，及足具進步性。是本發明確已符合專利要 件，爰依法提出申請。 12 1376171 【圖式簡单說明】 第1-8及10圖，係顯示本發明嵌埋電子元件之電路板製 造流程之一實施例的剖面示意圖。 第2A及2B圖，係顯示第二圖的另一種實施態樣。 第9圖，係第8圖之結構的一俯視圖。 第11-14圖，係承接第七圖，顯示本發明嵌埋電子元件之 電路板製造流程之另一實施例的剖面示意 圖。 【主要元件符號說明】 1芯板 10金屬層 10a線路層 100貫穿孔 101孔壁 102 孔口 20介電層 3載板 31可剝離膠層 4電子元件 41端電極 410端面 411端面 5絕緣填充層 5a絕緣填充料 6導電結構 7線路增層結構 71線路層 72導通結構 73介電層 7 4防焊層 740開孔 75電性連接墊 9阻層 9 a光影像材料 90開口 91刮刀 13 1376171 92導電膏f SUMMARY OF THE INVENTION The present invention provides an embedded electron cell, which is described below, which provides a surface-with metal layer, and has a plate thickness direction 丄== two opposite sides of the core plate member each having a perforation of the shell . The electronic component is immersed in the core plate by two, and the insulating filler faces the wall of the through hole of the core plate. The end faces of each of the two pieces are exposed to an opening of the through hole. 2: The top of the electrode is at the end of the electrode. The wall of the through hole is covered with the electronic component. The pattern is f-type m. The metal layer of the core plate is formed into a circuit layer. Finally, a conductive layer is formed between the light and electric H-electrodes for electrically connecting the circuit layer of the slave board to the end surface of the top end of the 70-piece electron. The circuit board manufactured by the two-step description of the limbs is connected to the electric component, the edge filling layer and the conductive structure. The sub-circuit layer is defined by a through-hole. The sides each have a - terminal electric, and a hole. The two opposite holes of the electronic reading, the middle end electrode faces the through hole of the core plate - two: one end surface of one end electrode is exposed to the through hole of the Leizi-du filling layer system Filling the gap between the wall of the through hole of the core plate and the other, and preferably covering the bottom surface of each of the end electrodes. The conductive structure bridges the circuit layer of the top of the terminal electrode of the electronic component and the board to achieve electrical connection therebetween. In the present invention, the circuit board further includes H. The resist layer is formed on the core board of i〇/01 /1 and defines an opening to receive the conductive structure. Thus, the conductive structure on the two terminal electrodes does not cause a short circuit due to collapse during the pressing process, resulting in a low yield. In any case, the present invention emphasizes that the embedded electronic component does not cause a burden of thickness increase in the circuit board, and the process is simple. Other inventive aspects and more detailed technical and functional descriptions of the present invention will be disclosed in the following description. [Embodiment] The method of the present invention is a method of manufacturing a circuit board embedding an electronic component, and a preferred embodiment thereof is shown in the idO diagram, wherein the method includes the steps described later. First, as shown in Fig. 1, a core plate (i) is provided, which includes a dielectric layer 20 and two metal layers 10 respectively covering the upper and lower surfaces of the dielectric layer 2''. The core plate 1 defines a uniform through hole 1 in the thickness direction thereof, and the through hole 100 penetrates through the dielectric layer 20 and the metal layer 1〇. In this example, the core board 1 is a copper foil substrate (Copper Clad ^ blood (10) (4) whose surface is covered with the metal layers 10' but is not limited thereto, for example, it can be a pre-processed multilayer circuit board. A dielectric layer having a metal layer is formed. Further, the through hole 100 can be formed by mechanical or laser drilling, die, or the like. Next, as shown in FIG. 2, the core plate is first placed on the paste. On a carrier 3 of the peelable adhesive layer 31, an electronic component 4 to be embedded is placed in the through hole 1 of the 2-core board 1 and the electronic component 4 is stuck in the through hole. 100 can be on the bottom layer of the movable layer 31. The electronic component 4 can be temporarily positioned in the through hole of the core board by the peelable adhesive layer 8 31 '. The layer 31 is a double-sided (four) which is different in double-sided point and can be repeatedly pasted, but is not limited thereto, and the object which is viscous on both sides or which is viscous but can provide carrying and which is easy to tear off is used as the peeling. a layer in which the adhesive property of the double-sided tape adhered to one side of the carrier 3 is higher than that of the electronic component 4 and the other side of the core board i to facilitate the removal of the peelable adhesive layer 31 together with the carrier board 3 in a subsequent step. In this embodiment, the electronic component 4 is a wafer type component. For example, a wafer type capacitor or resistor, etc., which are mostly flat sides, have opposite end electrodes 41 on each of the opposite sides. As shown in the second ®, the electronic component 4 is horizontally placed in the through hole 100 such that its terminal electrode The side surface of 41 is facing the core plate! ^ The hole wall 101 of the through hole 100. Continuing to refer to Fig. 3, it is shown that the electronic component is filled with _insulating filler, for example, filled, ink (Pi-ink), etc. 4 is fixed in the core plate ^ through hole 1 〇 0. First, the insulating filler is filled in the shell hole 10G of the core plate 1 'so that the hole wall i (1) and the electron The gap between the components 4 is filled with the insulating filler. After the insulating filler is cured ((10)), it becomes an insulating filler wire 5' to permanently fix the electronic component to the through hole of the core plate i. In (9), the insulating material can be filled in through the way of printing, printing, or other means. Hole 100. ~ Only the small village battle electric is fixed in the wisdom through hole just another way. In the second eight figure, the core plate _ perforation is pre-filled with insulating filler. At the same time, In the first sinking diagram, 1761171, the electronic component 4 is temporarily positioned at the appropriate position on the peelable adhesive layer 31 and the carrier 3. Then, the carrier 3 is aligned with the core i (1吖Up) and placing the forceps element 4 in the through hole of the core board 1. After the insulating filler 5a is cured, that is, the insulating filling layer 5 shown in Fig. 3, thereby The electronic component 1 can be permanently fixed in the through hole (10) of the work. By means of the alignment of the alignment, the void phenomenon of the edge of the electrical component 4 can be avoided, and the high temperature process or the reliable process can be prevented. A bursting condition occurs during the degree test. And, the third ' Fig. 4 shows - and removes the peelable adhesive layer 31 together with the carrier 3 to obtain the underlying bare substrate. It is worth mentioning that since the electronic component 1 and the bottom surface of the core plate are originally flush with each other by the support of the carrier 3 and the peelable layer 3丨. Therefore, the bottom surface of the strippable member η == electronic component 4 is placed upside down with the core board 1 and the entire substrate of FIG. 4 is flipped so that the surface is flush with the core board i. Upward, as shown in Fig. 5: The second layer 410 of the second and second sides is exposed to the insulating filling layer of the through hole; the other end surface 4U of the bottom of the cover t electrode 41 is subjected to the operation parameter: === and The parts of the electric component 4 and the object (10) are cleaned to form a circuit layer l〇a having a line pattern by patterning the metal layer (4) on the surface of the board 1 by pattern development, (10), and the like. Referring to the continuation of the electronic component 4 ί: electricity = 6' for electrically connecting the core layer 1 of the circuit layer 2 of the electric electrode 70 of the 4 electrode 41 of the end face _. In this example, the conductive structure 6 can be printed on the locomotive by a screen or a steel plate using a printed guide. As shown in the ninth figure, the process of the present invention is relatively simple compared to the prior art. , Figure, reusable multi-layer printed circuit manufacturing technology, in the electricity: two Nie 2 two superimposed a line build-up structure 7, which includes - the 3 layer 73 on the line layer 7ι, and formed in the second - conduct Structure 72' and the conductive structure 72 is electrically connected to the core plate! The circuit layer of the surface is 1〇a. In addition, the line surface is further formed with a domain layer 74, and the layer 74 is formed with a plurality of holes 俾 75 to form a plurality of electrical connections 于 75 in the secret: 1 75 series power supply connection with other conductor elements (not shown), 2 conductor read to electrically connect other electrical devices. The line build-up structure 7 may be a multi-layer structure as described above, or may be a single-layer structure. The 11th to 14th side shows the other-stage manufacturing process of the method of the present invention, and the manufacturing process of the preceding stage is the same as that of the first to seventh figures. After the step shown in the above FIG. 7 is completed, the silk image material % (_.) is then coated on the surface of the core board i as shown in the figure, and a patterning process is performed to form a pattern. Resistive layer 9, Figure 11 1376171. The resist layer 9 defines an end surface 410 of the terminal electrode 41 exposing the electronic component 4 in addition to the plurality of openings 90', and a portion of the wiring layer l〇a of the core board i. A conductive paste 92 is filled into the openings 90 by means of a doctor blade 91. Referring to FIG. 13 and in conjunction with FIG. 12, after the conductive paste 92 in the opening 9 is cured, it becomes a conductive structure 6 for electrically connecting the wiring layer 10a of the core board and the electron. Element 4. Continuing to refer to Fig. 14, a line buildup structure 7 is superimposed on the upper and lower sides of the substrate of Fig. 13 and is similar to the structure of Fig. 10, and will not be described again. It is worth mentioning that in the present embodiment, the two conductive structures 6 are separated by the barrier layer 9 and are flush, which is quite helpful for the subsequent superimposed process. The resist layer 9 can serve as a dielectric layer of the multilayer circuit board on the one hand, and can block the two conductive structures 6 on the electronic component 4 on the other hand, so as to prevent the two conductive structures 6 from collapsing during the lamination process, resulting in Both ends. The electrode is shorted. From the above description, it can be understood that the circuit layer of the circuit board of the present invention and the electrodes at both ends of the embedded electronic component are laterally conductive, and the thickness of the circuit board is not increased. In particular, the spatial configuration of the electrically conductive structure and the insulative filling layer is carefully designed to make the process relatively simple. In any case, anyone can obtain sufficient instruction from the description of the above examples, and it is understood that the present invention is indeed different from the prior art, and is industrially usable and progressive. It is the invention that has indeed met the patent requirements and has filed an application in accordance with the law. 12 1376171 BRIEF DESCRIPTION OF THE DRAWINGS Figs. 1-8 and 10 are schematic cross-sectional views showing an embodiment of a circuit board manufacturing process for embedding electronic components of the present invention. Figures 2A and 2B show another embodiment of the second figure. Fig. 9 is a plan view showing the structure of Fig. 8. Figures 11-14 are cross-sectional schematic views showing another embodiment of a circuit board manufacturing process for embedding electronic components of the present invention. [Main component symbol description] 1 core board 10 metal layer 10a circuit layer 100 through hole 101 hole wall 102 hole 20 dielectric layer 3 carrier 31 peelable adhesive layer 4 electronic component 41 end electrode 410 end face 411 end face 5 insulation filling layer 5a Insulation Filler 6 Conductive Structure 7 Line Addition Structure 71 Line Layer 72 Conduction Structure 73 Dielectric Layer 7 4 Solder Mask 740 Opening 75 Electrical Connection Pad 9 Resistive Layer 9 a Light Image Material 90 Opening 91 Scraper 13 1376171 92 Conductive paste