TW548836B - Isolation of memory cells in cross point arrays - Google Patents

Isolation of memory cells in cross point arrays Download PDF

Info

Publication number
TW548836B
TW548836B TW091113803A TW91113803A TW548836B TW 548836 B TW548836 B TW 548836B TW 091113803 A TW091113803 A TW 091113803A TW 91113803 A TW91113803 A TW 91113803A TW 548836 B TW548836 B TW 548836B
Authority
TW
Taiwan
Prior art keywords
memory cell
region
gate oxide
patent application
pillar
Prior art date
Application number
TW091113803A
Other languages
English (en)
Chinese (zh)
Inventor
Frederick A Perner
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Application granted granted Critical
Publication of TW548836B publication Critical patent/TW548836B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/101Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
TW091113803A 2001-07-26 2002-06-24 Isolation of memory cells in cross point arrays TW548836B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/912,565 US6462388B1 (en) 2001-07-26 2001-07-26 Isolation of memory cells in cross point arrays

Publications (1)

Publication Number Publication Date
TW548836B true TW548836B (en) 2003-08-21

Family

ID=25432127

Family Applications (1)

Application Number Title Priority Date Filing Date
TW091113803A TW548836B (en) 2001-07-26 2002-06-24 Isolation of memory cells in cross point arrays

Country Status (7)

Country Link
US (1) US6462388B1 (ko)
EP (1) EP1280209B1 (ko)
JP (1) JP4316197B2 (ko)
KR (1) KR100890018B1 (ko)
CN (1) CN1400664A (ko)
DE (1) DE60238812D1 (ko)
TW (1) TW548836B (ko)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6740944B1 (en) 2001-07-05 2004-05-25 Altera Corporation Dual-oxide transistors for the improvement of reliability and off-state leakage
US6982901B1 (en) * 2003-01-31 2006-01-03 Hewlett-Packard Development Company, L.P. Memory device and method of use
US7132350B2 (en) * 2003-07-21 2006-11-07 Macronix International Co., Ltd. Method for manufacturing a programmable eraseless memory
US20050035429A1 (en) * 2003-08-15 2005-02-17 Yeh Chih Chieh Programmable eraseless memory
JP5015420B2 (ja) * 2003-08-15 2012-08-29 旺宏電子股▲ふん▼有限公司 プログラマブル消去不要メモリに対するプログラミング方法
US7002197B2 (en) * 2004-01-23 2006-02-21 Hewlett-Packard Development Company, L.P. Cross point resistive memory array
US7649496B1 (en) * 2004-10-12 2010-01-19 Guy Silver EM rectifying antenna suitable for use in conjunction with a natural breakdown device
KR100809724B1 (ko) * 2007-03-02 2008-03-06 삼성전자주식회사 터널링층을 구비한 바이폴라 스위칭 타입의 비휘발성메모리소자
US7846782B2 (en) * 2007-09-28 2010-12-07 Sandisk 3D Llc Diode array and method of making thereof
US7858506B2 (en) * 2008-06-18 2010-12-28 Micron Technology, Inc. Diodes, and methods of forming diodes
US8514637B2 (en) * 2009-07-13 2013-08-20 Seagate Technology Llc Systems and methods of cell selection in three-dimensional cross-point array memory devices

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR910001075B1 (ko) * 1988-08-30 1991-02-23 안종운 콘크리트 제조용 믹서기의 바켓트 장치
US5051796A (en) * 1988-11-10 1991-09-24 Texas Instruments Incorporated Cross-point contact-free array with a high-density floating-gate structure
JP3255942B2 (ja) 1991-06-19 2002-02-12 株式会社半導体エネルギー研究所 逆スタガ薄膜トランジスタの作製方法
JP3254072B2 (ja) 1994-02-15 2002-02-04 株式会社半導体エネルギー研究所 半導体装置の作製方法
US5446299A (en) * 1994-04-29 1995-08-29 International Business Machines Corporation Semiconductor random access memory cell on silicon-on-insulator with dual control gates
US5455791A (en) * 1994-06-01 1995-10-03 Zaleski; Andrzei Method for erasing data in EEPROM devices on SOI substrates and device therefor
US5751012A (en) * 1995-06-07 1998-05-12 Micron Technology, Inc. Polysilicon pillar diode for use in a non-volatile memory cell
US5693955A (en) 1996-03-29 1997-12-02 Motorola Tunnel transistor
US5714777A (en) * 1997-02-19 1998-02-03 International Business Machines Corporation Si/SiGe vertical junction field effect transistor
US5838608A (en) 1997-06-16 1998-11-17 Motorola, Inc. Multi-layer magnetic random access memory and method for fabricating thereof
US5991193A (en) 1997-12-02 1999-11-23 International Business Machines Corporation Voltage biasing for magnetic ram with magnetic tunnel memory cells
US6180444B1 (en) 1998-02-18 2001-01-30 International Business Machines Corporation Semiconductor device having ultra-sharp P-N junction and method of manufacturing the same
US6097625A (en) 1998-07-16 2000-08-01 International Business Machines Corporation Magnetic random access memory (MRAM) array with magnetic tunnel junction (MTJ) cells and remote diodes
US5940319A (en) 1998-08-31 1999-08-17 Motorola, Inc. Magnetic random access memory and fabricating method thereof
US6165803A (en) 1999-05-17 2000-12-26 Motorola, Inc. Magnetic random access memory and fabricating method thereof

Also Published As

Publication number Publication date
KR100890018B1 (ko) 2009-03-25
DE60238812D1 (de) 2011-02-17
JP4316197B2 (ja) 2009-08-19
CN1400664A (zh) 2003-03-05
JP2003110093A (ja) 2003-04-11
EP1280209B1 (en) 2011-01-05
KR20030010522A (ko) 2003-02-05
US6462388B1 (en) 2002-10-08
EP1280209A2 (en) 2003-01-29
EP1280209A3 (en) 2004-05-12

Similar Documents

Publication Publication Date Title
TWI451562B (zh) 操作具有氧化/氮化多層絕緣結構非揮發記憶胞之方法
TWI361489B (en) Transistor with independent gate structures
US7741188B2 (en) Deep trench (DT) metal-insulator-metal (MIM) capacitor
TWI334139B (en) Memory cell and method for forming the same
TWI302739B (en) Semiconductor memory, its fabrication process, its operation method and portable electronic equipment
TWI275176B (en) Semiconductor integrated circuit device and its manufacturing method
CN102315252B (zh) 共享源线的闪存单元及其形成方法
US8093107B1 (en) Thyristor semiconductor memory and method of manufacture
US8674332B2 (en) RRAM device with an embedded selector structure and methods of making same
TWI400799B (zh) 具有垂直二極體之積體電路
US8212309B2 (en) Non-volatile memory device and method of manufacturing same
TW548836B (en) Isolation of memory cells in cross point arrays
TW200847425A (en) Transistor, integrated circuit and method of forming an integrated circuit
TWI249756B (en) Method of fabricating bottle trench capacitors using an electrochemical etch with electrochemical etch stop
US9118008B2 (en) Field focusing features in a ReRAM cell
KR20080035579A (ko) 불연속 저장 요소들을 포함하는 전자 장치 형성 프로세스
CN107464808A (zh) 在与晶闸管相邻的沟槽中具有栅极的晶闸管存储器单元
TW200845300A (en) Semiconductor memory devices and methods for fabricating the same
CN102246312A (zh) 结场效应晶体管装置结构及其制作方法
CN106158868B (zh) 掩膜式只读存储阵列、其制作方法以及存储器的制作方法
TW552683B (en) Method for forming an SOI substrate, vertical transistor and memory cell with vertical transistor
EP2706581B1 (en) ReRAM device structure
CN110476248A (zh) 半导体存储元件、半导体存储装置、半导体系统和控制方法
TW201114020A (en) Memory cells, and methods of forming memory cells
CN106030715A (zh) 闸流晶体管易失性随机存取存储器及制造方法

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees