TW548805B - Element bonding substrate and its forming method - Google Patents

Element bonding substrate and its forming method Download PDF

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TW548805B
TW548805B TW091111482A TW91111482A TW548805B TW 548805 B TW548805 B TW 548805B TW 091111482 A TW091111482 A TW 091111482A TW 91111482 A TW91111482 A TW 91111482A TW 548805 B TW548805 B TW 548805B
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substrate
layer
solder
metal
bonding
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TW091111482A
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Chinese (zh)
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Hiroki Yokoyama
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Tokuyama Corp
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Abstract

The present invention provides a method for bonding an element with high bonding strength by soldering a metal electrode formed on a substrate of aluminum nitride, or the like, at a low temperature using soft solder metal having a low melting point, e.g. an Au-Sn based solder containing 20 weight percentage of gold. A metal layer of at least one kind of metal selected from a group of Ag, Cu, Ni and Pb is formed on a gold electrode layer formed on the surface of a substrate, and a layer of soft solder having a low melting point, e.g. an Au-Sn based solder containing 20 weight percentage of gold is formed on the metal layer, to form an element bonding substrate. An element having an electrode is mounted on the element bonding substrate such that the electrode touches the solder layer and then the element is reflow soldered.

Description

548805 A7 B7 五、發明説明（1 ) 【發明的技術領域】 本發明是關於接合、固定元件用之基板及其製造方法 〇 (請先閲讀背面之注意事項再填寫本頁) 【習知技術】 近年來’隨著行動電話及光通信等的普及，因陶瓷基 板之局頻介質損耗較小，故被使用爲安裝高頻帶域動作之 高輸出、高消耗電力的GaA S系FET、S i — Ge系 HBT、S i系MOSFET、或GaN系雷射二極管等 半導體兀件之基板。此陶瓷基板中，氮化鋁燒結體基板因 高導熱性、及接近半導體元件之熱膨脹常數而特別引人注 g。 通常，在氮化鋁燒結體等之陶瓷基板上接合元件時， 會以金屬薄膜化法（metallization)形成強固接合於陶瓷基 板上之第一及第二基體金屬層後，會在該基體金屬層上形 成金電極，然後將元件焊接於該金電極上（參照日本特開 平7 — 9 4 7 8 6號公報、日本特開平 1〇一 242 327公報、及日本特開 經濟部智慧財產局員工消費合作社印製 2000 — 2 8877〇號公報）。此時，一般會使用金 含量約8 0重量百分率、融點2 8 Ot：之Au— S η系焊 料（以下亦稱爲「多金（gold rich) A u — S η系焊料、楊 氏模量59 . 2GPa (25t時）」）。又，使用前多 金A u - S η系焊料之焊接方法，因可精密控制元件之配 置位置且容易自動化，故大多會採用熔解預先提供給基板 再進行接合的迴焊（reflow)法。 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐） -4 - 548805 A7 B7 五、發明説明（2 ) (請先閱讀背面之注意事項再填寫本頁) 所以，接合元件之基板’大多會採用在基板電極層上 之特定位置預先形成焊料膜者。例如，前述日本特開 2 0 〇 〇 — 2 8 8 7 7 0號公報所報告之基板’就是在陶 瓷基板上形成由基體層/N i電鍍層/A u電鍍層等所構 成之多層電極，且在該電極上層疊「最下層爲A u薄膜， A u薄膜上層疊擴散防止金屬層，該擴散防止金屬層上則 具有Au層及Sη層之交互層的多層焊料」，並指出可將 具有A u電極之半導體元件以充份之接合強度接合於該基 板上。該公報之說明中，針對前述多層焊料表不，整體之 A u及S η的重量比最好和熔融時之多金A u - S η系焊 料的組成相同，故最好以Au/Sn爲70/30〜76 /2 4之重量比實施Αία層及Sn層之層疊。且，前述擴 散防止金屬層的目的，是爲了防止A u電鍍層等電鍍時混 入之電鍍液導致孔隙及雜質的擴散、以及該層上之 A u S η多層焊料熔蝕基體之A u電鍍層，故在說明中指 明，最好採用白金族元素--尤其是P t做 構成該層之 金屬。 經濟部智慧財產局員工消費合作社印製 然而，近年來，半導體元件爲了提升記錄密度及資料 發射（electrical transmission)距離而追求高輸出化，使用 時，元件產生的熱量亦增大。此種發熱量之增大，代表使 用時溫度變化擴大，基板及元件之熱膨脹常數差所導致的 應力，可能造成接合部破壞之問題。而解決此種問題的方 法，爲（1 )使用更低融點之焊料實施低溫接合，焊接後 ，冷卻至室溫時儘量減小殘留於元件及基板間之接合部位 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） -5- 548805 Α7 Β7 五、發明説明（3 ) 應力的方法、以及（2 )使用具有緩和使用時溫度變化導 致接合部位發生之應力的柔軟焊料（軟焊料）方法等。 前述（1 )及（2 )之方法，低融點且柔軟之焊料^ (請先閱讀背面之注意事項再填寫本頁) 一例如，以A u — S η系焊料之錫含量爲8 0重量百分率 以上、融點2 8 CTC以下之低融點合金構成的焊料（以下 亦稱爲「多錫A u - S η系焊料」）應可實現。然而，當 實際在基板上形成之金電極層上形成由多錫A u - S η系 焊料構成之層並實施元件焊接時，卻發現焊料之融點上昇 、焊料之熔融特性變差等情形。發生此種現象之原因從圖 1所示之A u - S η合金狀態圖（摘自：「金屬臨時增刊 號實用二元合金狀態圖集」、株式會社A G U Ν Ε、 1992年1 0月10日發行、第92頁）可以得知，多 錫A u - S η系焊料層之製膜中、或製膜後之保存中，金 電極層中之金原子會擴散至該焊料層中，除了會變化成融 點較高之組成外，金電極及焊料之界面附近，會形成 A u S η2或A u S η4等具有脆弱性質之金屬化合物。 經濟部智慧財產局員工消費合作社印製 本發明者認爲，設置前述日本特開 2 000 — 2 88770號公報提出之擴散防止金屬層（ 以下稱爲金屬阻斷層），應可防止前述之金擴散（換言之 ’多錫A u — S η系焊料之金熔蝕），而在金電極層上設 置厚度2 //m之P t金屬阻斷層，在其上再形成多錫Au -S η系焊料膜層，並實施具有金電極之元件的焊接。結 果’融點上昇的情形獲得改善，焊料之熔融特性亦獲得提 升，然而，卻有接合強度較低的問題。亦即，以晶片切變 本紙張尺度適用中國國家標準（CNS ) Α4規格（210X297公釐） -6 - 548805 A7 __B7 ___ 五、發明説明（4 ) (請先閲讀背面之注意事項再填寫本頁) 強度測試機測量接合強度時，金屬阻斷層及焊料層間會產 生剝離，平均晶片抗切強度亦只有較低的1 . 4 k g f / mm2。 【發明之開示】 本發明之目的，是提供可以高接合強度接合焊料且表 面具有金電極層之元件接合用基板。 又，本發明之其他目的則是，提供利用如多錫A u -S η系焊料之低融點、柔軟焊料在低溫下實施元件之焊接 且其表面具有金電極層的元件接合用基板。 此，本發明之另一目的則是，提供可以高接合強度接 合焊料且表面具有金電極層之元件接合用基板製造方法。 本發明之其他目的如下列說明所示。 經濟部智慧財產局員工消費合作社印製 本發明針對前述問題進行仔細檢討。結果發現，在表 面形成之金電極層之基板的該金電極層上，設置由特定金 屬構成之金屬阻斷層，使用該基板並以多錫A u — S η系 焊料進行元件之焊接時，不但可以在低溫下實施焊接，亦 可具有高接合強度。所以，針對該結果更進一步進行檢討 ，發現不只使用多錫A u - S η系焊料具有此種效果，使 用金含量爲2 0重量百分率以下之I η系焊料亦具有相同 效果，終於完成本發明。 亦即，本專利申請之第一發明的特徵，就是表面有金 電極層之基板的該金電極層上’具有由Ag、C u、N i 、及Pb群中選取1種以上之金屬所構成之金屬層所層疊 本紙張尺度適用中國國家標準（CNS ) A4規格（210X29*7公釐） 548805 A7 B7 五、發明説明（5 ) 而成之層疊構造。 (請先閱讀背面之注意事項再填寫本頁) 本發明之元件接合用基板，使用以多錫A u - S η系 焊料等之S η或I η爲主要成份、且由金含量爲2 0重量 百分率以下之金屬所構成的焊料層，具有可以高接合強度 接合元件之特徵。前述本發明之元件接合用基板中，在以 氮化鋁爲主要成份之陶瓷基板上依序層疊以T i爲主要成 份之第一基體層、以P t爲主要成份之第二基體層、及由 金構成之電極層而形成之金屬化基板，並將其當做表面上 形成金電極層之基板使用者，其特徵則是不但接合元件時 之高頻介質損耗較小、且對當時產生之熱亦具有高散熱機 會巨^ 又，在前述由Ag、Cu、Ni 、及Pb群中選取1 種以上之金屬所構成之金屬層上，再層疊以S η或I η爲 主要成份且由金含量爲2 0重量百分率以下之金屬所構成 之焊料層，而具有此層疊構造之元件接合用基板，最適合 使用於迴焊上。又，形成焊料層之金屬，以S η或I η爲 主要成份，且金含量爲2 0重量百分率以下，2 之楊 經濟部智慧財產局員工消費合作社印製 氏模量爲5 0 G P a以下，且融點2 8 0 °C以下之元件接 合用基板，即使在接合元件之長期使用下，亦具有接合面 不易破壞之特徵。 同時’本專利申請之第二發明之特徵，就是在表面接 合著金電極層之基板的該金電極層上，形成由A g、C u 、Ni、及p b群中選取1種以上之金屬所構成之金屬層 的元件接合用基板製造方法。此製造方法中，在由A g、 本紙張尺度適用中國國家標準（CNS ) A4規格（210χ297公釐） -8- 548805 A7 B7 五、發明説明（6 ) (請先閱讀背面之注意事項再填寫本頁) C u、N i 、及Pb群中選取1種以上之金屬所構成之金 屬層上，形成以S η或I η爲主要成份、且由金含量爲 2 0重量百分率以下之金屬所構成的焊料層’亦可製造最 適合前述迴焊上之元件接合用基板。 又，本專利申請第三發明之元件接合用基板的特徵， 就是在前述適合迴焊使用之元件接合用基板的焊料層上， 將具有電極之元件以該電極接觸前述焊料層之方式配置後 ’實施迴焊。利用前述製造方法，可以實施如在2 8 0 °C 以下之低溫進行精度良好且有效之元件焊接。 其次，本專利申請第四發明，就是以前述方法製造之 元件接合用基板。本專利申請第四發明之元件接合用基板 ’可以獲得長期安定使用。 【發明之實施形態】 經濟部智慧財產局員工消費合作社印製 本發明之元件接合用基板具有層疊構造，此層疊構造 是在表面形成金電極層之基板的該金電極層上層疊由A g 、Cu、N i 、及Pb群中選取1種以上之金屬所構成之 金屬層。此時，元件是指具有可直接和其他電氣配線連接 之端子的電阻、或電容器等電子構件及半導體元件。 使用於本發明之元件接合用基板的「表面上形成金電 極層之基板」，只要其表面之一部份或全面形成具有電極 機能而由金構成之層的基板即可，並無特別限制。從接合 半導體元件使用時之高頻介質損耗較小的觀點來看，最好 使用以金屬薄膜化法在氮化鋁、氧化鋁、s i C 、S i等 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -9- 548805 A7 B7 五、發明説明（7 ) (請先閱讀背面之注意事項再填寫本頁) 之陶瓷基板上形成金電極的金屬化基板。又，在此種金屬 化基板上，一般會以直接或間接方式，在強固接合於陶瓷 基板之基體金屬層上形成前述金電極層，例如，氧化鋁基 板時，在氧化銘綠板（alumina green sheet )上印刷鎢或隹目 等高融點金屬膏構成之電極圖案，將該圖案和綠板同時燒 結後，必要時，在高融點金屬層狀上形成鎳層，然後再在 其上形成金電極。另外，以氮化鋁爲主要成份之陶瓷基板 ，在氮化鋁粉末添加燒結助劑並進行成形後，以噴鍍法等 在繞結後之基板表面形成基本上和電極圖案相同形狀、以 鈦爲主要成份之金屬層（第一基體層）後，又在該第一基 體層上以相同之噴鍍法等形成以白金爲主要成份之第二基 體層，然後，又在其上以噴鍍法等形成金電極層，所得到 之金屬化基板最適用。本發明之元件接合用基板中，從接 合元件使用時所產生之熱的放熱特性十分良好的觀點來看 ，利用前述方法所得之氮化銘系金屬化基板特別適用。 經濟部智慧財產局員工消費合作社印製 本發明之元件接合用基板，必須在前述金電極層上， 形成由Ag、Cu、Ni 、及Pb群中選取1種以上之金 屬所構成之金屬層。利用此金屬層之形成，在該層上形成 多錫A u - S η系焊料等低融點且柔軟焊料層並實施焊接 時，可以在低溫下實施焊接並獲得高接合強度。該金屬層 應具有前述金屬阻斷層相同之作用（所以，以下也該金屬 層稱爲阻斷層），然而，使用金屬阻斷層用之最常用金屬 ——白金時，則會因爲和使用之焊料金屬種類的關係而無 法獲得高強度接合。該阻斷層之厚度並無特別限定，從成 本紙張尺度適用中國國家標準·（CNS)A4規格（210X 297公釐） 548805 A7 B7 五、發明説明（8 ) (請先閱讀背面之注意事項再填寫本頁) 本效益觀點而言，以0 . 2〜5 // m較佳，若能爲1〜3 // m則最好。該層之厚度若小於0 . 2 // m則效果較差， 又，厚度爲5 // m以上則其效果和1〜3 // m時相似。 前述金屬層（阻斷層）只要是由Ag、Cu、N i 、 及P b群中選取1種以上之金屬所構成即可，並無特別限 定，可以由單一金屬種類構成，亦可由複數金屬構成之合 金、金屬化合物、或固溶體構成，從效果觀點而言，由 A g構成者爲最佳。又，阻斷層雖然沒有必要覆蓋在整個 金電極層，但至少在金電極層之元件接合部份、或和焊料 接觸部份應覆蓋阻斷層。前述金電極層上之阻斷層的形成 方法並未特別限定，例如，噴鍍法、離子電鍍法、蒸鍍法 、C V D法、電鍍法皆可。 經濟部智慧財產局員工消費合作社印製 本發明之元件接合用基板，在金電極層上形成前述阻 斷層之狀態下，在焊接時亦可提供焊料實施元件接合，然 而，爲了使元件能以良好精度接合於特定位置上，最好只 在阻斷層上之元件接合預定部位形成焊料層。利用此種形 態之基板（以下亦稱爲附焊料基板），可以精密控制元件 之載置位置，亦較容易實施自動化之迴焊。此時，雖然未 特別限定在阻斷層上形成之焊料層用的焊料，但以前述阻 斷層具有較高之效果、以及其本身較柔軟且可在低溫實施 焊接之觀點，最好使用以S η或I η爲主要成份、且由金 含量爲2 0重量百分率以下--尤其是1 0重量百分率以 下之金屬所構成的焊料。此種焊料之具體實例如前述多錫 A u — S η系焊料、S η 1 0 〇 %焊料、S η - A g焊料 本^氏張尺度適用中國國家標準（ CNS ) A4規格（210X297公釐） -11 - 548805 A7 __B7 五、發明説明（9 ) 、S η — P b 焊料、s η — B i 焊料、s η — S b 焊料、 S η — I n 焊料、I η 1 〇 〇 % 焊料、i n — β i 焊料、 (請先閲讀背面之注意事項再填寫本頁) 1 η - S b焊料、I n — Z n焊料、及其任意組合之焊料 等。 其中’ A u - S η系焊料以晶片切變強度測試機測量 之接合強度爲最咼而最適用。又，在本發明中，如前述之 以Sn或I η爲主要成份、且由金含量爲2〇重量百分率 以下之金屬所構成的焊料中，從使用於前述元件接合時之 溫度變化不易破壞接合部位的觀點，以融點2 8 0 t以下 --尤其是2 35°C以下、楊氏模量5 〇Gp a以下（ 2 5 C時）之金屬所構成之焊料爲最佳。 經濟部智慧財產局員工消費合作社印製 本發明之附焊料基板之前述焊料層，可以爲由單一組 成之金屬所構成之一層，又，各層熔融混合時，只要滿足 述條件之組成’由不同組成之金屬所構成之複數層的層疊 體亦可。該焊料層整體之厚度爲1〜1 〇//rn，最好爲2 〜6 // m。該層之厚度小於1 # ^時，因焊料之絕對量較 少，會呈現無法獲得充份接合強度之傾向，相反地，若超 過1 0 // m之厚度時，則因焊料量太多，接合後，會有焊 料可能覆蓋於元件之側面或上面（半導體元件時可能爲其 發光面）的問題。在前述阻斷層上形成由前述焊料所構成 之層的方法並未特別限定，例如，噴鍍法、離子電鍍法、 蒸鑛法、C V D法、電鍍法皆可。 將半導體元件等元件接合於本發明之元件接合用基板 上之方法並未特別限制，可以採用任何習知之焊接法，然 本紙張尺度適用中國國家標準（CNS ) A4規格（210XΜ?公釐） -12- 548805 A7 B7 五、發明説明（1〇 ) (請先閱讀背面之注意事項再填寫本頁) 而，爲了獲得有效且精度良好之接合，在附焊料基板— 本發明之元件接合用基板的焊料層上，載置具有電極之元 件並使該電極接觸前述焊料層後，最好能採用迴焊。所謂 迴焊，是預先對基板之特定區域上、構件電件、或其雙方 提供焊料，將構件固定於基板上之特定位置後’熔化焊料 使構件及基板接合之方法。在前述方法中’使焊料回流之 方法並無特別限制，可以利用回流帶之方法、利用熱板之 方法、氣相回流（vapor reflow )法等。又’加熱溫度及力口 熱時間可依據焊料之種類來決定，使用本發明之元件接合 用基板時，因爲不會損害使用之焊料特性，例如，使用多 錫A u - S η系焊料時，在2 8 0 °C以下之低溫亦可實施 良好之焊接。 經濟部智慧財產局員工消費合作社印製 又，焊接之元件只要具有可以利用焊料進行接合之金 屬所構成的電極即可，並未特別限定。一般半導體元件時 ，大多以金構成前述電極。對具有金電極之元件實施焊接 時，雖然金電極之金原子可能擴散至焊料，然而，如後面 之實施例所示，因焊接具有金電極之元件時仍具有高接合 強度，故此時發生之擴散對接合強度應無太大影響。然而 ，爲了更進一步防止此種金原子擴散，最好從A g、C u 、Ni 、及P b群中選取1種以上之金屬——尤其是> A g 覆蓋於和焊料接觸之元件的電極表面。 【實施例】 本紙張尺度適用中國國家標準（CNS )八4規格（210X297公釐） -13- 548805 A7 B7 五、發明説明（11 ) 實施例1 (請先閱讀背面之注意事項再填寫本頁) 依下述方法製作圖2所示之構造的元件接合用基板。 又’圖2爲本發明具代表性之元件接合用基板1 〇 〇的咅[j 面圖’其構造上’在氮化鋁燒結體基板2 〇 1上，依序層 疊以T i爲主要成份之第一基體層2 〇 2、以白金爲主要 成份之第二基體層2 0 3、及金電極層2 0 4而形成基板 2 0 0 ’在此基板200之金電極層上，再層積由銀等金 屬構成之阻斷層3 0 〇、及S η系或I η系且金含量爲 2 0重量百分率以下之金屬所構成之焊料層。 首先’在氮化鋁燒結體基板（5 0 · 8 m m X 5 〇· 8mmX〇 . 3mmt (株）TOKUYAMA 製 經濟部智慧財產局員工消費合作社印製 )之表面’利用噴鍍裝置以噴鍍法依序形成厚度〇 · 〇 6 //m且以T i爲主要成份之第一基體層、厚度〇 . 2//m 且以白金爲主要成份之第二基體層2 0 3、及厚度0 . 6 //m之金電極層。然後，利用真空蒸鍍裝置在前述金電極 層上形成厚度2 //m、由Ag膜所構成之阻斷層，接著， 以同時使用A u及S η之蒸鍍法，形成由金含量1 〇重量 百分率、Au — Sn合金（融點2 1 及楊氏模量 45 . OGP a (25°C時））所構成之厚度5//m的目 標焊料層，製成本發明之元件接合用基板。其次，在利用 此方式製成之元件接合用基板的焊料層上，載置具有A u 電極之半導體元件，使用晶片接合機實施2 5 0 °C、3 0 秒接合，製成兀件接合基板。 製作1 0個相同之元件接合基板，利用晶片切變強度 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -14- 經濟部智慧財產局員工消費合作社印製 548805 A7 B7 五、發明説明（12 ) 測試機（I M A D A公司製）測量接合強度，平均接合強 度爲2 · 8 k g f / 111 m 2，剝離模式全部在焊料內（各層 間沒有剝離，只有焊料層因破壞而剝離）° 實施例2 除了使用I η (融點1 5 6 °C及楊氏模量1 2 . 7 G P a ( 2 5 °C時））之蒸鍍法形成厚度5 // m的目標焊 料層以外，其餘和實施例1相同’製成本發明之元件接合 用基板，其次，除了接合溫度爲2 1 0 °C以外，其他和實 施例1相同，製成之元件接合基板。同樣製作1 0個相同 之元件接合基板，並和實施例1相同，測量接合強度，其 平均接合強度爲2 · 5 k g f /m m 2，剝離模式全部在焊 料內。 實施例3 除了將阻斷層之材質由A g改變成表1所示金屬以夕和 ，其餘和實施例1相同，製成本發明之元件接合用基板， 並和實施例1相同，測量接合強度，其結果如表1所示。 實施例4 除了將阻斷層之膜厚改變成表1所示之膜厚以外，其 餘和實施例1相同，製成本發明之元件接合用基板及元件 接合基板，並和實施例1相同，測量接合強度，其結果如 表1所示。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) 一裝· 訂 -15- 548805 A7 B7 五、發明説明（13 ) 實施例5 除了將阻Wf層之膜厚改變成表1所示之膜厚以外，其 餘和實施例1相同’製成本發明之元件接合用基板及元件 接合基板，並和實施例1相同，測量接合強度，其結果如 表1所示。 比較例1 除了將未設置阻斷層以外，其餘和實施例1相同，製 成元件接合用基板及元件接合基板，測量接合強度。其結 果如表1所示。如表1所示，未設阻斷層時，平均接合強 度爲0.8kgf/mm2。 比較例2 除了將阻斷層之材質從A g改變爲P t以外，其餘和 實施例1相同，製成元件接合用基板及元件接合基板，測 量接合強度，其結果如表1所示。如表1所示，雖然設置 阻斷層，但其材質不是本發明之特定金屬時，平均接合強 度只有1·4kgf/mm2。 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ------1---壯衣-- (請先閲讀背面之注意事項再填寫本頁}548805 A7 B7 V. Description of the Invention (1) [Technical Field of the Invention] The present invention relates to a substrate for bonding and fixing components and a method for manufacturing the same. (Please read the precautions on the back before filling this page) [Knowledge Technology] In recent years, with the popularization of mobile phones and optical communications, ceramic substrates have relatively low local frequency dielectric losses, so they are used to install high-output, high-power GaA S-based FETs and S i — Ge-based HBT, Si-based MOSFET, or GaN-based laser diodes. Among these ceramic substrates, the aluminum nitride sintered body substrate is particularly attractive due to its high thermal conductivity and thermal expansion constant close to that of semiconductor devices. Generally, when a device is bonded to a ceramic substrate such as an aluminum nitride sintered body, the first and second base metal layers which are strongly bonded to the ceramic substrate are formed by metallization, and then the base metal layer is formed on the base metal layer. A gold electrode is formed on the electrode, and then the component is soldered to the gold electrode (refer to Japanese Patent Application Laid-Open No. 7-9 4 7 8 6; Japanese Patent Application Laid-Open No. 10-242 327; and Intellectual Property Bureau of Japanese Patent Office of the Ministry of Economic Affairs staff consumption Cooperatives published Bulletin 2000-287870). At this time, Au—S η-based solder with a gold content of about 80% by weight and a melting point of 2 8 Ot (hereinafter also referred to as “gold rich” Au—S η-based solder, Young ’s mold 59.2 GPa (at 25t) "). In addition, the soldering method using the Au-Sn-based solder before use can precisely control the placement of the components and is easy to automate. Therefore, the reflow method is often used in which the substrate is previously melted and then bonded. This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) -4-548805 A7 B7 V. Description of the invention (2) (Please read the precautions on the back before filling this page) Therefore, the substrate of the bonding component ' In many cases, a solder film is formed in advance at a specific position on a substrate electrode layer. For example, the substrate 'reported in the aforementioned Japanese Patent Laid-Open No. 2000-878-8770 is to form a multilayer electrode composed of a base layer / Ni plating layer / Au plating layer on a ceramic substrate, And on the electrode, "the bottom layer is an Au film, and a diffusion preventing metal layer is laminated on the Au film, and the multilayer anti-diffusion metal layer has a multilayer solder with an interactive layer of an Au layer and an Sη layer." The semiconductor element of the Au electrode is bonded to the substrate with sufficient bonding strength. In the description of this bulletin, for the multilayer solder described above, the weight ratio of Au and S η as a whole is preferably the same as that of the Au-S η-based solder at the time of melting. Therefore, Au / Sn is preferably used as A weight ratio of 70/30 to 76/2 4 is used to laminate the Αα layer and the Sn layer. In addition, the purpose of the above-mentioned diffusion preventing metal layer is to prevent the diffusion of pores and impurities caused by the plating solution mixed in the plating such as the Au plating layer, and the Au plating layer of the Au S η multilayer solder erosion substrate on the layer. Therefore, it is indicated in the description that it is best to use platinum group elements-especially P t as the metal constituting this layer. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. However, in recent years, semiconductor devices have been pursuing high output in order to increase the recording density and data transmission distance (electrical transmission distance). When used, the heat generated by the devices also increases. Such an increase in the amount of heat generation means that the temperature change during use is enlarged, and the stress caused by the difference in thermal expansion constant between the substrate and the component may cause the problem of damage to the joint. The method to solve this problem is to (1) use a lower melting point solder to perform low-temperature bonding. After soldering, cool to room temperature to minimize the remaining parts between the component and the substrate. This paper applies Chinese national standards. (CNS) A4 specification (210X 297 mm) -5- 548805 A7 B7 V. Description of the invention (3) Method of stress and (2) Use of soft solder (soft Solder) method, etc. The above (1) and (2) methods, low melting point and soft solder ^ (Please read the precautions on the back before filling this page)-For example, the tin content of A u — S η solder is 80 weight Solder composed of low melting point alloys above the percentage and having a melting point of 2 8 CTC (hereinafter also referred to as "multi-tin Au-S η-based solder") should be achievable. However, when a layer consisting of a multi-tin Au-S η-based solder was actually formed on the gold electrode layer formed on the substrate and the component was soldered, it was found that the melting point of the solder rose and the melting characteristics of the solder deteriorated. The reason for this phenomenon is shown in the state diagram of Au-S η alloy shown in Figure 1 (extracted from "Atlas of Metal Temporary Supplementary Practical Binary Alloy State", AGU Ν Ε Corporation, October 10, 1992 (Issue, p. 92). It can be known that gold atoms in the gold electrode layer will diffuse into the solder layer during the film formation of the multi-tin Au-S η-based solder layer or during storage after film formation. In addition to changing the composition with a higher melting point, fragile metal compounds such as Au S η2 or Au S η4 will be formed near the interface between the gold electrode and the solder. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the inventor believes that the provision of the diffusion prevention metal layer (hereinafter referred to as the metal blocking layer) proposed in the aforementioned Japanese Patent Laid-Open No. 2 000-2 88770 should prevent the aforementioned gold Diffusion (in other words, gold ablation of the multi-tin Au — S η solder), and a P t metal blocking layer with a thickness of 2 // m is provided on the gold electrode layer, and a multi-tin Au -S η is formed thereon. It is a solder film layer and performs soldering of a component having a gold electrode. As a result, the situation where the melting point rises is improved, and the melting characteristics of the solder are also improved. However, there is a problem that the joint strength is low. That is, the paper size of the chip is applied to the Chinese National Standard (CNS) A4 specification (210X297 mm) -6-548805 A7 __B7 ___ 5. Description of the invention (4) (Please read the precautions on the back before filling this page ) When the strength tester measures the bonding strength, peeling occurs between the metal blocking layer and the solder layer, and the average chip shear strength is only 1.4 kgf / mm2. [Disclosure of Invention] An object of the present invention is to provide a substrate for element bonding which can bond solder with high bonding strength and has a gold electrode layer on the surface. Another object of the present invention is to provide a substrate for element bonding in which a component is soldered at a low temperature by using a low-melting point, soft solder such as a polytin Au-Sn-based solder, and having a gold electrode layer on its surface. Then, another object of the present invention is to provide a method for manufacturing a substrate for element bonding which can bond solder with high bonding strength and has a gold electrode layer on the surface. Other objects of the present invention are as described in the following description. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economics The present invention carefully reviews the aforementioned issues. As a result, it was found that, on the gold electrode layer of the substrate of the gold electrode layer formed on the surface, a metal blocking layer made of a specific metal was provided, and when the substrate was soldered using a multi-tin Au-S η-based solder, Not only welding can be performed at low temperatures, but also high bonding strength. Therefore, based on this result, we further reviewed and found that not only the use of a multi-tin Au-S η-based solder has such an effect, but also the use of an I η-based solder with a gold content of 20% by weight or less has the same effect, and finally completed the present invention . That is, the feature of the first invention of the present patent application is that the gold electrode layer on the substrate having a gold electrode layer on the surface has a structure consisting of one or more metals selected from the group consisting of Ag, Cu, Ni, and Pb. The metal layer of this paper is laminated in accordance with the Chinese National Standard (CNS) A4 specification (210X29 * 7mm) 548805 A7 B7 5. The laminated structure formed by the description of the invention (5). (Please read the precautions on the back before filling in this page.) The substrate for component bonding of the present invention uses S η or I η with polytin Au-S η-based solders as the main component and has a gold content of 20. A solder layer made of a metal with a weight percentage or less has a feature that a component can be bonded with high bonding strength. In the aforementioned element bonding substrate of the present invention, a first substrate layer mainly composed of Ti, a second substrate layer mainly composed of Pt, and a ceramic substrate mainly composed of aluminum nitride are sequentially stacked on the ceramic substrate mainly composed of aluminum nitride, and A metallized substrate formed by an electrode layer made of gold and used as a substrate user who forms a gold electrode layer on the surface. It is characterized by not only a small high-frequency dielectric loss when joining components, but also the heat generated at that time. It also has a great opportunity for heat dissipation ^ In addition, on the aforementioned metal layer composed of one or more metals selected from the group consisting of Ag, Cu, Ni, and Pb, a layer containing S η or I η as the main component and composed of gold content is further laminated. It is a solder layer made of a metal with a weight percentage of 20% or less, and a component bonding substrate having this laminated structure is most suitable for reflow soldering. In addition, the metal forming the solder layer has S η or I η as the main component, and the gold content is less than 20 weight percent. The printed modulus of the consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs of the Ministry of Economic Affairs is 50 GP a or less. And, the substrate for component bonding with a melting point below 280 ° C has the feature that the bonding surface is not easy to break even under long-term use of the bonding component. At the same time, a feature of the second invention of this patent application is that on the gold electrode layer on which the gold electrode layer is bonded on the surface, a metal group selected from the group consisting of Ag, Cu, Ni, and pb is formed. A method for manufacturing a substrate for element bonding of the constituent metal layers. In this manufacturing method, the Chinese national standard (CNS) A4 specification (210 x 297 mm) is applied to the paper size of Ag, and this paper size is 548-805805 A7 B7. 5. Description of the invention (6) (Please read the precautions on the back before filling (This page) On a metal layer composed of one or more metals selected from the C u, Ni, and Pb groups, a metal layer containing S η or I η as the main component and having a gold content of 20% by weight or less is formed. The structured solder layer can also produce a substrate for component bonding that is most suitable for the aforementioned reflow. In addition, a feature of the element bonding substrate of the third invention of the present patent application is that a component having an electrode is disposed on the solder layer of the component bonding substrate suitable for reflow, such that the electrode contacts the solder layer. Implement reflow. With the aforementioned manufacturing method, it is possible to perform high-precision and effective component soldering at a low temperature of less than 280 ° C. Next, the fourth invention of this patent application is a substrate for element bonding manufactured by the aforementioned method. The substrate for element bonding of the fourth invention of this patent application can be used stably for a long time. [Embodiment of the Invention] The substrate for element bonding of the present invention printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs has a laminated structure, and the laminated structure is formed by laminating Ag, A metal layer made of one or more metals selected from the group of Cu, Ni, and Pb. In this case, an element refers to an electronic component such as a resistor or a capacitor having a terminal that can be directly connected to other electrical wiring, or a semiconductor element. The "substrate on which a gold electrode layer is formed on the surface" used for the element bonding substrate of the present invention is not particularly limited as long as a part or the entire surface of the substrate is formed with a layer composed of gold having an electrode function. From the standpoint of low-frequency dielectric loss when joining semiconductor components, it is best to use the metal thin film method to apply Chinese National Standards (CNS) to paper standards such as aluminum nitride, aluminum oxide, si C, and Si. A4 specification (210X297 mm) -9- 548805 A7 B7 V. Description of the invention (7) (Please read the precautions on the back before filling this page) Metallized substrate with gold electrodes on the ceramic substrate. In addition, on such a metallized substrate, the aforementioned gold electrode layer is generally formed directly or indirectly on a base metal layer firmly bonded to a ceramic substrate. For example, when an alumina substrate is used, an alumina green plate (alumina green) is used. sheet) is printed with an electrode pattern made of a high melting point metal paste such as tungsten or osmium, and after sintering the pattern and the green plate at the same time, a nickel layer is formed on the high melting point metal layer if necessary, and then formed thereon Gold electrode. In addition, for ceramic substrates containing aluminum nitride as the main component, sintering aids are added to the aluminum nitride powder and shaped, and then the surface of the substrate after sintering is formed by spraying or the like to have a shape substantially the same as that of the electrode pattern. After the metal layer (the first substrate layer) as the main component, a second substrate layer with platinum as the main component is formed on the first substrate layer by the same spraying method, etc., and then spray-plated thereon. The gold electrode layer is formed by the method, and the obtained metallized substrate is most suitable. Among the substrates for element bonding of the present invention, the nitrided metallized substrates obtained by the aforementioned method are particularly suitable from the viewpoint that the heat radiation characteristics of the heat generated when the bonded elements are used are very good. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the element bonding substrate of the present invention must form a metal layer composed of one or more metals selected from the group consisting of Ag, Cu, Ni, and Pb on the aforementioned gold electrode layer. When this metal layer is formed and a low-melting point and soft solder layer such as a polytin Au-S η-based solder is formed on the layer and soldering is performed, soldering can be performed at a low temperature and high joint strength can be obtained. The metal layer should have the same function as the aforementioned metal blocking layer (henceforth, this metal layer is also referred to as the blocking layer). However, when the most common metal used for the metal blocking layer-platinum, is used because Because of the type of solder metal, high-strength joints cannot be obtained. The thickness of the blocking layer is not particularly limited. From the paper size, the Chinese national standard (CNS) A4 specification (210X 297 mm) is applied. 548805 A7 B7 V. Description of the invention (8) (Please read the precautions on the back first) (Fill in this page) From the standpoint of benefit, 0.2 ~ 5 // m is better, and 1 ~ 3 // m is better. If the thickness of the layer is less than 0.2 // m, the effect is poor, and if the thickness is 5 // m or more, the effect is similar to that of 1 to 3 // m. The metal layer (blocking layer) is not particularly limited as long as it is composed of one or more metals selected from the group consisting of Ag, Cu, Ni, and Pb, and may be composed of a single metal species or a plurality of metals. The composition of the alloy, metal compound, or solid solution is most preferably composed of Ag. In addition, although the blocking layer does not necessarily cover the entire gold electrode layer, at least the element bonding portion of the gold electrode layer or the portion in contact with the solder should cover the blocking layer. The method for forming the blocking layer on the gold electrode layer is not particularly limited, and for example, a thermal spraying method, an ion plating method, a vapor deposition method, a CVD method, or a plating method may be used. The consumer property cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs printed the component bonding substrate of the present invention, and in the state where the aforementioned blocking layer is formed on the gold electrode layer, solder can also be provided for component bonding during soldering. Bonding with good accuracy to a specific position, it is best to form a solder layer only on the part where the element on the blocking layer is to be bonded. With this type of substrate (hereinafter also referred to as a solder-attached substrate), the placement of components can be precisely controlled, and automated reflow can be easily performed. At this time, although the solder for the solder layer formed on the blocking layer is not particularly limited, from the standpoint that the blocking layer has a high effect and that it is relatively soft and can be soldered at a low temperature, it is preferable to use S η or I η is a solder composed mainly of a metal having a gold content of 20% by weight or less-especially 10% by weight or less. Specific examples of such solders are the aforementioned multi-tin Au-S η-based solders, S η 100% solders, and S η-A g solders. The standard dimensions of this solder apply to the Chinese National Standard (CNS) A4 specification (210X297 mm). ) -11-548805 A7 __B7 V. Description of the invention (9), S η — P b solder, s η — B i solder, s η — S b solder, S η — I n solder, I η 1 〇〇% solder , In — β i solder, (Please read the notes on the back before filling this page) 1 η-S b solder, I n — Z n solder, and any combination of solders. Among them, the bonding strength of the 'A u -S η-based solder measured by a wafer shear strength tester is the heaviest and most suitable. Further, in the present invention, as described above, the solder containing Sn or I η as a main component and composed of a metal having a gold content of 20% by weight or less is unlikely to break the joint from the temperature change during the jointing of the element. From the point of view of the part, a solder composed of a metal having a melting point of 280 t or less, especially 2 35 ° C or less, and a Young's modulus of 50 Gp a or less (at 25 C) is the best. The aforementioned solder layer of the solder substrate with the present invention printed by the employee's consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs may be a layer composed of a single metal, and when the layers are melted and mixed, as long as the conditions described above are satisfied, the composition is composed of different A laminate of a plurality of layers made of metal may be used. The thickness of the entire solder layer is 1 to 1 〇 // rn, preferably 2 to 6 // m. When the thickness of this layer is less than 1 # ^, the absolute amount of solder will tend to fail to obtain sufficient bonding strength. Conversely, if the thickness exceeds 1 0 // m, the amount of solder will be too much. After bonding, there is a problem that the solder may cover the side or the top of the device (which may be the light-emitting surface of a semiconductor device). A method for forming a layer made of the solder on the blocking layer is not particularly limited, and for example, a thermal spraying method, an ion plating method, a vapor deposition method, a CVD method, or a plating method may be used. The method for bonding components such as semiconductor components to the substrate for component bonding of the present invention is not particularly limited, and any conventional soldering method can be used. However, this paper size applies to the Chinese National Standard (CNS) A4 specification (210XM? Mm)- 12- 548805 A7 B7 V. Description of the invention (10) (Please read the precautions on the back before filling this page). In order to obtain effective and high-precision bonding, After a component having an electrode is placed on the solder layer and the electrode is brought into contact with the aforementioned solder layer, reflow soldering is preferably used. The so-called re-soldering is a method in which solder is provided in advance on a specific area of a substrate, component electrical parts, or both, and the component is fixed at a specific position on the substrate. The solder is melted to bond the component and the substrate. Of the foregoing methods, the method of reflowing the solder is not particularly limited, and a method using a reflow tape, a method using a hot plate, a vapor reflow method, or the like can be used. In addition, the heating temperature and the heating time can be determined according to the type of solder. When using the element bonding substrate of the present invention, the characteristics of the solder used will not be impaired. For example, when using a multi-tin Au-S η solder, Good welding can also be performed at low temperatures below 280 ° C. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. The soldered components are not particularly limited as long as they have electrodes made of metal that can be joined by solder. In the case of a general semiconductor device, the electrodes are often made of gold. When welding a component with a gold electrode, although the gold atoms of the gold electrode may diffuse to the solder, as shown in the following examples, because the component with the gold electrode still has high bonding strength when welding, the diffusion occurs at this time. It should not have much effect on joint strength. However, in order to further prevent such gold atom diffusion, it is best to select more than one metal from the groups Ag, Cu, Ni, and Pb--especially > Ag covering the components in contact with the solder Electrode surface. [Example] This paper size is applicable to Chinese National Standard (CNS) 8-4 specification (210X297 mm) -13- 548805 A7 B7 V. Description of the invention (11) Example 1 (Please read the precautions on the back before filling this page ) A substrate for element bonding having a structure shown in FIG. 2 was produced by the following method. FIG. 2 is a schematic view of the element bonding substrate 100 of the present invention. [J Plan view 'on the structure' is laminated on the aluminum nitride sintered body substrate 2 in order, with Ti as the main component. The first substrate layer 2 0 2, the second substrate layer 2 3 with platinum as the main component, and the gold electrode layer 2 0 4 form a substrate 2 0 'on the gold electrode layer of the substrate 200, and then laminated A solder layer composed of a barrier layer 300 composed of a metal such as silver, and a metal of S η-based or I η-based and having a gold content of 20% by weight or less. First, "the surface of an aluminum nitride sintered body substrate (printed by an employee consumer cooperative of the Intellectual Property Bureau, Ministry of Economic Affairs, TOKUYAMA Co., Ltd., 50.8 mm X 5 0.8 mm 0.3 mm) was spray-coated by a spraying method. A first base layer with a thickness of 0.06 // m and T i as the main component, a second base layer with a thickness of 0.2 // m and a main component with platinum as the main component, and a thickness of 0. 6 // m gold electrode layer. Then, a vacuum deposition device is used to form a blocking layer made of Ag film with a thickness of 2 // m and an Ag film on the gold electrode layer. Then, an Au and S η evaporation method is used to form a gold content of 1 〇Weight percentage, target solder layer with thickness of 5 // m composed of Au—Sn alloy (melting point 2 1 and Young's modulus 45. OGP a (at 25 ° C)), to form the substrate for element bonding of the present invention . Next, a semiconductor element having an Au electrode was placed on the solder layer of the element bonding substrate produced in this way, and the wafer bonding machine was used to perform bonding at 250 ° C and 30 seconds to prepare a component bonding substrate. . Make 10 identical component bonding substrates and use the shear strength of the wafer. The paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm). -14- Printed by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economic Affairs 548805 A7 B7 5. Description of the Invention (12) A testing machine (made by IMADA) measures the bonding strength, the average bonding strength is 2 · 8 kgf / 111 m 2, and the peeling mode is all in the solder (there is no peeling between the layers, only the solder layer peels off due to damage) ° Example 2 Except that a target solder layer having a thickness of 5 // m was formed using an evaporation method of I η (melting point 1 56 ° C and Young's modulus 1 2 7 GP a (at 25 ° C)), The rest is the same as in Example 1, and the element bonding substrate of the present invention is fabricated. Secondly, the element bonding substrate is the same as that of Example 1, except that the bonding temperature is 210 ° C. Ten identical element bonding substrates were fabricated in the same manner as in Example 1, and the bonding strength was measured. The average bonding strength was 2.5 kg f / m m 2 and the peeling mode was all in the solder. Example 3 Except that the material of the blocking layer was changed from Ag to the metals shown in Table 1, the rest was the same as in Example 1. A substrate for element bonding according to the present invention was prepared, and the bonding strength was measured in the same manner as in Example 1. The results are shown in Table 1. Example 4 Except that the film thickness of the blocking layer was changed to the film thickness shown in Table 1, the rest was the same as in Example 1, and the element bonding substrate and the element bonding substrate of the present invention were prepared and the same as in Example 1, and measured. The results of the bonding strength are shown in Table 1. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling out this page) One Pack · Order -15- 548805 A7 B7 V. Description of Invention (13) Example 5 Except that the film thickness of the resist Wf layer was changed to the film thickness shown in Table 1, the same as in Example 1 was used to prepare the element bonding substrate and the element bonding substrate of the present invention, and the bonding strength was measured in the same manner as in Example 1. The results are shown in Table 1. Comparative Example 1 A substrate for element bonding and a component bonding substrate were produced in the same manner as in Example 1 except that a blocking layer was not provided, and the bonding strength was measured. The results are shown in Table 1. As shown in Table 1, when no blocking layer is provided, the average bonding strength is 0.8 kgf / mm2. Comparative Example 2 Except that the material of the blocking layer was changed from Ag to Pt, the substrate was fabricated in the same manner as in Example 1, and a substrate for element bonding was fabricated. The bonding strength was measured. Table 1 shows the results. As shown in Table 1, although the barrier layer is provided, when the material is not a specific metal of the present invention, the average joint strength is only 1.4 kgf / mm2. This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) ------ 1 --- Zhuang Yi-- (Please read the precautions on the back before filling this page}

-1T 經濟部智慧財產局員工消費合作社印製 -16- 548805 A7 B7 五、發明説明（15 ) 焊料之低融點、柔軟焊料，可以在低溫下對半導體元件實 施高接合強度之焊接。以此種方式接合之本發明之元件接 合基板，即使在使用時有較大之溫度差，其接合部位亦不 易破壞，而可長期安定使用。尤其使用表面上形成金電極 、且以氮化鋁爲主要成份之陶瓷基板時，除了具有前述特 徵以外，同時兼具可以獲得較小之高頻介質損耗、及釋放 使用時所產生之熱的放熱特性亦良好等特徵，故是十分優 良之元件接合基板。 【圖式之簡單說明】 圖1爲A u — Sn合金狀態圖。 圖2爲本發明之元件接合用基板的代表剖面圖。 【元件符號之說明】 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 1 0 0 元件 接 合用 基 板 2 〇 〇 表 面 上 形成 金 電 極 層 之基 板 2 0 1 氮 化 鋁 燒結 體 基 板 2 〇 2 以 Τ 1 爲主 要 成 份 之 第一 基 體 層 2 0 3 以 Ρ t 爲主 要 成份之 第二 基 體 層 2 〇 4 金 電 極 層 3 〇 〇 阻 斷 層 4 0 0 以 S η 或I η 爲 主 要 成份 、 且 由金含量爲 2 0重量百分率以下之金屬所構成的焊料層 本紙張尺度適用中國國家標準（CNS ) A4規格（21〇χ29?公釐） -18--1T Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs -16- 548805 A7 B7 V. Description of the Invention (15) The low melting point and soft solder of the solder can be used to solder semiconductor components with high joint strength at low temperatures. The element bonding substrate of the present invention bonded in this manner can be used easily and stably for a long time even if there is a large temperature difference during use. Especially when a ceramic substrate with gold electrodes on the surface and aluminum nitride as the main component is used, in addition to the aforementioned characteristics, it also has the ability to obtain small high-frequency dielectric loss and release heat generated during use. The characteristics are also good, so it is a very good element bonding substrate. [Simplified description of the diagram] Fig. 1 is a state diagram of Au-Sn alloy. Fig. 2 is a representative cross-sectional view of a substrate for element bonding according to the present invention. [Explanation of component symbols] (Please read the precautions on the back before filling out this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 1 0 0 Substrate for bonding 2 2 Substrate with gold electrode layer on the surface 2 0 1 Aluminum nitride sintered body substrate 2 0 2 The first base layer 2 with T 1 as the main component 2 3 The second base layer 2 with P t as the main component 2 4 The gold electrode layer 3 3 0 Blocking layer 4 0 0 S η or I η is the main component and is a solder layer composed of a metal with a gold content of less than 20% by weight. The paper dimensions are applicable to the Chinese National Standard (CNS) A4 specification (21 × 29? Mm) -18-

Claims (1)

年月 經濟部智慧財產局員工消費合作社印製 J9am82號專^申請案 A8 L身ί申請專利範圍修正本民國92年3養？日修正 1 D8 六、申請專利範圍 第91 1 1 1482號專利申請案 中文申請專利範圍修正本 民國92年3月7日修正 1 · 一種元件接合用基板，其特徵爲： 含有表面形成金電極層之基板的該金電極層上，層疊 著由Ag、C u、Ni 、及Pb群中選取之1種以上之金 屬所構成之金屬層的層疊構造。 2 ·如申請專利範圍第1項之元件接合用基板，其中 表面形成金電極層之基板，在以氮化鋁爲主要成份之 陶瓷基板上依序層疊以T i爲主要成份之第一基體層、以 P t爲主要成份之第二基體層、及由金構成之電極層而形 成金屬化基板。 3 ·如申請專利範圍第1項之元件接合用基板，其中 由Ag 、Cu、Ni 、及Pb群中選取1種以上之金 屬所構成之金屬層的厚度爲0 · 2〜5 //m。 4 .如申請專利範圍第1或2項之元件接合用基板， 其中， 含有在由Ag、Cu、Ni 、及Pb群中選取1種以 上之金屬所構成之金屬層上層積以S η或I η爲主要成份 、且由金含量爲20重量百分率以下之金屬所構成之焊料 層的層疊構造。 5 .如申請專利範圍第4項之元件接合用基板，其中 本紙張尺度適用中國國家標準（CNS ) Α4規格（210Χ297公釐） (請先閱讀背面之注意事項再填寫本頁) ABCD 548805 六、申請專利範圍 形成焊料層、以S η或ϊ η爲主要成份 '且金含量爲 2 0重量百分率以下之金屬’ 2 5°C時之楊氏模量爲50 G P a以下，且融點2 8 〇 °C以下之金屬。 6 · —種如申請專利範圍第1或2項之元件接合用基 板的製造方法，其特徵爲’ 表面接合著金電極層之基板的該金電極層上，形成由 A g、Cu 、Ni 、及Pb群中選取之1種以上之金屬所 構成的金屬層。 7 .如申請專利範圍第6項之製造方法，其中， 在已形成之、由Ag、Cu、Ni 、及Pb群中選取 之1種以上之金屬所構成的金屬層上，又形成以S η或 I η爲主要成份、且金含量爲20重量百分率以下之金屬 所構成的焊料層。 8 · —種元件接合基板的製造方法，其特徵爲： 將具有電極之元件以該電極接觸前述焊料層之方式載 置於申請專利範圍第4或5項之元件接合用基板的焊料層 上，其後再進行迴焊。 9 · 一種元件接合基板，其特徵爲： 將具有電極之兀件載置於申請專利範圍第4或5項之元 件接合用基板的焊料層上，且該電極及前述焊料層係由迴 焊所接合。 ---；---^------ (請先閱讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 -2-Date Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs No. J9am82 ^ Application A8 L. The scope of the patent application for amendments was raised in 1992. Day Amendment 1 D8 VI. Application for Patent Scope No. 91 1 1 1482 Chinese Patent Application Amendment Amendment March 7, 1992 Amendment 1 · A substrate for component bonding, characterized in that it contains a gold electrode layer on the surface On the gold electrode layer of the substrate, a laminated structure of a metal layer composed of one or more metals selected from the group consisting of Ag, Cu, Ni, and Pb is laminated. 2 · For the element bonding substrate according to item 1 of the scope of patent application, in which the substrate on which gold electrode layer is formed on the surface, a first base layer mainly composed of T i is sequentially laminated on a ceramic substrate mainly composed of aluminum nitride. A metallized substrate is formed by a second base layer mainly composed of P t and an electrode layer composed of gold. 3. If the substrate for element bonding according to item 1 of the patent application scope, the thickness of the metal layer composed of one or more metals selected from the group consisting of Ag, Cu, Ni, and Pb is 0. 2 to 5 // m. 4. The substrate for element bonding according to item 1 or 2 of the scope of patent application, which includes a metal layer composed of one or more metals selected from the group consisting of Ag, Cu, Ni, and Pb, and is laminated with S η or I η is a laminated structure of a solder layer mainly composed of a metal having a gold content of 20% by weight or less. 5. If the substrate for component bonding in item 4 of the scope of patent application, the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 × 297 mm) (Please read the precautions on the back before filling this page) ABCD 548805 6. The scope of the patent application is to form a solder layer, use S η or ϊ η as the main component, and a metal with a gold content of 20% by weight or less. The Young's modulus at 5 ° C is 50 GP a and the melting point is 2 8 Metals below 0 ° C. 6 · A method for manufacturing a substrate for element bonding as described in the scope of claims 1 or 2 of the patent application, characterized in that, on the gold electrode layer of the substrate on which a gold electrode layer is bonded on the surface, Ag, Cu, Ni, And a metal layer composed of one or more metals selected from the Pb group. 7. The manufacturing method according to item 6 of the scope of patent application, wherein S η is formed on the formed metal layer composed of one or more metals selected from the group consisting of Ag, Cu, Ni, and Pb. Or a solder layer made of a metal whose main component is I η and whose gold content is 20% by weight or less. 8 · A method for manufacturing a component bonding substrate, characterized in that: a component having an electrode is placed on a solder layer of a component bonding substrate such that the electrode contacts the aforementioned solder layer, After that, reflow is performed. 9 · A component bonding substrate, characterized in that: a component having an electrode is placed on a solder layer of a component bonding substrate for which the scope of patent application is 4 or 5; Join. ---; --- ^ ------ (Please read the notes on the back before filling out this page) Order Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs -2-
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JP6166735B2 (en) 2012-11-30 2017-07-26 千住金属工業株式会社 Multilayer solder material for joining different types of electrodes and method for joining different types of electrodes of electronic parts
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