JPS61121489A - Cu wiring sheet for manufacture of substrate - Google Patents

Cu wiring sheet for manufacture of substrate

Info

Publication number
JPS61121489A
JPS61121489A JP24410784A JP24410784A JPS61121489A JP S61121489 A JPS61121489 A JP S61121489A JP 24410784 A JP24410784 A JP 24410784A JP 24410784 A JP24410784 A JP 24410784A JP S61121489 A JPS61121489 A JP S61121489A
Authority
JP
Japan
Prior art keywords
layer
substrate
wiring sheet
active
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24410784A
Other languages
Japanese (ja)
Other versions
JPH0518477B2 (en
Inventor
中橋 昌子
博光 竹田
白兼 誠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP24410784A priority Critical patent/JPS61121489A/en
Publication of JPS61121489A publication Critical patent/JPS61121489A/en
Publication of JPH0518477B2 publication Critical patent/JPH0518477B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明はセラミックス基体との接合性を改善し九基板製
造用Cu配線シートに関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a Cu wiring sheet for producing nine substrates by improving the bondability with a ceramic substrate.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

一般に半導体用基板、例えば半導体用モジュールの絶縁
材として、セラミックス基板が多用されている。これら
セラミックス基板、特に高出力半導体用基板への適用に
際しては、半導体素子間を電気的に接続するCu部材(
Cu配線シート)とセラミックス基体との接合技術が不
可欠である。
Generally, ceramic substrates are often used as insulating materials for semiconductor substrates, such as semiconductor modules. When applied to these ceramic substrates, especially high-power semiconductor substrates, Cu members (
A bonding technology between the Cu wiring sheet) and the ceramic substrate is essential.

従来、このような基板として用いられるセラミックスと
しては、At203がほとんどであったが、近年、半導
体素子から発生する熱を基板からも放熱させるように、
電気的な絶縁性のみならず、放熱性にも優れたAtNの
ような高熱伝導性セラミックスが開発され、その幅広い
応用が期待されている。
Conventionally, most of the ceramics used for such substrates were At203, but in recent years At203 has been used to radiate heat generated from semiconductor elements from the substrate as well.
Highly thermally conductive ceramics such as AtN, which have excellent not only electrical insulation properties but also heat dissipation properties, have been developed, and their wide range of applications are expected.

しかしながら、セラミックスと金属とは夫々異なった原
子結合状態を有するため、両者を接合する場合、それら
の反応性など化学的性質を始めとして、熱膨張率などの
物理的性質も大きく異っている。特にAtNセラミック
スのように窒化物セラミックスは、At203等の酸化
物セラミックスに比べて、金属との濡れ性が悪く、通常
多く用いられている高融点金属メタライジングなどの接
合方法ではCu配線シートを接合することができず、A
tNセラミックを基板とする半導体モジュール基板の製
造が難しかった。
However, since ceramics and metals have different atomic bonding states, when they are joined together, their chemical properties such as reactivity and physical properties such as thermal expansion coefficients are also significantly different. In particular, nitride ceramics such as AtN ceramics have poor wettability with metals compared to oxide ceramics such as At203, and the commonly used bonding methods such as high-melting point metal metallization bond Cu wiring sheets. Unable to do so, A
It has been difficult to manufacture semiconductor module substrates using tN ceramic as substrates.

〔発明の目的〕[Purpose of the invention]

本発明は、上記問題点を解決し、容易にセラミックス基
体との接合が強固に行え、しかも加工性に優れた基板製
造用Cu配線シートを提供するものである。
The present invention solves the above-mentioned problems and provides a Cu wiring sheet for manufacturing substrates that can be easily and firmly bonded to a ceramic substrate and has excellent workability.

〔発明の概要〕[Summary of the invention]

本発明は、配線層となるCu薄板の表面に、活性金属あ
るいは、活性金属および軟質金属から成る活性層を設け
、活性層をセラミック基板側に配置して加熱し、活性層
を合金化することによりセラミックス基板と強固に接合
することを特徴とするものである。
The present invention provides an active layer made of an active metal or an active metal and a soft metal on the surface of a thin Cu plate serving as a wiring layer, and the active layer is placed on the ceramic substrate side and heated to alloy the active layer. It is characterized in that it can be firmly bonded to a ceramic substrate.

以下本発明の詳細な説明する。The present invention will be explained in detail below.

本発明において活性層となる活性金属としては、例えば
Tj、 Zr、 Hfなど周期律表第F/A族元素の中
から選ばれた何れか少なくとも1種以上、もしくはこれ
らを主成分とする合金が用いられる。また軟質金属とし
ては、AgあるいはCuなどが挙げられる。
In the present invention, the active metal to be used as the active layer is at least one selected from group F/A elements of the periodic table, such as Tj, Zr, and Hf, or an alloy containing these as main components. used. Further, examples of the soft metal include Ag or Cu.

また本発明のCu配線シートの接合対象となるセラミッ
クス基板としては、従来多く用いられているAt203
の他、窒化アルミニウム(A/、N)や炭化珪素(St
C)などの高熱伝導性セラミックスなどに広く適用する
ことができる。
In addition, the ceramic substrate to which the Cu wiring sheet of the present invention is bonded is At203, which is commonly used in the past.
In addition, aluminum nitride (A/, N) and silicon carbide (St
It can be widely applied to high thermal conductivity ceramics such as C).

本発明においてCu薄板の表面に形成される活性層の厚
さは0.5〜10μm程度が良く、活性層が活性金属と
、AgやCuなどの軟質金属との複合層の場合には、活
性金属層の厚さが0.1〜5μm。
In the present invention, the thickness of the active layer formed on the surface of the Cu thin plate is preferably about 0.5 to 10 μm, and when the active layer is a composite layer of an active metal and a soft metal such as Ag or Cu, The thickness of the metal layer is 0.1 to 5 μm.

Ag層が9μm以下、Cu層が9μm以下とすることに
よシ、過剰の接合材(活性層)がCu薄板とセラミック
ス基板との間の接合界面からはみ出すこともなく、容易
に且つ確実に接合することができる。
By setting the Ag layer to 9 μm or less and the Cu layer to 9 μm or less, excessive bonding material (active layer) does not protrude from the bonding interface between the Cu thin plate and the ceramic substrate, allowing easy and reliable bonding. can do.

例えばT1層が単層の場合には、その厚さは0.5〜1
0μmが好ましく、またAg層+Ti層の複合層からな
る厚さ0.5〜10μmの活性層を設ける場合には、A
g層が0.2〜9μm、Ti等の活性金属層が0.1〜
5μmとなることが好ましい。またAg層+Ti層−)
−Cu層の三層からなる厚さ0.5〜10μmの複合層
を設ける場合には、AgJ@0.2〜9μm、T1層等
の活性金属Kj0.1〜5μmXCu層9μm以下とす
ることが好ましい。
For example, if the T1 layer is a single layer, its thickness is 0.5 to 1
0 μm is preferable, and when providing an active layer with a thickness of 0.5 to 10 μm consisting of a composite layer of Ag layer + Ti layer, A
The g layer is 0.2-9 μm, and the active metal layer such as Ti is 0.1-9 μm.
The thickness is preferably 5 μm. Also, Ag layer + Ti layer -)
- When providing a composite layer with a thickness of 0.5 to 10 μm consisting of three Cu layers, the active metal Kj such as AgJ@0.2 to 9 μm and T1 layer should be 0.1 to 5 μm x Cu layer 9 μm or less. preferable.

なお本発明において活性層の厚さを上記範囲に規冗した
理由は、0.5μm未満であると、Cu配線シートとセ
ラミックス基板との高い接合強度が得られず、また10
μmを、低えると加熱溶融時に、溶融材が接合部の外部
まではみ出して広がシ、隣接する配線層との短絡など絶
縁基板としての機能を損うことになるからである。
The reason why the thickness of the active layer is limited to the above range in the present invention is that if the thickness is less than 0.5 μm, high bonding strength between the Cu wiring sheet and the ceramic substrate cannot be obtained;
This is because if μm is lowered, the molten material will protrude and spread to the outside of the bonded portion during heating and melting, and the function as an insulating substrate will be impaired, such as short-circuiting with adjacent wiring layers.

本発明において、Cu薄板の表面に、活性層を設ける方
法としては、例えば次の方法がある。
In the present invention, examples of methods for providing an active layer on the surface of a Cu thin plate include the following method.

■蒸着、スパッタリング、メッキなどの方法により、直
接、活性金属層や軟質金属層を堆積する方法、■活性金
属や軟質金属箔をCu薄板の上に接着剤で接合する方法
、■活性金属や軟質金属の粉末を有機溶剤などでペース
ト状にしたものをCu薄板の上に塗布する方法、あるい
は上記■〜■を組合せた方法でも良い。
■ Method of directly depositing active metal layer or soft metal layer by methods such as vapor deposition, sputtering, plating, etc. ■ Method of bonding active metal or soft metal foil onto Cu thin plate with adhesive, ■ Method of bonding active metal or soft metal layer onto Cu thin plate A method may be used in which metal powder is made into a paste form using an organic solvent or the like and applied onto the Cu thin plate, or a method in which the above methods 1 to 2 are combined.

本発明において活性層のセラミック基体とCu薄板との
介在順序は、いかなる順序でも良いが、セラミックス基
体表面側から、先ず活性金属層、次に軟質金属層の順で
、特にAg層、Cu層の順に介在させる方法が最も安定
した接合部を得ることができる。また活性金属層と軟質
金属層との複合層の場合、各金属は1層ずつに限定され
るものではなく、複数層介在させても良い。
In the present invention, the ceramic substrate of the active layer and the Cu thin plate may be interposed in any order, but from the surface side of the ceramic substrate, first the active metal layer, then the soft metal layer, especially the Ag layer and the Cu layer. The most stable joint can be obtained by intervening in sequence. Further, in the case of a composite layer of an active metal layer and a soft metal layer, each metal layer is not limited to one layer at a time, and a plurality of layers may be interposed.

また本発明のCu配線シートを目的形状に加工する方法
としては、例えばプレス加工あるいはフォトエツチング
法など何れの方法でも良いが、本発明シートは延性に富
み、エツチングも谷易なCu層4板を基体とする構造で
、その上に10μm以下の活性層を設けただけであるた
め、加工性に優れている。
Further, the Cu wiring sheet of the present invention may be processed into the desired shape by any method such as press processing or photo-etching, but the sheet of the present invention has four Cu layers that are highly ductile and easily etched. Since it has a structure that is used as a base and only an active layer of 10 μm or less is provided on it, it has excellent processability.

次に本発明のCu配線シートをセラミックス基体に接合
する方法について説明する。
Next, a method for bonding the Cu wiring sheet of the present invention to a ceramic substrate will be explained.

本発明のCu配線シートを、その活性層側をセラミック
ス基体に重ね、両者の接合部を真空雰囲気中、あるいは
不活性ガス雰囲気中で、高周波誘導などにより加熱する
。この場合、加熱時には、基本的に加圧は不要であるが
、接合界面を密着させる程度の低荷重(0〜lK4/l
t’)を加えても良い。
The Cu wiring sheet of the present invention is stacked with its active layer side on a ceramic substrate, and the bonded portion between the two is heated by high frequency induction or the like in a vacuum atmosphere or an inert gas atmosphere. In this case, pressure is basically not required during heating, but the load is low enough to bring the bonding interface into close contact (0 to lK4/l
t') may be added.

また加熱温度はCu薄板の融点よシ低いことが必要で、
好ましくは780〜1082℃の範囲で加熱すれば良い
。このような熱処理により、セラミックス基体とCu薄
板との間に、例えばCu−Tl。
Also, the heating temperature needs to be lower than the melting point of the Cu thin plate.
Preferably, heating may be performed within a range of 780 to 1082°C. Through such heat treatment, for example, Cu--Tl is formed between the ceramic substrate and the Cu thin plate.

あるいはAg−Cu−Tiなどの合金融液が生成され、
この合金融液が接合部の外部にまではみ出すことなく、
その後の冷却により凝固して、セラミックス基体とCu
薄板とが強固に接合され、高出力半導体基板等に適する
セラミックス基板が製造される。
Alternatively, a composite liquid such as Ag-Cu-Ti is produced,
This joint liquid will not spill out to the outside of the joint.
The subsequent cooling solidifies the ceramic substrate and Cu.
The thin plate is firmly bonded to produce a ceramic substrate suitable for high-power semiconductor substrates and the like.

〔発明の実施例〕[Embodiments of the invention]

(実施例1) 活性層としてT1を蒸着法にて厚さ5μmに堆積したC
u配線シート1をフォトエツチング法により所定の形状
に加工する。次に第1図に示すように、複数枚のCu配
線シート1と、絶縁板、放熱板およびヒートシンクを兼
ねたAtN基体2とをトリクレンとアセトンで洗浄、脱
脂した後、活性層を接合面として、AtN基体2の上に
重ね、2 X 10= Torrの真空度に保持したホ
ットブレス中にセットした。
(Example 1) C with T1 deposited to a thickness of 5 μm by vapor deposition as an active layer
The u wiring sheet 1 is processed into a predetermined shape by photoetching. Next, as shown in FIG. 1, after cleaning and degreasing the multiple Cu wiring sheets 1 and the AtN substrate 2, which also serves as an insulating plate, a heat sink, and a heat sink, with trichlene and acetone, the active layer is used as a bonding surface. , and placed on an AtN substrate 2, and set in a hot breath maintained at a vacuum level of 2×10 Torr.

次いでAtN基体2とCu配線シート1との間に、上下
方向よシ0.IK9/−の圧力を加えながら高周波誘導
加熱により、接合部を930℃に10分間保持し、Cu
−Ti合金融液を生成した。加熱後、Arガス雰囲気に
て冷却し、第1図に示すようにT1活性層が溶融・凝固
した合金層3に、よりAtN基体2の上にCu配線シー
ト1を接合したt4ワー半導体モジュール基板4を製造
した。
Next, between the AtN substrate 2 and the Cu wiring sheet 1, there is a 0.00 mm vertical diagonal. The joint was held at 930°C for 10 minutes by high-frequency induction heating while applying a pressure of IK9/-, and the Cu
-Ti alloy liquid was produced. After heating, the substrate is cooled in an Ar gas atmosphere, and as shown in FIG. 1, a T4 semiconductor module substrate is obtained by bonding the Cu wiring sheet 1 on the AtN substrate 2 to the alloy layer 3 in which the T1 active layer is melted and solidified. 4 was manufactured.

このようにして得られたパワー半導体モノエール基板4
は、AtN基体2とCu配線シート1とが、合金層3に
より強固に接合し、且つ合金層3が、接合部からはみ出
していない良好な接合状態が得られた。
Power semiconductor monoale substrate 4 obtained in this way
A good bonding state was obtained in which the AtN substrate 2 and the Cu wiring sheet 1 were firmly bonded by the alloy layer 3, and the alloy layer 3 did not protrude from the bonded portion.

また上記モジュール基板4に、第2図に示すように、半
導体素子5をPb−8n系半田6を介して実装した。
Further, as shown in FIG. 2, a semiconductor element 5 was mounted on the module substrate 4 via a Pb-8n solder 6.

このパワー半導体モジー−ルについて、半導体素子5か
らAtN基体2の方向(厚み方向)への熱伝導率を測定
したところ、88W/に−1であり、半導体素子5から
の多量の発熱がCu配線シート1、合金層3を通p A
tN基体2に良好に放出し、Cu配線シート1とAtN
基体2との接合が良好であることが確認された。
Regarding this power semiconductor module, when the thermal conductivity from the semiconductor element 5 to the AtN substrate 2 direction (thickness direction) was measured, it was 88 W/-1. Pass through sheet 1 and alloy layer 3.
It releases well to the tN substrate 2, and connects the Cu wiring sheet 1 and AtN.
It was confirmed that the bonding with the base body 2 was good.

(実施例2) 活性層としてT1を蒸着法にて2μm堆積し、その上に
5μm厚のAg箔を有機溶剤で接着したCu配線シート
1を打ち抜き加工により所定の形状に加工した。次にこ
のCu配線シート1と、AtN基体2とをトリクレンと
アセトンで洗浄・脱脂した後、活性層を接合面としてA
tN基体2の上に重ね、2X10  Torrの真空度
に保持したホットブレス中にセットした。
(Example 2) A Cu wiring sheet 1 on which 2 μm of T1 was deposited as an active layer by vapor deposition and a 5 μm thick Ag foil was adhered thereon using an organic solvent was punched into a predetermined shape. Next, after cleaning and degreasing this Cu wiring sheet 1 and the AtN substrate 2 with trichlene and acetone, A
It was placed on a tN substrate 2 and set in a hot breath maintained at a vacuum level of 2×10 Torr.

次にAtN基体2とCu配線シート1との間に上下方向
より0.05 K97M12の圧力を加え、高周波誘導
加熱により接合部を830℃に10分間加熱して、Tl
−Ag−Cu合金融液を生成した。加熱後、Arガス雰
囲気にて冷却し、第1図に示すようにT i−Ag活性
層が溶融・凝固した合金層により、AtN基体2の上に
Cu配線シート1を接合したパワー半導体モジュール基
板4を製造した。
Next, a pressure of 0.05K97M12 was applied from above and below between the AtN substrate 2 and the Cu wiring sheet 1, and the joint was heated to 830°C for 10 minutes by high-frequency induction heating to form a Tl
-Ag-Cu alloy liquid was produced. After heating, the power semiconductor module substrate is cooled in an Ar gas atmosphere, and the Cu wiring sheet 1 is bonded to the AtN substrate 2 using an alloy layer in which the Ti-Ag active layer is melted and solidified as shown in FIG. 4 was manufactured.

このようにして得られたパワー半導体モノニール基板4
は、AtN基体2とCu配線シート1とが合金層3によ
り強固に接合し、且つ合金層3が接合部からはみ出して
いない良好な接合状態が得られた。
Power semiconductor monoyl substrate 4 obtained in this way
A good bonding state was obtained in which the AtN substrate 2 and the Cu wiring sheet 1 were firmly bonded by the alloy layer 3, and the alloy layer 3 did not protrude from the bonded portion.

〔発明の効果〕〔Effect of the invention〕

以上説明した如く、本発明に係る基板製造用Cu配線シ
ートによれば、容易にセラミックス基体との接合が強固
に行え、しかも加工性にも優れ、特に金属との濡れ性の
悪いAtN基体などの接合性に優れ、絶縁性と放熱性を
兼ね備えたパワー半導体モゾユール基板の製造に好適な
ものである。
As explained above, the Cu wiring sheet for manufacturing substrates according to the present invention can be easily and firmly bonded to ceramic substrates, has excellent workability, and is particularly suitable for use with AtN substrates that have poor wettability with metals. It has excellent bonding properties and is suitable for manufacturing power semiconductor mosoule substrates that have both insulation and heat dissipation properties.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例によるパワー半導体モノー−ル
基板の断面図、第2図は第1図のモジュール基板に半導
体素子を実装したパワー半導体モジュールの断面図であ
る。 1・・・Cu配線シート、2・・・AtN基体、3・・
・合金層、4・・・・!ワー半導体モノニール基板、5
・・・半導体素子、6・・・半田。 出願人代理人  弁理士 鈴 江 武 産業1図 第2図
FIG. 1 is a sectional view of a power semiconductor monolithic board according to an embodiment of the present invention, and FIG. 2 is a sectional view of a power semiconductor module in which semiconductor elements are mounted on the module board of FIG. 1. 1...Cu wiring sheet, 2...AtN base, 3...
・Alloy layer, 4...! semiconductor monoyl substrate, 5
... Semiconductor element, 6... Solder. Applicant's agent Patent attorney Takeshi Suzue Industry 1 Figure 2

Claims (3)

【特許請求の範囲】[Claims] (1)Cu薄板の表面に、活性金属あるいは、活性金属
および軟質金属から成る活性層を設けたことを特徴とす
る基板製造用Cu配線シート。
(1) A Cu wiring sheet for substrate production, characterized in that an active layer consisting of an active metal or an active metal and a soft metal is provided on the surface of a Cu thin plate.
(2)活性層が0.1〜10μmの活性金属層、9μm
以下のAg層、9μm以下のCu層から成り、活性層全
体の厚みが0.5〜10μmであることを特徴とする特
許請求の範囲第1項記載の基板製造用Cu配線シート。
(2) Active metal layer with active layer of 0.1-10 μm, 9 μm
2. The Cu wiring sheet for manufacturing a substrate according to claim 1, comprising the following Ag layer and a Cu layer of 9 μm or less, and the total thickness of the active layer is 0.5 to 10 μm.
(3)活性金属が、周期律表第IVA族元素の中から選ば
れた何れか少なくとも1種以上、もしくはそれを主成分
とする合金であることを特徴とする特許請求の範囲第1
項記載の基板製造用Cu配線シート。
(3) Claim 1, characterized in that the active metal is at least one selected from Group IVA elements of the periodic table, or an alloy containing the same as a main component.
Cu wiring sheet for manufacturing a board as described in .
JP24410784A 1984-11-19 1984-11-19 Cu wiring sheet for manufacture of substrate Granted JPS61121489A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24410784A JPS61121489A (en) 1984-11-19 1984-11-19 Cu wiring sheet for manufacture of substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24410784A JPS61121489A (en) 1984-11-19 1984-11-19 Cu wiring sheet for manufacture of substrate

Publications (2)

Publication Number Publication Date
JPS61121489A true JPS61121489A (en) 1986-06-09
JPH0518477B2 JPH0518477B2 (en) 1993-03-12

Family

ID=17113855

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24410784A Granted JPS61121489A (en) 1984-11-19 1984-11-19 Cu wiring sheet for manufacture of substrate

Country Status (1)

Country Link
JP (1) JPS61121489A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991016805A1 (en) * 1990-04-16 1991-10-31 Denki Kagaku Kogyo Kabushiki Kaisha Ceramic circuit board
WO1997004483A1 (en) * 1995-07-21 1997-02-06 Kabushiki Kaisha Toshiba Ceramic circuit board
JP2594475B2 (en) * 1990-04-16 1997-03-26 電気化学工業株式会社 Ceramic circuit board
JPH09181423A (en) * 1990-04-16 1997-07-11 Denki Kagaku Kogyo Kk Ceramic circuit board
JP2009071297A (en) * 2007-08-22 2009-04-02 Mitsubishi Materials Corp Manufacturing device for substrate for power module and manufacturing method for substrate for power module

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991016805A1 (en) * 1990-04-16 1991-10-31 Denki Kagaku Kogyo Kabushiki Kaisha Ceramic circuit board
US5354415A (en) * 1990-04-16 1994-10-11 Denki Kagaku Kogyo Kabushiki Kaisha Method for forming a ceramic circuit board
JP2594475B2 (en) * 1990-04-16 1997-03-26 電気化学工業株式会社 Ceramic circuit board
JPH09181423A (en) * 1990-04-16 1997-07-11 Denki Kagaku Kogyo Kk Ceramic circuit board
WO1997004483A1 (en) * 1995-07-21 1997-02-06 Kabushiki Kaisha Toshiba Ceramic circuit board
JP2009071297A (en) * 2007-08-22 2009-04-02 Mitsubishi Materials Corp Manufacturing device for substrate for power module and manufacturing method for substrate for power module

Also Published As

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JPH0518477B2 (en) 1993-03-12

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