TW480551B - Manufacture method to prevent tape residue for protection layer - Google Patents

Abstract

This invention provides a manufacture method to prevent tape residue for protection layer. Firstly, a protection layer is formed on a semiconductor substrate and then a photoresist layer is formed on the surface of the protection layer. The photoresist layer has an opening pattern to expose part of the surface of the protection layer. Reflow of the photoresist layer is induced by heating the semiconductor substrate, which produced a round and tilted side wall for the opening of the photoresist layer. The opening pattern is transferred to the protection layer by etching the protection layer using the patterned photoresist layer as a mask.

Description

480551 V. Description of the invention (1) Field of the invention: The present invention relates to a semiconductor process for making a protective layer (passivati ο η) on the surface of a bond pad, and particularly to a protective layer with smooth and slanted sidewalls. Method to reduce adhesive residue on the side wall of the protective layer. Background of the Invention: Generally speaking, after the fabrication of integrated circuits over a semiconductor substrate is completed, an insulating layer such as an oxide or nitride is often deposited on its surface as a protective layer for the outermost layer of the entire wafer (passivating). ) Use, the integrated circuit components are subject to moisture and contaminated particles, or in vivo mechanical damage. In addition, in order to make the product connect external power lines and signal lines, on the upper surface of the protective layer: as a guide of the contact position ii: to expose the exposed conductive areas on the semiconductor substrate 1 = This can be connected to the operating area by making metal wires, which can provide the power required by the integrated circuit. Refer to the first picture, Jf Park-JL · + contact 塾 (b- pad) at 7 ^ 7 / ^ During the process of forming the upper surface of the body substrate 10, the procedure of = open body = has been formed. Among them, the semi-conductor. That is, by forming various integrated circuits and various functional layers (not shown in the figure) at half 480551, the fifth, the description of the invention (2) the body substrate 10, and the required Integrated circuit design. Therefore, in order for these pre-defined integrated circuits to be in contact with externally applied power or signals, a conductive layer 12 is often formed over the semiconductor substrate 10 for use as a sense contact. Next, a protective layer 14 is formed on the conductive layer 12. And by coating the photoresist layer 16 on the upper surface of the protective layer 14 and performing the photolithography process, openings 12 can be formed in the protective layer 14 to expose part of the upper surface of the conductive layer 12 and define the connection. Point pad. It is worth noting that, as shown in the second figure, after the photoresist layer 16 is removed, in order to adjust the thickness of the semiconductor substrate 10 to meet customer requirements. The back surface of the semiconductor substrate 10 is often subjected to a pol ishing process. In order to prevent the integrated circuit above the semiconductor substrate 1Q from being damaged improperly during the grinding process, an adhesive layer 20 is first formed above the semiconductor substrate = 1 10 to cover the protective layer 14 and the exposed part.份 conductive 层 丨 2. Then, a polishing process can be performed on the back surface of the semiconductor substrate 10 to achieve a desired target. After the entire grinding process is completed, as shown in the third picture, Yazi can attach a strip of peeling tape 22 on the surface of the adhesive layer, and then remove the adhesive 22 When one end faces the two doors, the adhesive layer 20 is torn from the white surface of the semiconductor substrate 10, and the entire surface is removed due to the same surface. However, it is worth noting that, since the anti-compliance layer 14 (see the second figure) is right-clicked here, the adhesive layer 20 is being peeled off; Shows considerable stress. As a result, the use of peeling adhesive

480551

When the removal procedure is performed, as shown in the fourth figure, an unnecessary adhesive residue 24 is generated on the protective layer 14 and the adhesive layer 24. This adhesive residue 24 will create metal wiring made by the wall, and cannot be effectively attached to the side of the protective layer 14, resulting in an open circuit defect and reducing the yield of the integrated circuit. In order to overcome the above problems in the conventional technology, the side wall of the protective layer 14 is often designed as a stepped structure as shown in the figure to disperse the stress distribution here. The related process is as follows. First, the required protective layer 14 is deposited on the upper surface of the conductive layer 12, and after the photoresist layer 16 is coated on the anti-compliance layer 14, the isotropic and non-isotropic layers are separately carried out. The two-stage etching process can define the stepped sidewall 26 in the figure. As shown in the sixth figure, although the stepped structure 26 can reduce the stress on the adhesive layer 20 here, the peeling process can not effectively prevent the adhesive layer 20 from tearing. crack. Therefore, although compared with the method in the fourth figure, the problem of uneven stress of the adhesive layer 20 can be slightly improved, but after the stripping process, there will still be some adhesive residue 2 8 formed on the stepped sidewall. 2 on the surface. However, it is still impossible to solve the problem of the decline in the yield of metal wiring. Purpose and summary of the invention: The purpose of the present invention is to provide a method for making a bond pad above an integrated circuit. By using a protective layer having a slanted slanted opening, the subsequent fabrication and connection to the contact pad can be improved. The yield of the wire.

Paste 551 V. The description of the invention (4) —The purpose is to provide—a method of using a sense contact pad above the integrated circuit of the integrated circuit. It is used to make the protective layer have a slanted slope to prevent subsequent clearing of the material, resulting in adhesive residue on the protective layer :: mouth month: wall again; purpose: to provide-a way to reduce the residue of viscous substances in the anti-point This hair dryer 2 provides an anti-i: to prevent adhesive from remaining on the side wall of the protective layer. Its towel 'forms a conductive layer on a semiconductor substrate, and forms a scoring-resistant layer on the conductive layer. Next, a photoresist = middle 'photoresist layer is formed with an opening pattern to expose a part of the anti-scattering reheating semiconductor substrate so that the photoresist layer flows again. Among them, the opening of the light layer is the same as X 70 | and M back ", which is said to have a JI sliding slope-the wall. Then, using the photoresist i 5 ί engraved mask I, an etching process is performed on the anti-rust layer to transfer Opening diagram I # = 濩 layer, and exposed part of the upper surface of the conductive layer for contact 蛰. After removing the photoresist layer, an adhesive layer is formed on the semiconductor substrate to cover the protective layer And contact pads. Then, the semiconductor substrate can be subjected to a monthly grinding process and then the adhesive layer can be removed from the semiconductor substrate. The smooth and inclined sidewalls of the protective layer can prevent adhesive residue. Detailed description of the invention:

480551 V. Description of the invention (5) The invention discloses a method for defining the opening of a contact pad in a protection method. By heating the photoresist layer at a high temperature, it can be regenerated to make the original vertical opening sidewalls become smooth and slanted. The contact pad opening also has a smooth and inclined sidewall shape. In this way, subsequent adjustment of the semiconductor substrate will be prevented. A detailed description is as follows. For details of the present invention, please refer to the seventh figure. First, according to a preferred embodiment of the present invention, a single crystal silicon with a crystal orientation of <100> is provided as a semiconductor substrate 100. First, other types of semiconductor materials, such as gal 1 (arsenide), germanium (germanium) 4 (Sllllconon on insulator, soI) can be used as half of the present invention. # = Material image 丄 In addition, “the surface of the semiconductor substrate is not suitable for the present invention due to the characteristics of the substrate”, and does not cause a special shadow, {with its &lt; 110> or &lt; 111>. A ”Next, a conductive layer 102 is formed on the semiconductor substrate 100. In general, 5 'this conductive layer 1 〇2 can be made by a well-known technology, etc., and deposited on a semiconductor substrate. As for the material of this conductive layer 102, you can choose a swing button, bucket ^ ^ claw what waste + * v Liren a "", select aluminum, rhenium, tungsten, copper, gold, platinum and other metals or any of its alloys. It ’s important to note that the female general do n’t wish that the integrated circuit is already formed on the surface of the conductive layer 102.

Alas, the surface of this semiconductor substrate 100, 480551

Various types of active elements and passive elements are required on the surface of the semiconductor substrate 100 as a material layer. Components, and surrounding circuits. That is, it already has various required functional layers and subsequently, a protective layer 103 is formed on the conductive layer 102. It may be composed of a composite layer such as hafnium oxide, nitrided oxide, or oxynitride. . . =: In the example, as shown in the seventh figure, 'the oxide oxide layer with a thickness of about 3,000 to 7000 angstroms can be formed first (preferably 5,000 angstroms) on the conductive layer ι 2 2 'ηΐ forms nitrogen with a thickness of about 50,000 to 9,000 angstroms (preferably 7000 angstroms), and a silicon layer 106 is formed on the silicon oxide layer 104 as a protective layer 103. As soon as its oxidized layer # 1G4 can be deposited using a chemical vapor deposition method (⑽, 乂 tetraethyl silicate (butyl ribium at a temperature of about 600 to 8 to 1;). As for the nitrogen cut layer 106 = 二 1 == 程 r Deposition 'Learn about this technology, the female M η! Order. Among them, the nitrided layer 106 is formed: r °° C. And' manufactured nitrided layer 106 The anti-porous body used is SlH4, NH3, N2, N2O or SiH2Ci2, N2, and then a photoresist layer 108 is formed on the upper surface of the protective layer 103. 1: first; f 108 has an opening pattern以 Γ; in the example, the photoresist layer 108 is composed of an organic photoresist material, and its thickness is about 18 &quot; to 2 &quot; ... : 480551 V. Description of the invention (7) The photoresist material is placed on the surface of the nitride nitride layer 1 06, and then the lithographic process is used to define the opening pattern on it to make the required opening pattern. Therefore, as before, After the opening pattern is defined on the photoresist layer 108, the photoresist layer 108 will have sidewalls with vertical cut planes as shown in the seventh figure. Please refer to the eighth figure, and put the car substrate on the heating plate to perform the high-temperature heating process. Among them, the temperature of the semiconductor substrate is increased to be greater than the photoresist layer. Xiong Li's glass transition temperature (Tg), so that the photoresist layer log generates reflow: In this way, after the heating process, the photoresist layer 108 will melt into a glass state (melt state) ), And the side wall portion of the original opening pattern will be formed by the cohesive force of the fluid to form a side wall n0 with a smooth tilt as shown in the eighth figure. Generally speaking, The semiconductor substrate 100 has a glass transition temperature (Tg) greater than that of the photoresist layer 108, for example, it can last for about 3 to 15 77½ in an environment of about 140 to 20 0 t to produce the desired slanted inclined sidewall 110. As for the better conditions, the temperature of the semiconductor substrate can be controlled between 100 and 180 ° C, and the heating time can be kept below about 10 minutes to achieve the photoresist layer. The purpose of the re-flow of workers 08. Please refer to the ninth figure, + 4, 丨 Tian Zhicai no changed After the shape of the side wall of the resist layer 1 08 ', the first resist layer 1 08 can be used as the 焱 h _ forget, 丨,;-Mo „Bumayu engraved mask power, the etching process for the anti-rust layer 1 03 n9 l main two q cases In the protective layer 103, a part of the upper surface of the conductive layer i U 2 is exposed, and A 4 is used as the contact pad (b ο ndpad) 111. It is worth

Page 11 480551 V. Description of the invention (8) f &quot; Si 疋, when the etching process is performed, the opening sidewall shape of the etching layer is', and 彺 S is transferred to the material layer below it. Therefore, after the etching process is completed, the opening sidewalls of the 11′η layer 1 G6 and the oxide fragment layer 1 G4 also have a smooth and inclined shape with a photoresist II i. In a preferred embodiment, a reactive technique (R1E) procedure can be used to etch the protective layer 103. Among them, the etching formula used to etch the silicon nitride layer lj) 6, ▼ choose ...

As for the etching formula of the etched silicon oxide layer 104, c c 1 F chf3 / cf4, chf3 / o2, CH3CHF2, cf4 / o2 can be selected. Then, referring to the tenth figure, in order to effectively adjust the thickness of the semiconductor substrate 丨 〇 〇 to meet customer order requirements. After removing the photoresist layer 08, as described above, an adhesive layer 112 is formed on the semiconductor substrate 100 to cover the protective layer 103 and the contact pad 1 1 1. Among them, I is used in this adhesive layer 2 to avoid defects such as breakage and breakage of the circuit components on the front side of the semiconductor substrate 100 due to improper external force when the back surface of the semiconductor substrate 100 is polished. Then, it can be vacuum-adsorbed, sucked from above the semiconductor substrate, and then moved and pressed onto the polishing machine for polishing. When the grinding process is finished, 'a strip of adhesive can be attached to the upper surface of the adhesive layer, and can be pulled up along one end of the stripped adhesive 114, so as to be removed from the semiconductor substrate. 〇 Remove the adhesive layer 11 2. It is worth noting that, because the protective layer 103 has a smooth and inclined shape on the side wall of the opening, it can effectively disperse the stress on the adhesive layer 丨 2 here. In this way, while tearing and peeling off the adhesive, the adhesive layer, and the adhesive layer will be 480551.

It will be completely peeled off without adhesive residue on the slanted and slanted side walls of the protective layer 103. As shown in the eleventh figure, after the semiconductor substrate 10 () is ground to its thickness to a predetermined standard, the adhesive layer 12 can be completely removed without generating additional adhesive. Residual. The present invention has quite a number of excellent methods to remove the adhesive applied when forming a semiconductor substrate with smooth and sloping sidewalls, and does not cause additional adhesion, which can effectively improve the subsequent production. In addition, although the conventional technology Reduction of residues, but because it requires etching with an isotropic and non-isotropic etching machine, it not only delays the manufacturing cycle of the product more significantly, but also completely peels the substrate of the main body The effect of removing the adhesive layer is 0, and it can effectively improve the process period and reduce the production cost. First, after using the protective layer of the present invention, the subsequent polishing layer can be completely made of semiconductor substrate. The peeling glue remains on the side wall of the opening. The yield of the metal connection of such a contact pad. The protective layer with a stepped opening side wall has a two-stage etching process, which often needs to be replaced in two stages, which increases the complexity of the entire process. In contrast, using the method of the present invention, the central and yang layers can flow effectively again. Therefore, in addition to eliminating the need to change the control capability of the etching machine, the process cycle can be reduced. Although the present invention is explained above with a preferred example, it is not intended to limit the spirit and the inventive entity of the present invention, but only in this embodiment. . Therefore, all modifications made without departing from the spirit and scope of the present invention should be included in the scope of patent application.

Page 13 480551 Brief description of the diagram By combining the above-mentioned content and the many advantages of this invention with the following detailed description, it is easy to understand and show that the first picture is a cross-sectional view of a semiconductor wafer according to traditional technology. The step of engraving the anti-S spread layer to define the contact pad; the first picture is an adhesive layer on the cross section of the semiconductor wafer to cover the protective layer and the conductive reed + shoulder. The third picture is a top view of the semiconductor wafer. The dry cloth adheres to the layer and forms the stripped adhesive on it. The fourth figure is a cross-sectional view of a semiconductor wafer according to the traditional technique. The stripped adhesive layer is formed on the side wall of the opening of the protective layer. The picture shows the stickiness of a semiconductor wafer: residue; a two-stage etching process, which is not based on the traditional technology, the steps in the process; The sixth paragraph Λ is: Cross section of the conductor wafer ® 'shows that according to the traditional technology, = the opening side wall defined by the two-m etch process, which results in adhesive residue. Photoresist VlfL is a cross-section view of a wide conductor wafer.' Forming step. Said; the photoresist layer is defined by a lithographic etch ^ The figure is a cross-sectional view of a semiconductor wafer, showing that according to the present invention, a high = .σ &quot;, a motorized photoresist layer Step to make the opening sidewall have a smooth and inclined shape. The ninth figure is a cross-sectional view of a semiconductor wafer,

Page 14 480551

The protective layer is engraved to transfer the slanted slant. The tenth picture is the surface of the semiconductor wafer when a circle of tea is on it. · Forming an adhesive layer and removing the adhesive from the semiconductor substrate: The basic steps: The tenth figure in sequence is a cross-sectional view of a semiconductor wafer. ¾ + pat @@ After the adhesive layer is removed, the protective layer is slanted and slanted ^; According to the cut and tough, there will be no adhesive residue. On the side wall of the centered opening,

Claims (1)

480551 6. Scope of patent application • A method for making a protective layer to prevent adhesive from remaining on the protective layer sidewall, the method includes at least the following steps: forming a protective layer on a semiconductor substrate; and forming a photoresist layer on the protective layer Surface, wherein the photoresist layer has a 7 pattern 'to expose a part of the upper surface of the protective layer; heating the semiconductor substrate so that the photoresist layer flows again, wherein the opening pattern of the photoresist layer has a slanted slope Sidewall; using 4 photoresist layer as an etching mask, performing an etching process on the anti-rust layer to transfer the opening pattern to the protective layer; removing the photoresist layer; forming an adhesive layer on the semiconductor substrate to Cover the protective layer and the 7 pattern; perform a grinding process on the back surface of the semiconductor substrate to adjust the thickness of the semiconductor substrate, wherein the adhesive layer is used to protect the integrated circuit elements on the front surface of the semiconductor substrate; The adhesive layer is removed from the semiconductor substrate, and the smooth and inclined sidewalls of the protective layer can prevent adhesive residue. Open sequence I Open ^ 2 · As in the method of applying for the scope of the first item of the patent application, wherein the formation of the above-mentioned anti-four layer further includes the step c of forming a conductive layer on the semiconductor substrate c 3 · As in the scope of the second application of the patent application The method, wherein the material of the conductive layer is selected from aluminum, titanium, tungsten, copper, gold, platinum, alloy, or any combination thereof. / Page 16 480551 6. In the scope of applying for a patent; the method in the first scope of applying for a patent, wherein the above-mentioned private sequence for forming an anti-m layer includes at least the following steps: Only a silicon oxide layer having a thickness of about 3000 to 700 angstroms is formed on the conductive layer. And a silicon nitride layer having a thickness of about 5000 to 90 Angstroms is formed on the silicon oxide layer on the surface of the surface. As in the method of the first patent application, the thickness of the upper layer is about 1 to 2 04 of the nine resistance layer, the photoresistance νι.ομπι 芏 zd / zm, and the opening pattern in the above-mentioned heating process layer has a slightly vertical side wall. 6) The method according to item 1 of the scope of patent application, wherein the process of loading the conductor substrate is completed by heating the 俨 H at a temperature of about 140 to 200 t for half to 15 minutes. The duration is 37. • The method of item 1 in the scope of patent application, in which the process of the conductor substrate is completed at a temperature of about 160 to 180 ° C / min. Waiting for about 10 minutes 8 · A method of preventing the adhesive from remaining on the side wall of the protective layer, the method includes at least the following steps: The contact forming method forms a conductive layer on the semiconductor substrate; On the conductive layer; Ye ου :) :) 6. Apply for a patent to form a photoresist layer on the anti-opening pattern to expose part 1 above the upper surface, where the photoresist layer has a semiconductor substrate with a heated edge so that the surface , The opening pattern of the layer, I \ Θ reflows, wherein the photoresist uses the photoresist layer as an etching mask, and the side is in order to transfer the opening pattern to the upper surface of the protective layer for the etching process. It is used as a contact pad in 4 layers, and a part of the conductive layer is exposed to remove the photoresist layer; an adhesive layer is formed on the semiconductor substrate, and the contact pad is covered with the anti-drain layer and the counter semiconductor substrate. The backside of the substrate is ground to show the sound of the ground, and the order of 4-1 is used to adjust the degree of the semiconductor. The adhesive layer is used to conserve the integrated circuit components of the semiconductor. The adhesive layer is removed from the semiconductor substrate, and 1 β ^ Μ @ smooth and sloping sidewalls can prevent adhesive residue / 9, wherein the material of the protective layer is compatible. If the method of applying for the item No. 8 of the scope of patent application can choose Ming, titanium, crane, copper, gold, ’uranium, alloy or any combination of the above conductive layers Among them, the above-mentioned method of forming a protection layer 10. The method of applying the method in the scope of patent application No. 8 includes at least the following steps: forming an oxide layer with a thickness of about 3 to 7000 angstroms on the surface of the conductive layer Page 18 480551 VI. A silicon nitride layer having a thickness of about 5000 to 9900 angstroms is formed on the silicon oxide layer on the scope of the patent application. 11. The method according to item 8 of the scope of the patent application, wherein the photo-resistance : Two 1.8 :: to 2.3 &quot; m, and before the above heating procedure, the read opening pattern of the: resistive layer has slightly vertical side walls. 1 2. The method according to item 8 of the scope of patent application, wherein the procedure of the upper substrate is at a temperature of about 14. It is completed in 2 to 15 minutes. Brother Yi Ting Bin 3 13. As in the method of claim 8 of the scope of patent application, the process of straightening the upper conductor substrate, b +, Bajia heat up the half a pound at a temperature of about 160 to 180 ° C It was completed within 10 hours or less. Character, about 10 minutes Page 19