TW451280B - Method of forming a fuse structure on a dual damascene copper structure - Google Patents

Method of forming a fuse structure on a dual damascene copper structure Download PDF

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Publication number
TW451280B
TW451280B TW89115592A TW89115592A TW451280B TW 451280 B TW451280 B TW 451280B TW 89115592 A TW89115592 A TW 89115592A TW 89115592 A TW89115592 A TW 89115592A TW 451280 B TW451280 B TW 451280B
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Taiwan
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layer
fuse
patent application
scope
item
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TW89115592A
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Chinese (zh)
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Tz-Liang Li
Mong-Song Liang
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Taiwan Semiconductor Mfg
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Abstract

A fuse structure is formed on a dual damascene copper structure in the present invention. The method includes: providing a semiconductor substrate having the fuse layer and at least a dual damascene copper structure layer upon the fuse layer, the dual damascene copper structure being composed of a via portion and an interconnect portion, and the via portion and the interconnect portion being formed in the insulation layer; removing a part of the interconnect portion, and forming a groove portion on the interconnect portion between the insulation layers; forming a barrier layer in the groove portion on the interconnect portion; forming the passivation layer on the barrier layer and the insulation layer; forming a bonding pad connecting to the opening and a fuse opening window in the passivation layer; etching the passivation layer down to the insulation layer through the fuse opening window; forming a metal bonding pad in the opening of the bonding pad, and also forming a metal layer in the fuse opening window at the same time; and removing the bottom of the metal layer in the fuse opening window.

Description

451 2 80 五、發明說明α) .本發明係有關於一種積體電路(integration iC)之製造方法,特別有關於一種在半導體積F 電 形成熔線構造的方法。這個方法係使用單〜光牛 = 緣層…該I線構造之開…同= 積體電路70件上形成作為焊接墊(bonding pad)之開口。 半導體製程技術之進步,如高解析度的光學微聲枯 = =graPhy)與非等向性姓刻,降低了半導;元件 之特徵尺寸’而增加其積集度。不幸的,由於該 件之積集度上升,且晶片上分離的元件數目增加, 疋件之產品良率(晶片良率)遂下降;例如,一種積 升而良率下降之電路元件係為卯鰭,在一晶片上一般具 64M位兀;在西元2〇〇〇年之後,記憶體單元的數目相信會 增加至超過卜4G位元,且沒有利用剩餘的單元及修理"成品 之方法’將更難以達到高的最後成品良率。 〆 "" 對於鋁鋼金屬結構之熔線製程開口及焊接墊開口之整 合製程並無需再加一道光罩,因為最上層金屬結構之抗反 射塗層(antireflective coating,ARC)之氮化鈦層,可 於炼線開窗口製程中作為触刻障壁層,以防止金屬結構受 到侵勉及污染。而在習知之銅金屬結構之熔線製程開口及 焊接墊開口之整合製程方面’雖然銅結構上具有作為襯墊 或擴散障壁之氮化石夕層’但並無抗反射塗層之氮化鈇層, 於嫁線開窗口製程中作為敍刻障壁層,所以須要再加一道 光罩,以防止銅結構受到侵飯及污染。 為了能夠更清楚說明習知之銅金屬結構之炼線製程開451 2 80 V. Description of the invention α). The present invention relates to a method for manufacturing an integrated circuit (integration iC), and more particularly to a method for forming a fuse structure in a semiconductor product F. This method uses a single-buff = a marginal layer ... the opening of the I-line structure ... the same = the opening of a bonding pad is formed on 70 pieces of integrated circuit. Advances in semiconductor process technology, such as high-resolution optical microphones (= graPhy) and anisotropic engravings, have reduced the semiconductor; the feature size of components has increased its accumulation. Unfortunately, the product yield (wafer yield) of a piece has decreased due to the increase in the accumulation of the piece and the increase in the number of separated components on the wafer; for example, a circuit component that has a rise and a decrease in yield is 卯The fins generally have 64M bits on a chip; after 2000 AD, the number of memory cells is believed to increase to more than 4G bits, and the remaining units and methods of repairing " finished products are not used ' It will be more difficult to achieve high final yields. Quot " " No need to add a photomask for the integration process of the fusion welding process opening and the welding pad opening of the aluminum-steel metal structure, because the top layer of the metal structure's antireflective coating (ARC) titanium nitride Layer, which can be used as a touch barrier layer in the process of window opening in the smelting line to prevent metal structures from being invaded and contaminated. In terms of the integrated process of the fuse process opening and the bonding pad opening of the conventional copper metal structure, although the copper structure has a nitride layer as a liner or a diffusion barrier, there is no hafnium nitride layer with an anti-reflection coating. In the process of opening the window of the marriage line, it is used as a narrative barrier layer, so it is necessary to add a photomask to prevent the copper structure from being invaded and contaminated. In order to more clearly explain the conventional copper metal structure of the smelting process

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451280451280

五、發明說明(2) 口及焊接墊開〇之榦人制h 后。首先,如第配合圖式’作詳細說明如 導體基底1〇具| /雙所,,係提供-半導體基底10,此半 摄以下之Μ層雙嵌銅結構及位於最上層之金屬結 之金屬結構上=!5作層2金屬結構上之熔線34,在最上層 接# Α备儿有作為觀墊或擴散障壁之氮化矽層19。 接著,於氮化蹄jaiq+Lx υ . 7層1 9之上全面性形成一第一鈍態護層 (passivation lavpr、i〇 , « iayer)12,如氧化矽層。之後,形成一篦 亡鈍態如氮化梦層。其次,塗佈一光二J 不‘以微影製程定義焊接墊開口 1 6與熔線開窗口丨8。 接著,依所定義之焊接墊開口 1 6與熔線開窗口 1 8,蝕刻氮 化石夕層19、第一鈍態護層12及第二鈍態護層14,之後,去 除光阻層,此結果如第丨A圖所示d然後,請參見第〗B圖, 先=佈一光阻層(未顯示),再以微影製程定義先前之熔線 開窗口 1 8,再經由熔線開窗口丨8,蝕刻氧化矽層2〇、氮化 矽層22、氧化矽層24、氮化矽層26、氧化矽層28及氮化矽 層30,以露出氧化矽層32,之後,去除光阻層,此結果如 第1B圖所示。上述之習知製程須要再加一道光罩,以防止 鋼結構於後續形成熔線開窗口時受到侵蝕及污染。 因此,本發明之目的在於提供一種在雙嵌入銅結構上 形成懷線構造的方法,係利用單一光罩以同時形成炼線開 窗口及作為焊接塾之開口。 本發明之另一目的在於熔線開窗口内形成側壁絕緣保 護層,以作為將來以雷射燒掉熔線時避免在熔線之區域上 有剩餘的金屬擴散入侧壁絕緣層而造成污染。V. Description of the invention (2) After the mouth and the welding pad are opened, the dry person h shall be h. First of all, as shown in the figure with reference to the detailed description, such as the conductor substrate 10 with / double, it is provided-semiconductor substrate 10, the M-layer double-embedded copper structure below this half-photograph and the metal at the uppermost metal junction. Structurally,! 5 is used as the fusible link 34 on the layer 2 metal structure, and the uppermost layer is connected with a silicon nitride layer 19 as a viewing pad or a diffusion barrier. Then, a first passivation layer (passivation lavpr, i0, «iayer) 12 such as a silicon oxide layer is comprehensively formed on the nitride layer jaiq + Lx υ 7. Afterwards, a dead state such as a nitrided dream layer is formed. Secondly, coating one light and two J, not 'defining the pad opening 16 and the fuse opening window 8 by the lithography process. Next, the nitride pad layer 19, the first passivation layer 12 and the second passivation layer 14 are etched according to the defined solder pad opening 16 and the fuse opening window 18, and then the photoresist layer is removed. The result is shown in Figure 丨 A. Then, see Figure 〖B. First, a photoresist layer (not shown) is laid out, and then the lithographic process is used to define the previous fuse opening window 18, and then open through the fuse. Window 丨 8, the silicon oxide layer 20, the silicon nitride layer 22, the silicon oxide layer 24, the silicon nitride layer 26, the silicon oxide layer 28, and the silicon nitride layer 30 are etched to expose the silicon oxide layer 32, and then the light is removed Barrier layer. This result is shown in Figure 1B. The above-mentioned conventional manufacturing process requires the addition of a photomask to prevent the steel structure from being eroded and contaminated during the subsequent formation of the fuse opening window. Therefore, an object of the present invention is to provide a method for forming a line-contained structure on a double-embedded copper structure, which utilizes a single photomask to simultaneously form a wire opening window and an opening for a welding grate. Another object of the present invention is to form a side wall insulation protection layer in the open window of the fuse line, so as to prevent the residual metal from diffusing into the side wall insulation layer and causing pollution when the fuse line is burned by laser in the future.

第5頁 451280 五、發明說明(3) ' 本發明尚有一目的在於最上層金屬結構上形成一障壁 層,或謂金屬護層,如氮化鈕(TaN)、鉻或鉻銅合金層, 作為敍刻罩幕層以防止其下的銅金屬受到侵钱及污染,且 因可選用不同的障壁層材料而分別適用於後續之鋁線焊接 及Flip Chip製程。 為了達成上述目的,本發明提出一種在雙嵌入鋼結構 上形成熔線構造的方法,係於最上層金屬結構上形成一障 壁層,且利用單一光罩以同時形成熔線開窗口及作為焊接 墊之開口,並於熔線開窗口内形成侧壁絕緣保護層。 根據本發明,一種在雙嵌入銅結構上形成熔線構造的 方法,包括下列步驟:提供一半導體基底,具有熔線層及 位於此熔線層上之至少一雙嵌入銅結構層,此雙嵌入銅結 構是由一導孔部及一内連接部所組成,而此導孔部及内連 接部是在絕緣層中形成;去除部分的内連接部,而於此絕 緣層間的此内連接部上形成凹陷部;於此内連接部上的凹 陷部形成一障壁層;於此障壁層與此絕緣層上形成鈍態護 層;在此鈍態護層内形成一焊接墊連接開口及一熔線開窗 口;經由此熔線開窗口,蝕刻此鈍態護層至此絕緣層為 止;於此焊接墊開口内形成一金屬焊接墊,同時亦在此熔 線開窗口内形成一金屬層;以及去除此熔線開窗口内之此 金屬層之底部。 為讓本發明之上述目的、特徵、和優點能更明顯易 懂’下文特舉一較佳實施例,並配合所附圖式,作詳細說 明如下:Page 5 451280 5. Description of the invention (3) 'The present invention also has the purpose of forming a barrier layer, or metal protective layer, such as a nitride button (TaN), chromium or chromium-copper alloy layer, on the uppermost metal structure. The mask layer is engraved to prevent the copper metal underneath from being invaded and contaminated, and because of the choice of different barrier layer materials, it is suitable for subsequent aluminum wire welding and Flip Chip processes. In order to achieve the above object, the present invention proposes a method for forming a fuse structure on a double-embedded steel structure, which forms a barrier layer on the uppermost metal structure, and uses a single photomask to simultaneously form a fuse opening window and as a welding pad. Opening, and a side wall insulation protection layer is formed in the fuse opening window. According to the present invention, a method for forming a fuse structure on a dual-embedded copper structure includes the following steps: providing a semiconductor substrate having a fuse layer and at least one double-embedded copper structure layer on the fuse layer; The copper structure is composed of a via hole portion and an inner connecting portion, and the via hole portion and the inner connecting portion are formed in an insulating layer; a part of the inner connecting portion is removed, and the inner connecting portion between the insulating layers is removed. Forming a recessed portion; forming a barrier layer on the recessed portion of the inner connecting portion; forming a passive protective layer on the barrier layer and the insulating layer; forming a solder pad connection opening and a fuse in the passive protective layer Open the window; etch the passivated protective layer to the insulating layer through the fuse; form a metal solder pad in the opening of the solder pad, and also form a metal layer in the fuse open window; and remove this The bottom of this metal layer in the fuse opening window. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible ', a preferred embodiment is given below, and in conjunction with the accompanying drawings, the detailed description is as follows:

4512 8 0 五、發明說明(4) 【圖式簡單說明】 第1A至第1B圖係顯示傳統之在雙嵌 士 線構造之製程剖面圖。 、構上形成炼 第2A至第2F圖係代表本發明實施例之在雙嵌入銅 上形成炼線構造之製程剖面圖。 ί [符號說明] 10、1〇〇〜半導體基底;14卜銅結構;142〜金屬護層. 12、144〜第一鈍態護層;14、146〜第二鈍態護層' , 150~焊接墊開口 Μ8、152〜熔線開窗口; 154〜側壁絕緣保 護層,156〜金屬焊接墊;2〇、24、28、126、U0、、 i34、138~ 氧化石夕層;19、22、26、3〇、128、i32、i36〜 氮化矽層;34、124〜溶線廣。 實施例 本發明提出一種在雙嵌入銅結構上形成熔線構造的方 法,係於最上層金屬結構上形成一障壁層,且利用單_ 罩以同時形成熔線開窗口及作為焊接墊之開口,並於熔線 開窗口内形成侧壁絕緣保護層。接下來舉一較佳實施例, 作詳細說明。這個方法之後續製程可藉由燒掉熔線並移除 有瑕疵的元件線路,並使用所備用完好之線路,以修補成 品’提向良率。 本發明首先係提供一半導體基底100,此半導體基底 1 0 0具有一銅結構之熔線層1 2 4及位於此鋼結構之熔線層 124上之至少一雙散入銅結構層,如第2a圖所示,此半導 體元件之詳細構造係由場效電晶體(Field Effect4512 8 0 V. Description of the invention (4) [Schematic description] Figures 1A to 1B are cross-sectional views showing the traditional manufacturing process on a double-embedded line structure. 2A to 2F are cross-sectional views of a process for forming a smelting line structure on a double-embedded copper according to an embodiment of the present invention. ί [Symbol description] 10, 100 ~ semiconductor substrate; 14 Bu copper structure; 142 ~ metal protective layer. 12, 144 ~ first passive state protective layer; 14, 146 ~ second passive state protective layer ', 150 ~ Welding pad openings M8, 152 ~ Fuse opening window; 154 ~ Side wall insulation protection layer, 156 ~ Metal welding pad; 20, 24, 28, 126, U0 ,, i34, 138 ~ Oxide stone layer; 19, 22, 26, 30, 128, i32, i36 ~ silicon nitride layer; 34, 124 ~ wide melting line. Embodiments The present invention proposes a method for forming a fuse structure on a double-embedded copper structure. A barrier layer is formed on the uppermost metal structure, and a single cover is used to simultaneously form a fuse opening window and an opening for a solder pad. A sidewall insulation protection layer is formed in the open window of the fuse. Next, a preferred embodiment is described for detailed description. The follow-up process of this method can improve the yield by repairing the finished product by burning off the fuses and removing defective component circuits, and using the spare and intact circuits. The present invention first provides a semiconductor substrate 100. The semiconductor substrate 100 has a copper fuse layer 12 and at least one pair of interspersed copper structure layers on the fuse layer 124 of the steel structure. As shown in Fig. 2a, the detailed structure of this semiconductor element is composed of a field effect transistor.

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五、發明說明(5)V. Description of the invention (5)

Transistor, FET)所形成,但未詳示於圖中,以簡化該 圖示及其後之說明。為了說明方便本實施例之多層雙嵌入 銅結構係以7層銅結構來舉例說明,此銅結構層 數層至數十層以上H定之限制,錢人^结\\ ,一導孔部及一内連接部所組成,而該導孔部及内連接部 是在^包括一氧化矽層及一氮化矽層所組成之複合的絕緣層 中形成。而本實施例之熔線是以位於第5層之銅結構來舉 例說明。 接著,請參見第2B圖,以濕蝕刻製程去除最上層銅結 構1 4 0之部分銅結構約1 5 〇 〇 A。之後,再以低壓化學氣相 沉積(LPCVD)或電漿促進化學氣相沉積(pECVD)全面性形成 一厚度約500至1200 A的障壁層,或謂金屬護層142,如氮 化组(TaN)、鉻或絡銅合金層,此金屬護層142,將在後續 的定義焊接塾開口與熔線開窗口之製程中作為蝕刻罩幕層 以防止其下的鋼金屬層14〇受到侵飯或污染。 然後’請參閱第2 C圖,利用平坦化製程,如化學機械 研磨(Chemical Mechanical Planarization,CMP),將 部分金屬護層1 42磨除,以露出氡化矽層丨38,例如調整製 程參數中的轉盤速度,下壓力,研磨墊類型和研磨劑種類 以控制製程中的移除率,均勻性和選擇性,將金屬護層 142磨平。接著再以低壓化學氣相沉積或電漿促進化學氣 相/儿積全面性形成一第一鈍態護層(passivation 1 ay er)l 44 ’如氧化矽層。之後,亦以低壓化學氣相沉積 或電紫促進化學氣相沉積全面性形成一第二鈍態護層Transistor (FET), but it is not shown in detail in the figure to simplify the illustration and the following description. In order to facilitate the description of the multilayer double-embedded copper structure of this embodiment, a seven-layer copper structure is used as an example. The number of layers of this copper structure is more than tens of layers. The via portion and the via portion are formed in a composite insulating layer including a silicon oxide layer and a silicon nitride layer. The fuse in this embodiment is described by using a copper structure located on the fifth layer as an example. Next, referring to FIG. 2B, a portion of the copper structure of 140, which is the uppermost copper structure 140, is removed by a wet etching process at about 150 A. Then, a low pressure chemical vapor deposition (LPCVD) or plasma-assisted chemical vapor deposition (pECVD) is used to comprehensively form a barrier layer with a thickness of about 500 to 1200 A, or a metal protective layer 142, such as a nitride group (TaN ), Chrome or copper alloy layer, this metal protective layer 142 will be used as an etching mask layer in the subsequent process of defining the opening of the weld and the opening of the fuse line to prevent the steel metal layer 14 from being invaded by rice or Pollution. Then, please refer to FIG. 2C. Using a planarization process, such as Chemical Mechanical Planarization (CMP), remove part of the metal protective layer 1 42 to expose the silicon carbide layer. 38, for example, in adjusting process parameters The speed of the turntable, the down pressure, the type of polishing pad, and the type of abrasive are used to control the removal rate, uniformity and selectivity in the process, and smooth the metal protective layer 142. Then, a low-pressure chemical vapor deposition or plasma is used to promote the comprehensive formation of the chemical vapor phase / child product to form a first passivation layer 1 44 ′ such as a silicon oxide layer. Later, a low-pressure chemical vapor deposition or electro-violet was also used to promote the comprehensive formation of a second passive protective layer.

4 512 8 () 五、發明說明(6) 14 6 ’如氮化矽層。 其次’請參閱第2D圖’於第二鈍態護層146之上塗佈 一第二光阻層148 ’再以微影製程定義焊接墊開口 150與熔 線開窗口 1 5 2。接著,依所定義之焊接墊開口丨5 〇與熔線開 窗口 1 52 ’利用非等向性乾蝕刻製程或非等向性濕蝕刻製 程’對第一鈍態護層144及第二鈍態護層146.進行回蝕刻。 然後’再經由熔線開窗口丨5 2,利用非等向性乾蝕刻製程 或非等向性濕蝕刻製程,依序對氧化矽層丨38、氮化矽層 136、氧化矽層134、氮化矽層132、氧化矽層1 30及氮化矽 層1 2 8進行回蝕刻,以露出氧化矽層丨26,其中’於蝕刻製 程進行時’焊接墊開口 15〇下之金屬護層142,將作為姑刻 罩幕層以防止其下的鋼金屬層1 4 0受到侵蝕或污染。蝕刻 完後,去除第一光阻層148。 再者’請參閱第2E圖’於焊接墊開口丨50與熔線開窗 口 1 5 2内’可選擇性沉積一侧壁絕緣保護層丨5 4,以作為將 來以雷射燒掉熔線時避免在熔線之區域上有剩餘的金屬擴 散入侧壁絕緣層而造成污染’側壁絕緣保護層1 5 4可沉積 一厚度約300至500A之氮化钽,而在此同時亦會在焊接塾 開口 150内沉積保護層154。接著,於焊接墊開口 15〇内形 成一金屬焊接墊(bonding pad)156 ’如鋁或UBM(under ball metallurgy)金屬,而在此同時亦會在熔線開窗口 152内形成一金屬層156。此結果如第2E圖所示。 最後,請參閱第2F圖,於金屬焊接墊156上定義一第 二光阻層(未顯示),作為敍刻罩幕。之後,利用非等向性4 512 8 () V. Description of the invention (6) 14 6 ′ Such as a silicon nitride layer. Secondly, please refer to FIG. 2D, and apply a second photoresist layer 148 on the second passivation layer 146. Then, the lithography process is used to define the pad opening 150 and the fuse opening window 152. Next, the first passivation layer 144 and the second passivation state are defined according to the defined solder pad openings 丨 50 and the fuse opening window 1 52 'using an anisotropic dry etching process or an anisotropic wet etching process'. Protective layer 146. Etching. Then 'open the window through the fuse line 5 2 and use an anisotropic dry etching process or an anisotropic wet etching process to sequentially order the silicon oxide layer 38, the silicon nitride layer 136, the silicon oxide layer 134, nitrogen The siliconized layer 132, the silicon oxide layer 1 30, and the silicon nitride layer 1 2 8 are etched back to expose the silicon oxide layer 26, in which the metal protective layer 142 under the opening of the solder pad is “when the etching process is performed”, It will be used as a mask to prevent the steel metal layer 14 below it from being eroded or contaminated. After the etching is completed, the first photoresist layer 148 is removed. In addition, please refer to FIG. 2E. In the opening of the solder pad 50 and the fuse opening window 1 5 2, a side wall insulation protection layer 5 4 can be selectively deposited for future use when the fuse is burned by laser. To avoid contamination caused by the remaining metal diffused into the side wall insulation layer in the area of the fuse, the side wall insulation protection layer 1 5 4 can deposit a thickness of about 300 to 500 A of tantalum nitride, and at the same time it will also be soldered 塾A protective layer 154 is deposited in the opening 150. Next, a metal bonding pad 156 'such as aluminum or UBM (under ball metallurgy) metal is formed in the solder pad opening 150, and at the same time, a metal layer 156 is formed in the fuse opening window 152. This result is shown in Figure 2E. Finally, referring to FIG. 2F, a second photoresist layer (not shown) is defined on the metal pad 156 as a reticle. Afterwards, using anisotropy

‘451280 五、發明說明(7) 乾钱刻製程或反應離子姓刻(ReactiVe i〇ri etching, RI E)製程,使用高方向性之蝕刻劑,依序對保護層丨5 4及 金屬層156進行回蝕刻,以除去保護層154及金屬層156之 底部。蝕刻後所留下之保護層154及金屬層156侧壁可作為 將來以雷射燒掉熔線時避免在熔線之區域上有剩餘的金屬 擴散入側壁絕緣層而造成污染。 雖然本發明已以較佳實施例揭露如上,然其並非用以 :發明’任何熟習此項技藝者,在不脫離本發明之精 ::J圍Θ ’當可作更動與潤飾’因此本發明之保護範圍 ®視後附之申請專利範圍所界定者為準。'451280 V. Description of the invention (7) Dry money engraving process or reactive ion etching (RI E) process, using a highly directional etchant, sequentially protective layer 5 4 and metal layer 156 Etching is performed to remove the bottom of the protective layer 154 and the metal layer 156. The sidewalls of the protective layer 154 and the metal layer 156 left after the etching can be used to avoid the residual metal from diffusing into the sidewall insulation layer and causing pollution when the fuse is burned by laser in the future. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to: invent the 'any person skilled in the art without departing from the essence of the present invention :: J Wai Θ' can be modified and retouched 'therefore the present invention The scope of protection ® is determined by the scope of the attached patent application.

第10頁Page 10

Claims (1)

451280 六、 申請專利範圍 """------ 下列1步ί種在'雙嵌入銅結構上形成熔線構造的方法,包括 【提供半導體基底,具有熔線層及位於該熔線層上之 至少一雙嵌入銅結構層,該雙嵌入銅結構是由一導孔部及 一内連接部所組成,而該導孔部及内連接部是在絕緣層中 形成; 曰 去除部分的内連接部,而於該絕緣層間的該内 上形成凹陷部: 安°丨 於該内連接部上的凹陷部形成一障壁層; 於該障壁層與該絕緣層上形成鈍態護層; 在該純態護層内形成一焊接墊連接開口及一熔線開窗 口 ; 經由該溶線開窗口,韻刻該她態護層至該絕緣層為 止; 於該焊接塾開口内形成一金屬焊接塾,同時亦在該炼 線開窗口内形成一金屬層;以及 去除該熔線開窗口内之該金屬層之底部。 2.如申請專利範圍第1項所述之方法,其中更包括於 該熔線開窗口内形成該金屬層之前’先在該熔線開窗口内 沉積一側壁絕緣保護層。 3·如申請專利範圍第1項所述之方法,其中更包括於 去除該溶線開窗口内之該金屬層之底部之前,先去除該溶 線開窗口内之該側壁絕緣保護層之底部。 4 ·如申請專利範圍第2項所述之方法,其中,該側壁451280 VI. Scope of patent application " " " -------- The following 1 step is a method of forming a fuse structure on a 'dual embedded copper structure, including [providing a semiconductor substrate with a fuse layer and At least one double embedded copper structure layer on the fuse layer, the double embedded copper structure is composed of a via hole portion and an inner connection portion, and the via hole portion and the inner connection portion are formed in an insulating layer; A portion of the internal connection portion, and a depression is formed on the inside between the insulation layers: Ann, the depression portion on the internal connection portion forms a barrier layer; and a passivation layer is formed on the barrier layer and the insulation layer Forming a welding pad connection opening and a fuse opening window in the pure state protective layer; opening the other protective layer to the insulating layer through the melting line opening window; forming a metal weld in the opening of the welding joint Alas, a metal layer is also formed in the open window of the smelting line; and the bottom of the metal layer in the open window of the fusible link is removed. 2. The method according to item 1 of the scope of patent application, further comprising depositing a sidewall insulation protection layer in the fuse opening window before forming the metal layer in the fuse opening window. 3. The method according to item 1 of the scope of patent application, further comprising removing the bottom of the sidewall insulation protection layer in the molten window before removing the bottom of the metal layer in the molten window. 4 · The method according to item 2 of the scope of patent application, wherein the side wall 在512 80 六、申請專利範圍 " --— ;絕緣保護層可形成一厚度約3〇〇至5〇〇人之氮化钽層。 5 ·如申請專利範圍第1項所述之方法,其中,該障壁 層疋以低塵化學氣相沉積或電漿促進化學氣相沉積成形一 厚度約50 0至1 20 0 A之氮化鈕層d 6. 如申請專利範圍第1項所述之方法,其中,該障壁 層疋以低壓化學氣相沉積或電漿促進化學氣相沉積成形一 厚度約500至J 200 A之鉻或鉻銅合金層。 7. 如申請專利範圍第1項所述之方法,其中,該鈍態 護層包括一第一鈍態護層及一第二鈍態護層。 8. 如申請專利範圍第7項所述之方法,其中’該第— 純癌護層是以低壓化學氣相沉積或電漿促進化學氣相沉積 成形氧化矽層。 9 ·如申請專利範圍第7項所述之方法,其中’該第二 純癌護層是以低壓化學氣相沉積或電漿促進化學氣相沉積 成形氮化梦層。 1 0 ·如申請專利範圍第1項所述之方法,其中’在該鈍 態護層之内形成一烊接墊開口及一溶線開窗口’係利用非 等向性乾蝕刻製程或非等向性濕蝕刻製程,對該鈍態護層 進行回触刻。 , 11如申請專利範圍第1項所述之方法,其中,該金屬 () 焊接墊及該金屬層是為鋁或金屬。 1 2.如申請專利範圍第1項所述之方法,其中,去除該 熔線開窗口内之該金屬層之底部,係利用非等向性乾蝕刻 製程或反應離子触刻製程,使用高方向性之蝕刻劑,對該In 512,80, the scope of patent application "---; The insulating protection layer can form a tantalum nitride layer with a thickness of about 300 to 500 people. 5. The method according to item 1 of the scope of patent application, wherein the barrier layer 疋 is formed by a low-dust chemical vapor deposition or a plasma-assisted chemical vapor deposition to form a nitride button having a thickness of about 50 0 to 1 20 0 A. Layer d 6. The method as described in item 1 of the scope of the patent application, wherein the barrier layer 疋 is formed by using low pressure chemical vapor deposition or plasma to promote chemical vapor deposition to form a chromium or chromium copper having a thickness of about 500 to J 200 A. Alloy layer. 7. The method according to item 1 of the scope of patent application, wherein the passive protective layer includes a first passive protective layer and a second passive protective layer. 8. The method according to item 7 of the scope of the patent application, wherein ‘the first pure cancer protective layer is formed by a low pressure chemical vapor deposition or a plasma-assisted chemical vapor deposition to form a silicon oxide layer. 9. The method according to item 7 in the scope of the patent application, wherein ‘the second pure cancer protective layer is formed by a low-pressure chemical vapor deposition or a plasma-promoted chemical vapor deposition to form a nitrided dream layer. 10 · The method as described in item 1 of the scope of the patent application, wherein 'the formation of a pad opening and a melting line opening window within the passive protective layer' uses an anisotropic dry etching process or an anisotropic process In a wet etching process, the passivation layer is etched back. 11, The method according to item 1 of the scope of patent application, wherein the metal () welding pad and the metal layer are aluminum or metal. 1 2. The method according to item 1 of the scope of patent application, wherein the removal of the bottom of the metal layer in the open window of the fuse is performed by using an anisotropic dry etching process or a reactive ion touch etching process, using a high direction Etchants 第12頁 4 5 12 8 0Page 12 4 5 12 8 0 第13頁Page 13
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