TW495910B - Manufacturing method of dual damascene structure - Google Patents

Manufacturing method of dual damascene structure Download PDF

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Publication number
TW495910B
TW495910B TW88112075A TW88112075A TW495910B TW 495910 B TW495910 B TW 495910B TW 88112075 A TW88112075 A TW 88112075A TW 88112075 A TW88112075 A TW 88112075A TW 495910 B TW495910 B TW 495910B
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Taiwan
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layer
etch stop
contact window
insulating layer
manufacturing
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TW88112075A
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Chinese (zh)
Inventor
Ren-Cheng Liou
Ming-Huei Liu
Hung-Yuan Tau
Jia-Shiung Tsai
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Taiwan Semiconductor Mfg
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Publication of TW495910B publication Critical patent/TW495910B/en

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Abstract

According to the invented manufacturing method of dual damascene structure, a protection layer of the protection wall is formed at the periphery of the contact window, which is on the second etch stop layer inside the contact window and can be embedded into the groove when etching process is conducted, before the embedded groove is etched. Therefore, it is capable of eliminating the punch-through problem caused by etching through the first etch stop layer. In addition, the faceting effect caused by the junction between contact window and embedded groove can also be eliminated. Accordingly, the insulation effect can be assured.

Description

丄 υ ------ 881遲-ί:_1_日 條正 五、發明說明(i) --—-- ^本發明係有關於雙鑲嵌(dual damascene)結構的製 、、方=,特別有關於可消除接觸窗與嵌入凹槽之接面所造 平面效應(faceting effect)而降低絕緣效果的雙 報嵌結構的製造方法。 近年來’為配合元件尺寸縮小化的發展以及提高元件 操作速度的需求,具有低電阻常數和高電子遷移阻抗的銅 金屬’已逐漸被應用來作為金屬内連線的材質,取代以往 的紹金屬製程技術。 … 金屬銅本身具有許多先天上的優勢,例如:(1)低 電阻特性’其阻值為1· 7 " Q-cm,而鋁則為2· 7 // Ω-cm ; 、(2 /)良好的抗電子遷移性;(3 )良好的抗應力導致的空 / 同升/ 成性質(stress-induced void formation)等等。 上述優點對於元件的特性有很大的幫助,例如較快的速 度、可降低串音(Cross Talk )以及具有較小的RC時間常 數。雖然銅的某些物理性質對於應用在元件上具有很大的 優勢’但是銅存在有蝕刻不易的問題。因此,為了解決此 問:4 ’而提出了所謂的鑲鼓式(damascene)製程。 鑲敌式製程有別於傳統先界定出金屬圖案再以絕緣層 填入凹槽的金屬化製程,其方法是先在一平坦的絕緣層上 餘刻出金屬線的凹槽後,再將金屬層填入,最後將多餘的 金屬以化學機械研磨法(Cjjp )去除,而得到一具有金屬 鑲肷於絕緣層中的平坦結構。鑲嵌式製程比起傳統的金屬 化製程具有以下優點:(1 )可使基板表面隨時保持平 坦;(2 )可排除傳統製程中絕緣材料不易填入金屬導線丄 υ ------ 881 Chi-ί: _1_ Japanese article five. Description of the invention (i) ------- ^ The present invention is related to the manufacturing of dual damascene structure. In particular, the invention relates to a manufacturing method of a double-embedded structure that can eliminate the faceting effect created by the interface between the contact window and the embedded groove and reduce the insulation effect. In recent years, in order to meet the development of component size reduction and increase the speed of component operation, copper metal with low resistance constant and high electron migration resistance has gradually been used as the material of metal interconnects to replace the previous Shao metal Process technology. … Metal copper itself has many inherent advantages, such as: (1) low resistance characteristics' its resistance value is 1 · 7 " Q-cm, and aluminum is 2 · 7 // Ω-cm;, (2 / ) Good resistance to electron migration; (3) Good resistance to stress-induced void formation and so on. The above advantages greatly help the characteristics of the component, such as faster speed, can reduce cross talk (Cross Talk) and have a small RC time constant. Although some physical properties of copper have great advantages for application to components', copper has the problem of being difficult to etch. Therefore, in order to solve this problem: the so-called damascene process is proposed. The inlay process is different from the traditional metallization process in which a metal pattern is first defined and then the groove is filled with an insulating layer. The method is to first engrav the groove of the metal wire on a flat insulating layer, and then place the metal Layers are filled in, and finally excess metal is removed by chemical mechanical polishing (Cjjp) to obtain a flat structure with metal embedded in the insulating layer. The inlay process has the following advantages over the traditional metallization process: (1) it can keep the surface of the substrate flat at any time; (2) it can exclude that the insulating material is not easy to fill the metal wire in the traditional process

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間隙的缺點;(3 ) 別是銅金屬的蝕刻 可解決金屬材料蝕刻不易的問題, 特 圖宏+、二服傳統内連線的製程中接觸窗構造與導緩 雔使得整個製程步驟極其繁複的缺點,、ί 出一種雙鑲嵌(dual damascene)製程, 以進行兩次選擇性钱刻,分別於下方的絕緣 = :觸而於上方的絕緣層姓刻出内連線用的嵌入凹槽出 雷么:次做完金屬導線與導電插塞的阻障層,並一次將導 的效ί填人接觸窗和内連線嵌人凹槽,達到簡化製程步驟 近年來,為配合元件尺寸縮小化的發展以及提高元件 2速度的需4,具有低電阻常數和高電子遷移阻抗的銅 金屬,已逐漸被應用來作為金屬内連線的材質,取代以往 的鋁金屬製程技術。銅金屬的鑲嵌式内連線技術,不僅可 達到内連線的縮小化並且可減少Rc時間延遲,同時也解決 了金屬銅蝕刻不易的問題,因此已成為現今多重内連線主 要的發展趨勢。 、 請參照第1圖(a )至(c ),第i圖(a )至(c )係顯 示用以說明習知雙鑲嵌結構的製造方法之一例的剖面圖。 習知雙鑲嵌結構的製造方法係用於具有導電部份丨〇2 (例 如’銅、複晶矽等)的半導體基板1 0上,且上述習知雙鑲 嵌結構的製造方法包括下列步驟。 (1)如第1圖(a)所示’於上述半導體基板1〇上依 序形成第一餘刻終止層11 0 (例如,氮化石夕)、第一絕緣Disadvantages of the gap; (3) In addition, the etching of copper metal can solve the problem of difficult etching of metal materials. The structure and guidance of the contact window in the process of the traditional interconnection of Tetumhong + and Erfu makes the entire process step extremely complicated. Disadvantages: Develop a dual damascene process to perform two selective money engravings, respectively, below the insulation =: touch the upper insulation layer to engraved the embedded groove for the inner line to mine out What: Once the barrier layer of the metal wire and the conductive plug is completed, and the conductive effect is filled into the contact window and the inner line into the groove, the process steps are simplified in recent years. In order to reduce the size of the matching components, The need to develop and increase the speed of element 2 and copper metal with low resistance constant and high electron migration resistance has gradually been used as the material of metal interconnects to replace the previous aluminum metal process technology. Copper metal's mosaic interconnect technology can not only reduce the interconnect size and reduce the Rc time delay, but also solve the problem of difficult copper etching, so it has become the main development trend of multiple interconnects today. Please refer to Figs. 1 (a) to (c), and Figs. (A) to (c) are cross-sectional views illustrating an example of a manufacturing method of a conventional dual mosaic structure. The manufacturing method of the conventional dual damascene structure is applied to a semiconductor substrate 10 having a conductive portion (such as' copper, polycrystalline silicon, etc.), and the manufacturing method of the conventional dual damascene structure includes the following steps. (1) As shown in FIG. 1 (a), 'on the above-mentioned semiconductor substrate 10, a first post-etch stop layer 11 0 (for example, nitride nitride) and a first insulation layer are sequentially formed.

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層112 (例如’氧化石夕)、第二餘刻終止層114 (例如,氮 化矽)、第二絕緣層1 i 6 (例如,氧化矽)及抗反射遮蔽 層11 8 (例如,氮氧化石夕)。 (2 )如第1圖(b )所示,以微影技術 (Photolithography )來形成具有用以界定接觸窗之開口 122的光阻層120,然後以上述光阻層12〇為罩幕,而經由 上述開口 1 22來蝕刻上述抗反射遮蔽層丨丨8、第二絕緣層 116、第二蝕刻終止層114及第一絕緣層112,進而蝕刻終 止於上述第一蝕刻終止層丨丨〇,以形成接觸窗丨24。Layer 112 (e.g., oxidized stone), second epitaxial stop layer 114 (e.g., silicon nitride), second insulating layer 1 i6 (e.g., silicon oxide), and anti-reflection shielding layer 11 8 (e.g., oxynitride Shi Xi). (2) As shown in FIG. 1 (b), a photolithography (Photolithography) technique is used to form a photoresist layer 120 having an opening 122 for defining a contact window, and then the photoresist layer 120 is used as a mask, and The above-mentioned anti-reflection shielding layer 丨 8, the second insulation layer 116, the second etch stop layer 114 and the first insulation layer 112 are etched through the openings 1 to 22, and then the etching is terminated at the first etch stop layer 丨 丨Form a contact window 24.

、(3 )如第1圖(c )所示,再以微影技術來形成具有 用以界定嵌入凹槽之開口 132的光阻層13〇,然後以上述光 阻層13G為罩幕’而經由上述開口⑴來㈣上述抗反射遮 蔽層11 8及第二絕緣層丨丨6,進而蝕刻終止於上述第二蝕刻 終止層114,以形成嵌人凹槽134。最後,填入銅金屬(未 然而’如第1目(c )所示’此種習知雙鑲欲結構的製 坛方法係於蝕刻上述嵌入凹槽134時,會蝕穿上述第一終 蝕α止層110,而造成穿透(punch —)問題,進而(3) As shown in FIG. 1 (c), a photoresist layer 13o having an opening 132 for defining an embedded groove is formed by a photolithography technique, and the photoresist layer 13G is used as a mask. The anti-reflection shielding layer 118 and the second insulating layer 丨 6 are etched through the opening 进而, and then the etching is terminated at the second etch stop layer 114 to form the embedded recess 134. Finally, the method of making a conventional double-panel structure with copper metal (not shown 'as shown in item 1 (c)') is to etch through the first final etch when the embedded groove 134 is etched. Alpha stop layer 110, which causes a problem of punch —

於:5邻伤1〇2形成凹陷部142,同時於上述接觸窗124與 上=嵌入凹槽134的接面所造成的平面(144)效應,而降 低其絕緣效果。 為了解決此問題,%已有人提出另-種方法,如第2 圖所示。請參照第2圖(a)至⑷,第2圖⑷至⑷ 係顯示用以說明習知雙鑲嵌結構的製造方法之另一例的剖In: 5 adjacent wounds 102 form a recessed portion 142, and at the same time, the planar (144) effect caused by the interface between the contact window 124 and the upper = embedded groove 134 reduces the insulation effect. To solve this problem, %% have proposed another method, as shown in Figure 2. Please refer to Figs. 2 (a) to ⑷. Figs. 2 to ⑷ show cross-sections for explaining another example of the manufacturing method of the conventional dual mosaic structure.

面圖。& # 份202 f S知雙鎮嵌結構的製造方法係用於具有導電部 種習4 ^例·^如’鋼、複晶石夕等)的半導體基板20上’且此 雙鑲嵌結構的製造方法包括下列步驟。 序形如第2圖(a )所示,於上述半導體基板20上依 層2U f 蝕刻終止層210 (例如,氮化矽)、第一絕緣 /匕矽)例★如―,氧化矽)、第二蝕刻終止層214 (例如,氮 只?is /第二絕緣層216 (例如,氧化矽)及抗反射遮蔽 ㈣8 (例如,氮氧化矽)。 以$ j 2 )如第2圖(b )所示,以微影技術來形成具有用 |疋接觸窗之開口 222的光阻層22〇,然後以上述光阻層 為罩幕,而經由上述開口 222來蝕刻上述抗反射遮蔽層 、第二絕緣層2 1 6、第二蝕刻終止層21 4及第一絕緣層 1 2&,進而蝕刻終止於上述第一蝕刻終止層2丨0,以形成接 觸窗2 2 4。 (3) 如第2圖(c)所示’先於上述接觸窗224内及抗 反射遮蔽層218上被覆保護層226 (例如有機底部抗反射層 (Bottom ARC,BARC,其厚度為90 0埃以上,或6〇〇埃被覆 二層)’再以微影技術來形成具有用以界定嵌入凹槽之開 口 232的光阻層230。 (4) 如第2圖(d)所示,以上述光阻層230為罩幕, 而經由上述開口 2 3 2來#刻上述抗反射遮蔽層2 1 8及第二絕 緣層2 1 6,進而蝕刻終止於上述第二蝕刻終止層2丨4,以形 成嵌入凹槽234。最後,填入銅金屬(未圖示)。 然而’如第2圖(d )所示’此種習知雙鑲嵌結構的製Face view. &# 份 202 f The manufacturing method of the double-embedded structure is applied to a semiconductor substrate 20 having a conductive portion, such as 'steel, polycrystalite, etc.' The manufacturing method includes the following steps. The sequence is as shown in FIG. 2 (a). On the semiconductor substrate 20, a 2U f etching stopper layer 210 (for example, silicon nitride), a first insulation / silicon layer is used. (E.g., silicon oxide), The second etch stop layer 214 (for example, nitrogen? Is / second insulating layer 216 (for example, silicon oxide) and anti-reflection mask 8 (for example, silicon oxynitride). Take $ j 2) as shown in FIG. 2 (b) As shown, a photoresist layer 22 with a contact window opening 222 is formed by lithography technology, and then the photoresist layer is used as a mask, and the antireflection shielding layer and the second through the opening 222 are etched. The insulating layer 2 1 6, the second etching stop layer 21 4 and the first insulating layer 12 2 are further etched to stop at the first etching stop layer 2 丨 0 to form a contact window 2 2 4. (3) As shown in FIG. 2 (c), 'the protective layer 226 (such as an organic bottom anti-reflection layer (Bottom ARC, BARC, which has a thickness of 900 angstroms) of the bottom of the contact window 224 and the anti-reflection shielding layer 218 is formed before the above-mentioned contact window 224. Above, or 600 Angstroms, covering the second layer) 'The photolithography technique is used to form a photoresist layer 230 having an opening 232 defining a recessed recess. (4) As shown in FIG. 2 (d), the above The photoresist layer 230 is a mask, and the anti-reflection shielding layer 2 1 8 and the second insulating layer 2 1 6 are engraved through the opening 2 3 2, and the etching is terminated at the second etching stop layer 2 丨 4 to An embedded groove 234 is formed. Finally, a copper metal (not shown) is filled. However, as shown in FIG. 2 (d), such a conventional dual-inlay structure is made.

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發明說明(5) 一 造方法雖然可消除蝕穿上 透問題,但是亦合於上、十、^二餘終止層210而造成穿 接面所造成的平二妾觸1^ 4與上述嵌入凹槽234的 有鑑:::上)效應’而降低其絕緣效果。 -種雙鑲嵌結構心】J :的::二::^問題而提供 體基板上,且上述雙鑲嵌結構=造部份的半導 於上述半導體基板上依序开心I::法包括下列步驟: 眩 咕 m斤形成第一钱刻終止層、筮 奶此 層、第二蝕刻終止層以及第二絕緣層:缚:U-絶緣 層、第二敍刻線止展 、’ 、、、由上述第一絕緣 終止層,以形成接‘-第:絕緣層而钱刻至上述第-姓刻 形成嵌入= : = 姓刻至上述第二餘刻終止層,以 上的接觸窗周圍形成保護壁。 θ第一蝕刻終止層 π # ΐ中,上述保護層為有機底部抗反射層,而I*、f笛 絕緣層及第二絕緣層 ::山而上达第- 刻氣體α的y對⑽比例為i 5〜2 2。入凹槽之钱 層及第二蝕刻終止声 .二γ 上述第一蝕刻終止 述第二絕緣層及保;屏:上夕或?巩化矽。再纟,更於上 反射遮蔽層為氮氧化矽 ’而上述抗 步驟,且以02叫8為 匕匕=上述保護壁的 ,而姓刻上述嵌人四描B 來刀一-人餘刻上述保護壁 依據本發明之售:t 窗係以光阻層的為罩幕。 入凹槽之前,先於上的製造方法,由於在蝕刻嵌 凹槽内之第二蝕刻觸"内形f於蝕刻時能夠於彼入 X、;止層上的接觸窗周圍形成保護壁的保Description of the Invention (5) Although a method can eliminate the problem of erosion and penetration, it is also combined with the upper, ten, and ^ two termination layers 210 and the flat contact caused by the contact surface 1 ^ 4 and the above-mentioned recessed recess. The groove 234 has a lesson ::: up) effect 'and reduces its insulation effect. -Kind of dual-mosaic structure] J ::: 2 :: ^ is provided on the body substrate, and the above-mentioned dual-mosaic structure = semi-conductor on the semiconductor substrate is sequentially happy I :: method includes the following steps : Dazzle to form the first money engraving termination layer, milk this layer, the second etch termination layer and the second insulation layer: binding: U-insulation layer, the second engraved line stop extension, ',,, from the above The first insulation termination layer is formed to form a '-first: insulation layer and the money is engraved to the above-mentioned first-name engraving to form an embedding =: = the last-name is engraved to the above-mentioned second remaining-term termination layer, and a protective wall is formed around the above contact window. θ In the first etch stop layer π # ,, the protective layer is an organic bottom anti-reflection layer, and the I *, f, and second insulating layers are as follows: the mountain reaches up to the y-to-- ratio of the first-etched gas α For i 5 ~ 2 2. Into the groove layer and the second etch stop sound. Two γ The first etch is terminated, the second insulation layer and the protection; screen: on the eve or? Sclerosing silicon. Furthermore, the upper reflection shielding layer is silicon oxynitride 'and the above-mentioned anti-step, and 02 is called 8 as the dagger = the above-mentioned protective wall, and the surname is inscribed with the above-mentioned embedded four-shot B to knife one-the person is engraved above The protective wall is sold according to the present invention: the window is made of a photoresist layer. Before entering the groove, the manufacturing method is prior to the above. Because the second etching contact "inner shape f" in the etching recess can form a protective wall around the contact window on the stop layer during etching. Guarantee

護層 題, 應, 亦可消穿第H终止層所造成穿透問 矛、;接觸窗與嵌入凹槽的接面所造成 因而可痛保其絕緣效果。 &的千面效 懂, 如下 ίί發明之上述目的、特徵、和優點能更明顯易 :特舉較佳實施例,並配合所附圖式,作詳細說明 〔圖式簡單說明〕 嵌結才冓 嵌結構 雙鑲嵌 第1圖(a )至(c )係顯示用以說明習知雙鑲 的製造方法之一例的剖面圖; 第2圖(a )至(d )係顯示用以說明習知雙鑲 的製造方法之另一例的剖面圖;以及 第3圖(a )至(g )係顯示用以說明本發明之 結構的製造方法的剖面圖。 符號說明 10、20、30〜半導體基板;1〇2、202、302〜導電部 份;11 0、2 1 0、3 1 0、11 4、2 1 4、3 1 4〜蝕刻終止層;! 2、 212、312、116、216、316〜絕緣層;118、218、318〜抗反 射遮蔽層;120、220、320、130、230、330〜光阻層;132 、232、332〜開口; 124、224、324〜接觸窗;142〜凹陷部 ;144、244〜平面效應;134、234、334〜嵌入凹槽;226、 326〜保護層;342〜保護壁。 〔實施例〕 請參照第3圖(a )至(g ),第3圖(a )至(g )係顯 示用以說明本發明之雙鑲嵌結構的製造方法的剖面圖。本The problem of the protective layer should also be able to eliminate the penetration of the spear caused by the H-th stop layer; the contact window and the interface of the embedded groove can thus protect its insulation effect. The above-mentioned purpose, features, and advantages of the invention can be more obvious and easier: the preferred embodiment is given in detail, and it will be described in detail with the accompanying drawings [simple description of the drawings] Figure 1 (a) to (c) are cross-sectional views showing an example of a manufacturing method of the conventional double setting; Figures (a) to (d) are shown to illustrate the conventional method A cross-sectional view of another example of the manufacturing method of the double inlay; and FIGS. 3 (a) to (g) are cross-sectional views illustrating a manufacturing method of the structure of the present invention. Explanation of symbols 10, 20, 30 to semiconductor substrate; 102, 202, 302 to conductive parts; 11 0, 2 1 0, 3 1 0, 11 4, 2 1 4, 3 1 4 to etch stop layer;! 2, 212, 312, 116, 216, 316 ~ insulation layer; 118, 218, 318 ~ anti-reflection shielding layer; 120, 220, 320, 130, 230, 330 ~ photoresist layer; 132, 232, 332 ~ opening; 124, 224, 324 ~ contact window; 142 ~ depression; 144,244 ~ planar effect; 134,234,334 ~ embedded groove; 226, 326 ~ protective layer; 342 ~ protective wall. [Embodiment] Please refer to Figs. 3 (a) to (g), and Figs. 3 (a) to (g) are cross-sectional views illustrating a method for manufacturing a dual mosaic structure of the present invention. this

0503-4358TWF1 ; claire.ptc 第9頁 4959100503-4358TWF1; claire.ptc page 9 495910

發明之雙鑲嵌結構的製造方法係適用於具有導電部份3〇2 (例如,銅、複晶矽等)的半導體基板3〇上,且上述本發 明之雙鑲嵌結構的製造方法包括下列步驟。 ^ 步驟一 如第3圖(a)所示,於上述半導體基板3 〇上依序形成 第一餘刻終止層310、第一絕緣層3 12、第二蝕刻終止層 31 4以及第二絕緣層3丨6。且可於上述第二絕緣層3丨6上形 成抗反射遮蔽層3 1 8。The manufacturing method of the inventive dual damascene structure is applicable to a semiconductor substrate 30 having a conductive portion 30 (for example, copper, polycrystalline silicon, etc.), and the manufacturing method of the dual damascene structure of the present invention includes the following steps. ^ Step 1: As shown in FIG. 3 (a), a first remaining stop layer 310, a first insulating layer 31, a second etching stop layer 314, and a second insulating layer are sequentially formed on the semiconductor substrate 30. 3 丨 6. An anti-reflection shielding layer 3 1 8 may be formed on the second insulating layer 3 丨 6.

例如’於上述半導體基板3 〇上依序沈積形成第一蝕刻 終止層310 (例如,氮化矽或氮氧化矽等)、第一絕緣層 3 1 2 (例如,氧化矽等)、第二餘刻終止層3 1 4 (例如,氮 化矽或氮氧化矽等)及第二絕緣層31 6 (例如,氧化矽) 。且可於上述第二絕緣層316上形成抗反射遮蔽層318 (例 如,氮化矽或氮氧化矽等)。 步驟二 如第3圖(b )及(c )所示,經由上述第二絕緣層316 、第一蝕刻終止層3丨4及第一絕緣層3丨2而蝕刻至上述第一 餘刻終止層310,以形成接觸窗324。 例如,如第3圖(b )所示,首先以微影技術來形成具 有用以界定接觸窗之開口 322的光阻層32〇,然後如第3圖 (c)所示以上述光阻層mo為罩幕,而經由上述開口 Mg 來蝕刻上述抗反射遮蔽層3丨8、第二絕緣層3丨6、第二蝕刻 終止層314及第一絕緣層312,進而蝕刻終止於上述第一蝕 刻終止層310,以形成接觸窗324。最後,可去除上述光阻For example, 'the first etching stop layer 310 (for example, silicon nitride or silicon oxynitride), the first insulating layer 3 1 2 (for example, silicon oxide, etc.), and the second The etch stop layer 3 1 4 (for example, silicon nitride or silicon oxynitride, etc.) and the second insulating layer 31 6 (for example, silicon oxide). An anti-reflection shielding layer 318 (for example, silicon nitride or silicon oxynitride) may be formed on the second insulating layer 316. Step two, as shown in FIGS. 3 (b) and (c), the second insulating layer 316, the first etching stop layer 3 丨 4, and the first insulating layer 3 丨 2 are etched to the first remaining stop layer. 310 to form a contact window 324. For example, as shown in FIG. 3 (b), a photoresist layer 32o having an opening 322 for defining a contact window is first formed by a lithography technique, and then the photoresist layer is formed as shown in FIG. 3 (c). mo is a mask, and the anti-reflection shielding layer 3 丨 8, the second insulating layer 3 丨 6, the second etch stop layer 314, and the first insulating layer 312 are etched through the opening Mg, and the etching is terminated at the first etch The layer 310 is terminated to form a contact window 324. Finally, the photoresist can be removed

層 320。 步驟三 如第3圖(d)所示,於上述接觸窗324内形成保護層 例如,被覆保護層326於上述接觸窗324内及抗反射遮 蔽層318上,且上述保護層326可為於蝕刻時能大量地產生 聚合物(polymer)者,例如有機底部抗反射層(B〇tt〇m ARC,BARC,其厚度約為7〇〇埃〜5〇〇埃)。 步驟四 二第3圖(e)及(f)所示’經由上述第二絕緣層316 =刻至上述第二蝕刻終止層314,以形成故入凹槽咖, H於上述嵌入凹槽334内之第二敍刻終止層314上的接觸 I&324周圍形成保護壁342。 有用如Γ圖(e)所示,以微影技術來形成具 ^用以界疋飲入凹槽之開口 332的光阻層33〇 )所不,以上述光阻層330為罩幕,而經由圆 332來蝕刻上述抗反射遮蔽層318及第二絕緣層316, =刻終止於上述第二餘刻終止層314,以 ^而 334。由=刻上述嵌入凹槽334之#刻氣體為 ’而八中CxFy的乂對义的比例可為15〜2 2 (例如:: C4F8等),&與上述有機底部抗反射層326作 二8 s m壁342 (高度約3埃〜3。埃) 產^ 内之第二靖止層314上的接觸窗324周圍-入凹槽334 於接觸綱與嵌入凹槽334的接面所造成的平面效應方因 495910 修正 曰 案號 88112075 五、發明說明(9) 而可確保其絕緣效果。 步驟五 如第3圖(g)所示,可去除上述保護壁。 、例如,以〇2及& Fs為蝕刻氣體來分二次蝕刻由聚合物 構成的上述保護壁。例如,以〇2/Ar以及匕匕/⑶/纤來施行 電漿餘刻,以去除上述保護壁342。最後,可去利用乾钱 刻及濕蝕刻來除上述光阻層33〇及保護層326,且利用⑶F /〇2/Ar的蝕刻氣體來蝕刻去除位於嵌入凹槽Mg内的二 餘刻終止層314及位於接觸窗324内的第一餘刻終止層^ 如上所述,依據本發明之雙鑲嵌 於在蝕刻嵌入凹槽之前,弈於μ I仏方法,由 能夠於嵌人凹槽内之第二钱刻炊固内形成於餘刻時 保護壁的保護’,故除了可消;蝕^第:周圍形成 成穿透問㉟,亦可消除於接觸窗與嵌入凹;:士層:造 的平面效應,因而可確保其絕緣效果:之 2造成 厚度為90 0埃以上,或_埃被覆二|,小口吏用其 ,同時亦可消除於接觸窗與嵌入凹槽面二::的厚度 效應,因而可確保其絕緣效果。 接面所造成的平面 雖然本發明已以較佳實施例揭露如上 限定本發明,任何熟習此項技藝者, 其並非用以 神和範圍Μ,當可作更動與潤;,因此=離本發明之精 當視後附之申請專利範圍所界定者為本發明之保護範圍 0503-4358TWF1 ; claire.ptc 第12頁Layer 320. Step 3 As shown in FIG. 3 (d), a protective layer is formed in the contact window 324. For example, a protective layer 326 is covered in the contact window 324 and the anti-reflection shielding layer 318, and the protective layer 326 may be etched. Those who can produce a large amount of polymer at times, such as organic bottom anti-reflection layer (Bottom ARC, BARC, whose thickness is about 700 Angstroms to 500 Angstroms). Step 42, as shown in (e) and (f) of FIG. 3, are etched through the second insulating layer 316 to the second etch stop layer 314 to form a recessed recess, H is embedded in the recessed recess 334. A protective wall 342 is formed around the contact I & 324 on the second etch stop layer 314. As shown in Figure (e), the photoresist layer 33 with the opening 332 for injecting into the groove is formed by the photolithography technique. The photoresist layer 330 is used as a mask, and The above-mentioned anti-reflection shielding layer 318 and the second insulating layer 316 are etched through the circle 332, and the etching ends at the above-mentioned second remaining termination layer 314, and 334. The engraved gas of the above-mentioned embedded groove 334 is ′, and the ratio of CxFy's 乂 antisense in Bazhong can be 15 ~ 2 2 (for example: C4F8, etc.), which is the same as the organic bottom anti-reflection layer 326. 8 sm wall 342 (the height is about 3 Angstroms to 3 Angstroms). The surface of the second contact layer 314 on the second stop layer 314 in the product ^ enters the groove 334 at the plane caused by the contact between the contact platform and the embedded groove 334. The effector can ensure its insulation effect by amending the 495910 case number 88112075 V. Description of the invention (9). Step 5 As shown in Figure 3 (g), the protective wall can be removed. For example, the protective wall made of a polymer is etched in two steps using 〇2 and & Fs as an etching gas. For example, plasma treatment is performed with 02 / Ar and dagger / ⑶ / fiber to remove the protective wall 342 described above. Finally, the dry resist and wet etching can be used to remove the photoresist layer 33 and the protective layer 326, and the etching gas of CDF / 〇2 / Ar can be used to etch and remove the two remaining stop layers located in the embedded recess Mg. 314 and the first momentary termination layer located in the contact window 324. As described above, the double setting according to the present invention is performed by the μI 仏 method before the embedded recess is etched. The protection of the protective wall is formed inside the two-cutter cooker in the rest of the time, so it can be eliminated; the erosion can be eliminated by contacting the window and the recessed recess. The plane effect can ensure its insulation effect: the thickness of 2 is more than 90 0 Angstroms, or _ Ang is covered by two |, small mouth officials use it, and it can also eliminate the thickness effect of the contact window and the recessed surface 2: , Thus ensuring its insulation effect. The plane caused by the interface Although the present invention has been disclosed in the preferred embodiment to define the present invention as above, anyone skilled in this art is not using the god and the range M, and can be changed and moisturized; therefore = away from the invention The definition of the scope of patent application attached to the essence of the present invention is the scope of protection of the present invention 0503-4358TWF1; claire.ptc page 12

Claims (1)

h一種雙鑲嵌結構的製造 4A且古道 的半導體基板上,見卜、+、=艳方法,適用於具有導電部份 步驟: 上返雙鑲嵌結構的製造方法包括下列 體基板上依·1〜2·2之㈣氣體於上述半導 刻”層刻終止層、卜絕緣層 ^ 1¾ Γ^Υ ^ 1 · 5-2. 2 ^ ^ I.J Λ ft ^ i ^ ^ -蝕刻終止層T : 土:及第-絕緣層而蝕刻至上述第 & ,以形成接觸窗; 50 0至;〇〇二妾::内形成保護層,i述保護層之厚度為 、,Μ及 經由上述第 以形成嵌入凹榫τ:ϋ 刻至上述第二蝕刻終止層, 層上的接觸窗^圍二杰/上述嵌入凹槽内之第二蝕刻終止 反射層。 °圍形成保瘦壁,上述保護層為有機底部抗 法,其ί : : t利範圍第1項所述的雙鑲嵌結構的製造方 3如申ΪΪ —絕緣層及第二絕緣層為氧化石夕。 法,其中上ϊί利範圍第1項所述的雙镶嵌結構的製造方 或氮氧化石夕。—蝕刻終止層及第二蝕刻終止層為氮化石夕 法,4其U 2利範圍第3項所述的雙鑲嵌結構的製造方 蔽層。 、述第二絕緣層及保護層之間形成抗反射遮h A double-damascene structure is used to manufacture 4A and ancient semiconductor substrates. See the methods +, =, and 艳, which are applicable to the steps with conductive parts. The manufacturing method of the top-back double-damascene structure includes the following body substrates: 1 ~ 2 · 2 ㈣ gas in the above semi-conductive engraving "layer stop layer, insulating layer ^ 1¾ Γ ^ Υ ^ 1 · 5-2. 2 ^ ^ IJ Λ ft ^ i ^ ^-etch stop layer T: soil: and The first insulating layer is etched to the above & to form a contact window; 50 to 200; 妾 :: a protective layer is formed inside, the thickness of the protective layer is,, and M, and the embedded recess is formed through the first. Tenon τ: ϋ is engraved to the second etch stop layer, and the contact window on the layer ^ surrounds the second jie / the second etch stop reflective layer embedded in the groove. ° The thin protective wall is formed, and the protective layer is an organic bottom resistance. Method: Manufacture method of the dual mosaic structure described in item 1 of the scope of claim 3 is as described in claim 1-the insulating layer and the second insulating layer are oxidized stone. Manufacture of double-damascene structure or oxynitride. —Etch stop layer and second etch stop layer Xi nitrogen fossil method for producing U 2 4 which cover layer 3 of the item of interest range dual damascene structure., The second insulating layer is formed between said anti-reflective layer and the protective cover 0503-4358TW1; claire.Ptc 第13頁 1 ·如申凊專利範圍第4項所述的雙鑲嵌結構的製造方 外 5910 六 --案號 8811207^_ 丁 —^ 申請專利範ΐ ^ 法’其中上述抗反射遮蔽層為氮氧化石夕 6·如申請專利範圍第丨、2、3、4 、、、σ構的製造方法,其中更包括去除上二5項所述的雙鑲嵌 法 壁 法 幕 丄7·如申請專利範圍第6項所述的雔L /、山護壁的步驟。 、丄 Αφρ/Π ^ Γ Ϊ? ^ AL· 4 Θ又鑲嵌結構的掣;皮士 、中以02及认為钱刻氣體 k方 水刀一-人蝕刻上述保護 8 ·如申請專利範圍第7 τ5 其中蝕刻上述嵌入四描、所述的雙鑲嵌結構的製造方 曰及接觸窗係以光阻層的為軍0503-4358TW1; claire.Ptc page 13 1 · Except for the manufacture of the dual mosaic structure described in item 4 of the patent application 5910 VI-Case No. 8811207 ^ _ Ding-^ Patent application method ^ Law 'which The above-mentioned anti-reflection shielding layer is oxynitride. 6. The manufacturing method of the patent application No. 丨, 2, 3, 4, 4, and σ structure, which further includes removing the double mosaic method wall curtain described in item 2 and 5.丄 7. The steps of 、 L / mountain retaining wall as described in item 6 of the scope of patent application. , 丄 Αφρ / Π ^ Γ Ϊ? ^ AL · 4 Θ and the structure of the mosaic; Pi Shi, Zhong Yi 02 and think that the money carved gas k square water knife one-man etched the above protection 8 · Such as the scope of patent application 7 τ5 The manufacturing method of etching the above-mentioned embedded quadruple and the dual-damascene structure and the contact window are based on the photoresist layer. 0503-4358TWF1 ; claire.ptc 第14頁0503-4358TWF1; claire.ptc page 14
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7541276B2 (en) 2005-02-05 2009-06-02 Samsung Electronics Co., Ltd. Methods for forming dual damascene wiring for semiconductor devices using protective via capping layer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7541276B2 (en) 2005-02-05 2009-06-02 Samsung Electronics Co., Ltd. Methods for forming dual damascene wiring for semiconductor devices using protective via capping layer

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