TW457635B - Manufacturing process of copper structure - Google Patents

Abstract

This invention provides a manufacturing process to form a dual damascene opening in a composite insulation layers for dual damascene copper structure. This process is characterized by the use of a composite insulation layer of silicon oxide layer and multiple silicon nitride stop layers, using anisotropic reactive ion etching on the composite insulation layer to form the dual damascene opening. The increase in capacitance is minimized by reducing the thickness of the multiple silicon nitride stop layers to an extreme extent without sacrificing their function as etching stop layers. The dual damascene copper structure can reduce the RC delay effectively due to the better conductivity of copper and thinner silicon nitride stop layers in the composite insulation layer.

Description

457635 Five 'Inventions (1)' Field of invention: The present invention relates to the process of manufacturing semiconductor components, and in particular, to the formation of a pair of embedded openings in an insulating layer to accommodate a copper interface connection structure and a copper via structure. Production method. Background of the invention: Due to the application of submicron > or miniaturization process technology, the circuit density inside the integrated circuit is increasing, and the semiconductor industry can progress to very large integrated circuits (Very L a I * The development of wafer miniaturization process has further highlighted the importance of certain specific semiconductor process technologies, such as lithography and dry etching processes. The development of high-precision, photometer and high-sensitivity materials has enabled sub-micron images on photoresist layers to be known flatly. In addition, advanced dry etching equipment and technology are applied to the manufacture of ultra-large integrated circuit wafers. Submicron shadows on the photoresist layer can also be accurately traced to the material to be etched below. However, in order to reduce the size of semiconductor wafers, in addition to the above-mentioned innovations in advanced process technology, R & D is also required. Other special processes or structures, therefore, a dual-embedded pattern innovation process that can obtain metal wires has been developed. The system is characterized in that an inclusive layer is formed on the -insulating layer; a double-embedded figure with a wide opening at the top and an upper portion of the insulating layer is filled with metal to create a double-embedded opening in the double-embedded opening. The metal structure includes a metal surface connection structure at a wide opening, and a metal via structure D at a narrow opening. . The metal interface connection structure and the metal via structure in the dual-embedding process are filled with a single metal, which is better than the traditional process where the metal vias must be formed twice.

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, ''. Structure and metal interface connection structure. One of the key steps for Zhiyi Wangwang to penetrate into the opening is the ability to form or finalize the opening of the brother, so that the wide opening located on the upper part of an insulating layer will not be transferred to the lower part of the insulating layer, and this insulating The lower part of the floor is used for the horse-shaped Zhikuan pq e II ~ r pass j mouth. One method to solve this problem is to use a ^ ^ bit position between the first interface dielectric layer (Interlevel IU) layer and the second interface dielectric layer. The lower part of the dielectric layer of the first interface is deposited, the upper part of the dielectric layer of the second interface is deposited, and the upper part of the dielectric layer of the second interface is wide-opened. The barrier is used to create a wide opening in the dielectric layer of the second interface. Selectively burying η μ and forming a wide opening will expose a stop layer with a narrow opening. A ^^ dry-etching process is used to form the first interface 1 under the narrow opening in the stop layer by using the narrow opening inside the 摹 丄 in the two-layer dielectric layer as a mask to trace the pattern. …, And, it is necessary to effectively prevent the first interface from being used in a dry process with a low removal rate; as a remaining isolation layer. Thus, if a low dielectric ft number of oxygen = two layers is used, the stop layer is usually nitrided with a high dielectric constant: to achieve the desired selective etching. However, because the dielectric constant of the required layer is about 8 overnight, the capacitance produced by the layer must be RC de 1 ays and the performance of the device deteriorates. However, it is not desirable to obtain the present invention. Provide a novel process which can be used in the interface. Form a pair of embedded openings to accommodate metal interface connections and metal vias ^: However, the present invention is characterized by reducing the total thickness of the silicon nitride stop layer '=

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The comparison of the thick nitride layers used in the conventional technique 'minimizes capacitance in this way. The present invention is characterized in that a multiple silicon nitride stop layer is used, and it is strategically placed between the oxidation and insulation layers' because it is still thinner than a single thick gasified layer, so it can reduce the degree to which the device performance deteriorates. The stack of insulating layers is used to obtain double-embedded openings in a patterned order including the lower portion or the first dielectric 'dielectric layer to obtain a narrow opening hole, and a thin first nitride layer ^ = away from the first Above and below the interface dielectric layer. The stack of insulating layers also includes an upper or second interface dielectric layer which is overlaid on a second nitride layer on the upper surface of the first interface dielectric layer. This configuration allows the use of a selective reactive ion etching (RIE) process to create a wide opening in the second interface dielectric layer and the second gasified stone layer, and at the same time in the first interface dielectric layer A desired narrow opening is formed in the first silicon nitride layer. The total thickness of the multiple silicon nitride layer is less than the thickness of the early nitrided layer used in the dual-embedding process. In the conventional technique, such as Avanzino et al. 11.5 ·

Patent No. 5,686,354 and Huang et al. In US Patent No. 5, 6j5, 423 do not mention the dual-embedding process which can be used in the present invention to produce multiple stops with less capacitance than a single thick silicon nitride stop layer Floor. Summary of the Invention: The purpose of the present invention is to use a dual-embedding process to fabricate a metal interface connection structure and a metal via structure. Another object of the present invention is to provide a composite layer consisting of an insulating layer with a low dielectric constant and multiple thin silicon nitride layers in each layer of the composite insulating layer.

Page 6 457636 V. Description of the invention (4) The stage double-embedded graph of the present invention can be double-embedded in the composite insulation stage. The composite insulation layer is also used as a cover. According to the present invention, the double-entry opening is used to dry-etch the process layer. Composite insulation interface connection structure, such as the oxide layer, the second shadow and the second, the second silicon oxide, the second etching and the second etching, provided by the application layer to accommodate the subsequent application of the special layer is on top of the barrier. A thin second layer is formed by a wide range of selective etching to remove the exposed nitride stone layer and a first etching process is an insulating layer and the insulating layer can be embedded in the process and is located on the substrate metal-a first insulation Layer = this—the purpose is to apply a first silicon nitride layer on the first edge to stop the layer so that an upper part of an initial narrow opening f layer is formed, and the second case is the second silicon nitride layer: procedure As a stop layer in the middle, a wide opening can be formed, and the narrow opening formed by the narrow opening in the second silicon nitride layer can be used to micronize the silicon layer opening at a time in the lower silicon layer of the composite insulating layer. The first and second micro-layers are made of a silicon layer in the first opening, three in the insulating layer, and three insulating layers for the second selective process in the lower part of the mask. The successful process of nitridation is open and engraved to the redundant cutting process. After double embedding, the insulating layer can be triple-insulated after the metal is thinned. It is used to terminate the silicon layer and the silicon layer. In the insulation process, the required composite opening structure is formed. The silicon nitride is deposited and includes: a second layer such as oxygen and a third insulation layer are etched under the first silicon nitride layer and the silicon nitride layer is stopped. The edge layer in the lowermost layer and the silicon layer edge layer in the double layer are used as the insulating layer, and the edge layer front layer that forms the initial rate is the portion in the layer. The first layer prevents the formation of a final narrow barrier layer such as oxidation. A narrow 1 ratio starting from the second nitrogen makes. A first stop layer is initially narrow and the dinitride stops the compound opening. Will cause

Page 7 457635 V. Description of the Invention (5)-The part of the second silicon nitride layer exposed in the wide opening is removed. After the defined photoresist is removed, the double embedded openings in the composite insulating layer are deposited with metal to fill the openings. Then, the excess metal on the upper surface of the third insulating layer is removed to obtain a metal interface connection structure located in the wide opening and a metal guide in contact with the bottom of the metal interface connection structure and underneath and within the final narrow opening. The double embedded metal structure of the hole structure. Brief description of the drawings: In order to make the above and other objects, features, and advantages of the present invention more obvious and easy, the attached diagram is described as follows: Figure 1 shows a composite insulating layer with double embedded openings formed thereon later Schematic cross-section. Fig. 2 is a schematic cross-sectional view showing the formation of an initial narrow opening 10a in the composite insulating layer. Figure 3 shows that a photoresist 11 with a wide opening 12a having a diameter of approximately 0 * 28 to 0.38 micrometers is formed on the surface of the silicon oxide layer 8, and the upper surface exposes the initial narrow opening 10a and part of the A schematic cross-sectional view of the silicon oxide layer 8. The f 4 picture shows that the wide openings 2b can be predicted as a result of the selective etching rate, and the result is only present in the silicon oxide layer 8. This step will also cause the initial narrowness exposed in the original silicon nitride layer 7. A schematic cross-sectional view of the silicon oxide layer 4 under the opening pattern is also etched. Fig. 5 is a schematic cross-sectional view showing that the nitrided region exposed under the final narrow opening 1 Ob is not removed. This step will also remove the silicon nitride layer 7 exposed under the wide opening m.

Page 8 457635 V. Description of the invention (6) · ----- Figure 6 shows that after the metal layer is formed in the double-embedded opening, the excess metal core on the oxide stone layer 8 is removed by chemical mechanical polishing. A schematic cross-sectional view of the double-embedded metal structure 3 is formed after the wall layer. Preferred Embodiments: In order to make the above and other objects, features, and advantages of the present invention obvious and easy to understand, some preferred embodiments are given below and described in detail with the accompanying drawings as follows: An insulating layer such as a silicon oxide layer is described below. A double-insertion opening is formed in a composite insulating layer composed of multiple thin silicon nitride layers to accommodate the subsequent double-embedded metal structure, which will be described in detail below. The insulating layer in the composite insulating layer can use a material with a low dielectric constant, such as hard oxide or Boro-phosphosilicate. The dielectric constant is about 3.9, while other materials with a low dielectric constant have a low capacitance. And can improve performance, such as Hydrogen Silsesquioxane (HSQ) has a dielectric constant of about 2.8 to 3.0, which can be used to replace the oxidized dream. Figure 1 is a schematic cross-sectional view of a composite insulating layer on which a double embedded opening will be formed later. The silicon oxide layer 1 is first subjected to chemical mechanical polishing to obtain a flat upper surface. Secondly, through conventional lithography and reactive ion etching (R IE) to obtain an opening in the silicon oxide layer I, and then deposit a metal interface connection structure composed of copper or aluminum or a refractory metal such as tungsten in the opening 2 . If the metal interface connection structure 2 of the present invention is to be deposited with copper, a composite adhesive barrier layer such as titanium-titanium halide (not shown in the figure) shall be applied to the side walls of the opening in the silicon oxide layer 1 before the steel is deposited. Prevent copper from contaminating nearby

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V. Description of the invention (7) Caimi I deposited the composite adhesive barrier layer and the metal layer of steel after the R · F. Sputtering process can be removed by chemical mechanical grinding method, or using fluorine-based gas as the money engraving Reactive Ion Etching (RIE) of the agent. After copper is used as the metal interface connection structure 2, RF, clock = private need to use low pressure chemical vapor deposition (LPCVD) or plasma to promote chemistry, phase> child product (PECVD) to form a thickness of about 30 to 1 000 A Barrier layer, or metal (layer 3, such as a nitride layer). The metal protective layer 3 also acts as a barrier layer with copper and the material covered by Ik after each other. The silicon oxide layer 4 is formed by low-pressure chemical vapor deposition or electrical Forging promotes chemical vapor deposition to form a thin film with a thickness of about 5 0 0? To 6 0 0 0 A. A key thin second silicon nitride layer 5 is also a low pressure chemical vapor deposition or plasma to promote chemical gas. Phase deposited on the silicon oxide layer * to form a thin film with a thickness of about 25 to 175 A. The second silicon nitride layer 5 is used as a stop in the subsequent first lithography and first etching process. ^ The silicon monoxide layer 6 is also formed by a low-pressure chemical vapor deposition or plasma-assisted chemical vapor deposition to form a thin film having a thickness of about 3,000 to 4,000 A. A second silicon nitride layer 7 is used to form the film. Wide-opening stop layer, which is formed by low-pressure chemical vapor deposition or plasma-promoted chemical vapor deposition. A thin film of about 800 to 900 A. The subsequent silicon oxide layer 8 is also formed by a low pressure chemical vapor deposition or a plasma-assisted chemical vapor deposition to form a thin film having a thickness of about 5000 to 6000 A. In the composite insulating layer Materials such as silicon oxide layers 4, 6, and 8 are considered for their low dielectric constant, which is about 3.9, and the capacitance can be reduced to reduce the RC delay. To reduce the capacitance, the material can be low dielectric constant. , Esquioxane, HSQ). Hydrogen silsesquioxane such as Hydrogen Si 1S (Hydrogen Si 1S) has a dielectric constant of approximately 2.8 to 3.0 instead of stone oxide

Page 10 V. Description of the invention (8) The layer can be formed by applying a spin on process and can be covered with a thin siliconized layer. The silicon nitride layer is used as a stop layer for terminating the silicon nitride dry etching process. However, silicon nitride has a high dielectric constant of about 8, so one object of the present invention is to make the thickness of the silicon nitride as small as possible but Don't lose its function as a engraved stop layer. The present invention is characterized in that a multiple nitrogen ^ silicon stop layer is strategically placed between the silicon oxide insulating layers, allowing double-embedded opening = can be successfully formed in the insulating layer, without making each of the composite insulating layers obvious. increase. Figure 2 is a schematic cross-sectional view showing the formation of the initial narrow opening 1 in the composite insulating layer. The photoresist 9 is used as an etching mask, so that for the first time, the reactive ion engraving can use CHF3 as a post-etching agent to be fixed in the insulating layer 8 to form an initial narrow opening 10a. Using CHF3 as an etchant for the oxidized stone layer, the rate of the etch rate of the silicon oxide layer is 2/7 / the amount of money saved by the post-reaction material system

The two Γ dinitrides are oxidized ... The rate of removal of the nitride nitride layer 7 by V will not cause the button to move to CHF3 as the etchant anisotropic reaction. Then, the domain 'and then the fluorine-based compound, such as the CF: wide-rimmed layer 6, are exposed to the thin nitrogen-cut layer 5. The selective etching rate for the thin nitride selectivity is such that when the silicon oxide layer 4 and the layer 4 appear below it. The initial narrow opening ends at oxidized stone, as shown in Figure 2. The ', bit' force is from 0.2 to 0.22. V. Description of the invention (9) ~ --- After removing the photoresist 9 with oxygen electricity polyashing and wet cleaning, the diameter is about 0 · 2 8 A photoresist to a wide opening 1 2 a of 0.3 μm is formed on the surface of the silicon oxide layer 8, and the upper surface exposes the initial narrow opening and a part of the silicon oxide layer 8, which is shown in the third Illustration. The second anisotropic reactive ion silver engraving is used as a tincture to form a wide opening in the insulating layer 8. The ratio of the etched rate of the oxide dream layer 8 to the nitrided layer 7 is 2 out, so it is allowed Excessive etching to ensure that the silicon oxide layer 8 can be completely removed without the 2 IU dagger stop layer 7. Due to the selective money engraving rate, the wide opening coffee = only exists in the silicon oxide layer 8 according to the predetermined result, This is the second anisotropic reaction ion shown in the 4th and 8th shapes. When the 8th core of the oxidized stone layer is wide-opened, it will also cause exposure to the original nitrided layer? The oxide stone layer 4 under the opening pattern inside is also etched to form the final narrow opening 10b located there. The final narrow opening is only about 0.18 to 0.22 micron, which can be seen in Figure 4. The second layer leads to partial nitridation exposed to the oxidation "8; the layer is left for a while, this is also shown in Figure 4.-The isotropic reactive ion ㈣ is applied to remove the narrow, The silicon nitride layer 3 area under the opening 10b. This compound, such as CF4, CH2F2, or CH3F, is used as an etchant to select the exposed part of the stone layer 3. This step will also select ^ Messy ^ "Silicon layer 7, which is shown in Figure 5 e again to remove the photoresist cleansing 丨 丨 β #Electrical purple ashing and wet layer neutralization: a composite of layers and multiple thin nitrogen cut layers Insulation ... open / into double insertion open ... double into opening including wide opening m

Fifth, the description of the invention (10) and the final narrow opening 10 b below it to accommodate the subsequent double-embedded metal structure have now been prepared. A copper metal layer having a thickness of about 10,000 to 15,000 A is formed by a chemical vapor deposition or R. F. sputtering process to completely fill the double embedded openings including the wide opening 12b and the final narrow opening 10b below it. If necessary, tantalum or tantalum nitride should be coated on the inner side wall of the double embedded opening as a barrier layer before the copper metal layer is deposited. After the excess copper and the barrier layer on the silicon oxide layer 8 are removed by chemical mechanical polishing, a double-embedded metal structure 13 is formed, as shown in FIG. The double-embedded copper metal structure of the present invention can reduce RC delays more effectively because a thinner silicon layer is used as the stop layer. 4 Although the present invention has been disclosed in the preferred embodiment as above, and then the present invention is limited to anyone skilled in the art, I will not depart from the scope of the present invention, but can make some modifications and retouches. Therefore, the scope of the present invention = scope When considering the scope of the attached patent application as the standard

Claims (1)

457635 VI. Scope of patent application 1. A manufacturing method of forming a pair of embedded openings on a semiconductor substrate to form a pair of intercepted metal structures, wherein the double embedded openings are formed in a composite insulating layer 'including the following steps : Forming a substrate metal interface connection structure; depositing a barrier layer; depositing the composite insulating layer on the P soap wall layer, the composite insulating layer is a first insulating layer of a substrate, a first nitrogen Composed of a silicon layer, a second insulating layer, a t-th silicon nitride layer, and a third insulating layer; a first photoresist is used as a mask to place the third insulating layer, the first nitride stone An initial narrow opening is formed in Zhan, the second insulating layer, the first nitride stone layer, and the like; a second photoresist is used as a mask to form a wide opening in the third insulating layer, and The initial narrow opening in the second silicon nitride layer is used as a mask to remove the first insulating layer to form one of the final embedded openings. The final narrow opening is included in the second nitride layer , The second insulation layer, Within the first silicon nitride layer and the first insulating layer, etc .; removing the area of the barrier layer exposed at the bottom of the final narrow opening to expose the upper surface of a portion of the substrate metal interface connection structure will also remove the exposure The second silicon nitride layer region under the wide opening; and forming the double private metal structure in the double embedded opening in the composite insulating layer, so that the double embedded metal structure contacts the double embedded person ^ Λ the upper surface of the substrate metal interface connection structure at the bottom. 2. The method according to item 1 of the scope of the patent application, wherein the barrier layer is formed by low-pressure chemical vapor deposition or plasma-promoted chemical vapor deposition. 457635 6. Scope of patent application Nitrided sand layer with a thickness of about 300 to 1000A. 3. The method as described in item 1 of the scope of the patent application, wherein = * the insulating layer is a low-pressure chemical vapor deposition or plasma-promoted chemical # stomach 〃., An oxidation with a thickness of about 5000 to 600 0 A Broken layer. The milk order is deposited 4. The method as described in item 1 of the scope of patent application, wherein a silicon nitride layer is formed by low-pressure chemical vapor deposition or plasma-promoted chemical wind forming a thickness of about 1 2 5 to 1 7 5 A The film. Subphase > Child product 5. The method according to item 1 of the scope of patent application, wherein the insulating layer is promoted by low-pressure chemical vapor deposition or electropolymerization with a thickness of about 3000 to 4 0 0 Α Oxidized hard layer. b & phase deposition into 6 _ The method as described in item 1 of the scope of patent application, wherein the silicon nitride layer is formed by a low-pressure chemical vapor deposition or plasma-assisted Λ to form a thin mold having a thickness of about 800 to 900 people. . Lianhua 卞 Emulsion Phase Deposition 7. The method described in item 1 of the scope of patent application, wherein the insulating layer is formed by low-pressure chemical vapor deposition or plasma-assisted chemical oxidation, with a thickness of about 5000 to 6000 A. Silicon layer. ′, Zer accumulation, 8. The method according to item 1 of the scope of patent application, wherein the port is used for anisotropic reactive ion etching. How to act as an etch :; 丨 the edge layer and the second insulating layer are formed, and the second insulating layer and the second insulating layer for the second nitride stone layer are formed by CHF "Zhuwei" ^ ^ The silicon layer is etched at a ratio of 2 to 1, and 2: 'such as cf4, ch2f2 or CH3F as an etchant for selective etching; the first nitride stone layer' uses a fluorine-based compound as an etchant. A siliconized layer and the first silicon nitride layer for the third insulating layer Page 15 457635 VI. The scope of the patent application The ratio of the rate of silver engraving to the second insulation layer of Haihai is 8 to 1. & 9. The method according to item 1 of the scope of patent application, wherein the diameter of the initial narrow opening is about 0.18 to 0.22 microns. In ° 3 1 The method as described in item 1 of the scope of patent application, wherein the wide opening is formed in the third insulating layer by using anisotropic reactive ion etching using ML as an etchant and using CHF3 as an etching The ratio of the third insulating layer to the etching rate of the second silicon nitride layer is 2 to 1. 11. The method as described in item 1 of the scope of patent application, wherein the mouth has a diameter of about 0.28 to 0.32 microns. " · 4, 12. The method as described in item 丨 of the patent application scope, wherein the region exposed at the bottom of the final opening and removing the exposed: the region of the second silicon nitride layer below the port is Anisotropic reaction m 2 using a fluorine-based compound, such as cf4, ch2f2 or CH3F, as an etchant. Selective etching is performed on the portion to be removed, and a fluorine-based compound is used as an etchant to obtain the barrier layer and the second nitrogen. The ratio of the etched rate of the siliconized layer to the third insulating layer is 8 to 1. 13. As described in item 1 of the scope of the patent application, which is formed in the Shuangxin entrance 1: the opening A double-embedded metal structure is copper. A cone is a method of forming a stone layer structure in a double-inserted opening in a composite insulation layer, wherein the composite insulation layer is composed of an etch stop layer of silicon oxide nitride The method includes the following steps: / Basic metal interface connection structure: Redundant-a mouse silicon layer covers the substrate metal interface connection structure; a first silicon oxide layer covers the first silicon nitride layer; ΗΗΙ 酬 第 16 页 6. Application scope of patents / child product The second silicon nitride layer is deposited on the second layer—the second oxygen cut layer cover; the first: the oxygen cut layer; the deposition—the third silicon nitride layer = the first— Lice silicon layer, the third silicon oxide layer is covered with a gaseous silicon layer, the silicon nitride is wide, the second silicon oxide: n "silicon trioxide, the deaf isotropic forms the initial narrow opening ; X non-isotropic formation within a silicon nitride layer, etc. -in; inside the third oxygen cut layer to produce the double-embedded eight openings at the initial narrowness of the third nitride: ir㈣: A uniform narrow opening instead of isotropically removing the region 4 exposed at the bottom of the first silicon nitride layer will also anisotropically remove the exposed area ;: Hai: the final narrow opening of the third silicon nitride layer region; See the deposited steel layer under the opening; and ^ remove the copper layer part above the upper surface of the third silicon oxide layer, the copper layer is formed in the double-embedded layer in the composite insulating layer The replacement embedded copper structure in the opening, so that the double embedded copper structure is composed of a copper interface connection structure and a bit located inside Tankuan's mouth. The final narrow-opened copper open-via structure is composed of the method described in item 14 of the patent application scope, wherein the first nitride layer is formed by low-pressure chemical vapor deposition or electrical The slurry promotes chemical vapor phase, and redundantly forms a nitrided layer with a thickness of about 300 to 1 000 A. 'd 57 S SB _: ___________ VI. Scope of patent application 1 6. As described in item 14 of the scope of patent application Method 'wherein' the first silicon oxide layer is formed by a low pressure chemical vapor deposition or electro-chemical deposition to form a oxidized stone layer with a thickness of about 5000 to 6000 A. 1Γ7. The method described above, wherein the first nitride layer is formed by a low-pressure chemical vapor deposition or electro-promoted chemical vapor deposition to form a thin film having a thickness of about 125 to 175 Λ. The method described above, wherein the second silicon oxide is a low-pressure chemical vapor deposition or plasma-assisted chemical vapor deposition forming—a silicon oxide layer having a thickness of about 3000 to 4000 A. 1 9. As described in the scope of patent application 4 The method according to the above item, wherein the second nitrogen The silicon layer is formed by a low-pressure chemical vapor deposition or a plasma-assisted chemical vapor deposition to form a thin film having a thickness of about 800 to 900 A. Therefore, 20. The method according to item 14 of the scope of patent application, wherein, The second oxidation is a low-pressure chemical vapor deposition or plasma-assisted chemical vapor deposition forming—a silicon oxide layer having a thickness of about 5000 to 6000 A. 21. The method according to item 14 of the scope of patent application, Wherein, the diameter of the initial narrow opening and the final narrow opening are about 0.18 to 0.28 micrometers. 22. The method according to item 14 of the scope of patent application, wherein the initial pa-agent In ^ Kai = 疋 using anisotropic reactive ion etching using CHFS as an etching compound, the third oxide layer and the second oxide layer are formed, and fluorine-based tasks such as ^ 4 'Cth or CHJ as the rest The etchant is formed by selectively etching the first sand layer and the second silicon nitride layer. 2 3. The method according to item 14 of the scope of patent application, wherein Page 18 4 5 7 6 3 The ratio of silicon oxide to silicon nitride etched rate 6. Scope of patent application CHF3 as an etchant makes the ratio of 2 to 1. 24. The method as described in item 4 of the scope of the patent application, wherein the gas f compound, such as CF4, CI ^ F2, or CHSF, is used as an etchant so that the ratio of the etching rate of silicon nitride to siliconized gas is 8 ratios. 1. 2. The method as described in item 14 of the scope of patent application, wherein the wide opening is formed in the third silicon oxide layer by using anisotropic reactive ion etching using CHF3 as an etchant, and using CHF3 as an etching The agent is such that the ratio of the etched rate of silicon oxide to silicon nitride is 2 to 1. 2 6. The method according to item 丨 4 of the scope of patent application, wherein the diameter of the wide opening in the third silicon oxide layer is about 0.28 to 0.38 microns. 27. The method according to item η of the scope of patent application, wherein the area where the first silicon nitride layer is exposed at the bottom of the final narrow opening and the third gasified stone exposed under the wide opening are removed. The layer region 'is anisotropic reactive ion etching using a fluorine-based compound' such as CF4, CH2F2 or CH3F as an etchant to selectively etch the portion to be removed 'using a fluorine-based compound as an etchant to make silicon nitride The ratio of the etched rate of silicon oxide is 8 to 1. Page 19