JP2001313336A - Manufacturing method of copper structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To manufacture metal wiring structure and metal via structure using a double-fitting process. SOLUTION: In this process, a double-fitting opening part with double-fitting copper structure is formed in a composite insulation layer, consisting of a silicon oxide layer and a multiple silicon nitride stop layer. Through anisortopic reactive ion etching, the double-fitting opening part is formed in the composite insulation layer. The thickness of the multiple silicon nitride stop layer is made as small as possible, without losing performance as an etching stop layer to prevent marked increase in the electrical capacity. The double-fitting copper structure uses a thin silicon nitride layer as a stop layer in the composite insulation layer, and also since copper having high conductivity is adopted RC delay is reduced effectively.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device, in which a copper wiring structure (copp
er interconnect) and copper via structure (copper via struc)
dual damascene op with tures
ening).

[0002]

BACKGROUND OF THE INVENTION The application of sub-micron and microminiaturized technologies has increased the circuit density of the semiconductor industry to very large scale integrated (VLSI) chips. The development of ultra-miniaturized manufacturing processes further emphasizes the importance of certain semiconductor manufacturing technologies such as light exposure and dry etching. High-precision exposure camera (mode
The development of sophisticated exposure cameras and the use of highly sensitive materials have made it easier to obtain submicron images in photoresist layers. In addition, advanced dry etching equipment and techniques have enabled sub-micron images on photoresist to be accurately and accurately transferred to materials to be etched in the manufacture of very large scale integrated circuit chips.

However, in order to integrate a semiconductor chip, research and development of other special manufacturing processes and structures are required in addition to the above-described advanced manufacturing technology. by this,
A new manufacturing process for a double fitting pattern that can obtain metal wires has been developed.

[0004] The feature of the manufacturing process of the double fitting opening is that the insulating layer has a lower narrow diameter opening (narrow diameter op- eration).
ening) and wider diameter openin at the top
g) is formed, and the double fitting opening on the insulating layer is filled with metal to form a metal wiring structure located at the wide-diameter opening and a metal wiring structure located at the narrow-diameter opening. A metal structure including a metal via structure is provided in the double fitting opening. Since the metal wiring structure and the metal via structure in the manufacturing process of double fitting are formed by only one metal filling, the metal via and the metal wiring need to be formed in two separate steps. Is also excellent.

[0005]

An important step in forming a double fitting opening is to form a pattern of a wide-diameter opening when forming a wide-diameter opening above an insulating layer. Is not transferred below the insulating layer. To solve this problem, a first interlevel dielectric (ILD) layer and a second ILD
There is a method of interposing a stop layer between the layers. In a configuration in which a stop layer is provided between the lower part of the insulating layer or the first ILD layer and the upper part of the insulator or the second ILD layer,
After forming the desired narrow opening, a photoresist layer having the shape of the wide opening is formed.

This photoresist layer is used as a mask for forming a wide-diameter opening in the second ILD layer,
After the formation of the wide opening, the stop layer having the narrow opening is exposed. This stop layer serves as a mask when a wide-diameter opening is formed in the second ILD layer by selective dry etching, and etching is not performed on portions other than the first ILD layer exposed below the narrow-diameter opening of the stop layer.

Further, in order to effectively prevent unnecessary etching of the first ILD layer, a thick stop layer having a low removal rate is used in the dry etching step of the insulating layer. This allows the desired selective etching to be achieved by using low dielectric constant silicon oxide as both ILD layers and typically using a high dielectric constant silicon nitride layer for the stop layer. However, a silicon nitride stop layer having a dielectric constant of 7 requires a thickness, and thus has a large capacitance,
There is a problem that the RC delays increase and the performance of the device is reduced.

Therefore, the present inventors have found that, by reducing the thickness of the silicon nitride stop layer in the composite insulating layer and using a composite insulating layer intentionally divided into multiple layers between the silicon oxide insulating layers, it is known that The inventors have found that the electric capacity is smaller than that of the composite insulating layer having a single thick silicon nitride layer employed in the technology, and that the deterioration of the performance of the device can be minimized.

That is, in the present invention, the composite insulating layer which is patterned to obtain the double fitting opening is configured as follows from the metal wiring structure upward. Barrier layer / lower first IDL layer / first silicon nitride layer / upper first ID
L layer / lower second IDL layer / second silicon nitride layer / upper second
IDL layer

With this configuration, selective ion etching (reactive ion etching, hereinafter referred to as RIE) is performed.
Can be used to form a wide diameter opening in the second ILD layer and the second silicon nitride layer while simultaneously forming a desired narrow diameter opening in the first ILD layer and the first silicon nitride stop layer.
The sum of the thicknesses of each silicon nitride layer is less than the thickness of a single silicon nitride stop layer used in a conventional double inlay process. Also, in a double-insertion process provided by a known technique such as U.S. Pat.No. 5,686,354 to Avanzino and U.S. Pat. Does not mention that it exhibits lower electric capacity than the insulating layer in the above.

[0011]

SUMMARY OF THE INVENTION An object of the present invention is to manufacture a metal wiring structure and a metal via structure by a double fitting process. Another object of the present invention is to form a double-fitting opening in a composite insulating layer composed of multiple thin silicon nitrides located in each of the low dielectric constant insulating layer and the composite insulating layer.

Further, the present invention provides a method of manufacturing a semiconductor device, comprising the steps of:
The first narrow opening can be formed in the upper part of the composite insulating layer, and in the second stage of the double fitting patterning process,
Using the silicon nitride layer as a stop layer, a wide-diameter opening can be formed above the composite insulating layer, and the narrow-diameter opening in the second silicon nitride layer is used as a mask, and the final narrow-diameter opening is positioned below the composite insulating layer. Another object is to be able to form.

[0013]

According to the manufacturing process provided by the present invention, a double-fitting opening having a double-fitting metal structure is formed in a composite insulating layer, and a special process is performed in a double-fitting dry etching process. Multiple thin silicon nitride layers can be used as a stop layer. After the barrier layer is formed on the metal wiring structure, the composite insulating layer includes a first insulating layer such as a silicon oxide layer, a thin first silicon nitride layer, a second insulating layer such as silicon oxide, a second silicon nitride. A layer and a third insulating layer such as a silicon oxide layer are deposited and formed.

By the first light exposure and the first etching process, the first narrow opening continuous with the third insulating layer, the second silicon nitride layer, the second insulating layer, and the thin second silicon nitride layer is formed. Form. The first etching step can be completed before the first insulating layer depending on the etching rate ratio of the silicon oxide insulating layer to the silicon nitride layer.

In the second light exposure and the second etching step, the second silicon nitride layer is used as a stop layer, the third insulating layer is used to form a large-diameter opening, and the second silicon nitride layer is used as a mask to narrow the second silicon nitride layer. Etch the composite insulating layer below the radial opening. The second silicon nitride layer is used as a stop layer in the second selective dry etching step to prevent the lower portion of the composite insulating layer from being eroded, and to obtain a desired final narrow opening. it can.

The selective removal of the barrier layer exposed under the double-fitting opening removes the second silicon nitride layer exposed in the wide diameter opening. After removing the formed photoresist, a metal layer is deposited which fills the double fitting openings in the composite insulating layer. When the excess metal on the upper surface of the third insulating layer is removed, the metal wiring structure located in the wide-diameter opening and the bottom of the metal wiring structure located below come into contact with the metal via structure located in the final narrow-diameter opening. A double-fitting metal structure consisting of

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION In order to further clarify the above-mentioned objects, features and advantages of the present invention, preferred embodiments of the present invention will be described below with reference to the drawings. A method for manufacturing a double-fitting opening with a double-fitting metal structure in a composite insulating layer consisting of an insulating layer such as silicon oxide and a thin silicon nitride layer is described below.

The insulating layer in the composite insulating layer includes silicon oxide and
Low dielectric constant materials such as Boro-Phosphosilicate can be used (both have a dielectric constant of about 3.9). Further, even if a material such as hydrogen silsesquioxane (hereinafter, HSQ) having a dielectric constant of about 2.8 to 3.0 has a low electric capacity and can improve performance, silicon oxide may be used. Can be replaced by layers.

FIG. 1 shows a schematic cross section of a composite insulating layer in which a double fitting opening is formed. First, chemical mechanical polishing (CMP)
As a result, a flattening step is performed on the silicon oxide layer 1 to smooth the surface. Next, an opening is provided in the silicon oxide 1 by conventional light exposure and ion etching (RIE), and a copper and aluminum base layer (alum) is provided in the opening.
A metal wiring structure 2 is formed by depositing a refractory metal such as an inum based layer) or tungsten (tungsten).

When copper is to be deposited on the metal wiring structure 2 of the present invention, the side wall of the opening in the silicon oxide layer 1 is previously coated with a composite adhesive barrier layer such as titanium-titanium nitride (not shown). It must be coated so that the copper does not contaminate nearby materials. R. After depositing the composite sticky barrier layer and copper by the F sputtering process, the excess metal layer is removed by chemical mechanical polishing (CMP) or selective reactive ion etching (RIE) using a fluorine-based gas as an etchant. be able to.

After the formation of the metal wiring structure 2 made of copper is completed, a low pressure chemical vapor deposition (LPCVD) or plasma chemical vapor deposition (PECVD) process is performed to a thickness of about 300 nm.
Form a silicon nitride layer, ie, a barrier layer or metal passivation layer 3, of 〜1000 °. The metal passivation layer 3 or silicon nitride layer is used as a barrier layer and prevents the interaction between copper and the overlying material.

The silicon oxide layer 4 is made of LPCVD or PECV
Step D forms a thin film having a thickness of about 5000 to 6000 ° on the passivation layer 3 which is a silicon nitride layer.

An important thin second silicon nitride layer 5 is an LPC
A thin film having a thickness of about 125 to 175 ° is formed on the silicon oxide layer 4 by a VD or PECVD process. The second silicon nitride layer 5 is used as a stop layer in the subsequent steps of primary light exposure and primary etching.

The other silicon oxide layer 6 is formed by LPCVD or P
The thin film having a thickness of about 3000 to 4000 degrees is formed by the ECVD process.

The third silicon nitride layer 7 is formed by LPCVD or P
It is formed as a thin film having a thickness of about 800 to 900 ° by the ECVD process, and is used as a stop layer when forming a wide-diameter opening.

The silicon oxide layer 8 is made of LPCVD or PEC.
By the VD process, a thin film having a thickness of about 5000 to 6000 degrees is formed.

The materials used for the composite insulator layers, such as silicon oxide layers 4, 6 and 8, reduce their capacitance and reduce RC delay due to their low dielectric constant of about 3.9. Can be. Further, a material having a low dielectric constant and a decrease in electric capacity, for example, a material having a dielectric constant of about 2.8 to 3.0 such as hydrogen silsesquioxane (HSQ) can be replaced with silicon oxide. The HSQ layer is formed by a spin-on process and can be covered with a thin silicon oxide layer.

The silicon nitride layer is used as a stop layer to complete the dry etching step of the silicon oxide layer. However, since silicon nitride has a high dielectric constant of about 7, it is an object of the present invention to reduce the thickness of the silicon nitride layer as much as possible while not losing its function as an etch stop layer. . The present invention is characterized in that a thin silicon layer is intentionally divided into multiple layers and provided in an insulating layer, a double-fitting opening is formed in the insulating layer, and the electric capacity of the composite insulating layer is not increased. I do.

FIG. 2 is a sectional view showing the formation of the first narrow-diameter opening 10a in the composite insulating layer. Photoresist layer 9 is formed in a desired pattern on silicon oxide layer 8 using conventional techniques. And CHF
_In the first anisotropic RIE using ₃ as an etching agent, the first narrow opening 10 is formed in the silicon oxide layer 8 by acting as an etching mask. When CHF ₃ is used as an etching agent, the etching rate ratio of the silicon oxide layer to the silicon nitride layer is 2: 1.

Therefore, after exposing the silicon nitride layer, the RI
The etching agents used in E are CF ₄ , CH ₂ F ₂ , CH ₃ F
It is necessary to selectively etch the exposed portion of the silicon nitride layer 7 by changing to a fluorine compound as described above. In this situation, the ratio of the etching rate of the silicon nitride layer to the silicon oxide layer is 8: 1. Excessive etching surely removes the silicon nitride layer 7 but does not erode important parts of the silicon oxide layer 6.

Again, the exposed portion of the silicon oxide layer 6 is subjected to anisotropic RIE using CHF ₃ as an etching agent, and thereafter the etching agent is changed to a fluorine compound such as CF ₄ , CH ₂ F ₂ , CH ₃ F. Then, the thin silicon nitride layer 5 is etched. The difference in etch rate ratio between the thin silicon nitride layer 5 and the underlying silicon oxide layer 4 terminates the etching of the thin silicon nitride layer when the silicon oxide layer 4 appears. The first narrow opening 10a having a diameter of 0.18 to 0.22 μm is as shown in FIG.

Plasma oxygen ash (plasma oxygen ashi)
After removing the photoresist 9 by ng) and wet cleans, the photoresist 11 having a large-diameter opening 12a having a diameter of about 0.28 to 0.38 μm is formed by exposing a part of the silicon oxide layer 8 to a part. To form on the surface of the silicon oxide layer 8. This is shown in FIG.

In the second anisotropic RIE, a wide-diameter opening 12b can be formed in the silicon oxide layer 8 using CHF ₃ as an etching agent. Silicon oxide layer 8 vs. silicon nitride layer 7
Since the etching rate ratio is 2: 1, excessive etching surely removes the silicon oxide layer 8 but does not penetrate the silicon nitride stop layer 7. Due to the selective etching rate ratio, the wide opening 12b is
It is formed only inside. This is shown in FIG.

Further, when the large-diameter opening 12b is formed in the silicon oxide layer 8 by the second anisotropic RIE, the large-diameter opening 12b is formed under the first narrow-diameter opening pattern previously formed in the silicon nitride layer 7. The exposed silicon oxide layer 4 is etched,
A final narrow opening 10b is formed in the silicon oxide layer 4. The diameter of the final narrow opening 10b is about 0.18 to 0.1.
At 22 μm, it can be seen in FIG. Silicon oxide layer 4
During the etching, a part of the silicon nitride layer 7 exposed below the silicon oxide layer 8 is etched. This is also shown in FIG.
Is shown in

By the final anisotropic RIE, the region of the silicon nitride layer 3 exposed in the final narrow opening 10b is removed. In this step, a fluorine compound such as CF ₄ , CH ₂ F ₂ or CH ₃ F is used as an etching agent, and the silicon nitride layer 3 is used.
Is selectively etched. By this step, the silicon nitride layer 7 exposed under the wide-diameter opening 12b is also removed. This is shown in FIG. Subsequently, the photoresist 11 is removed by plasma oxygen ashing and wet cleaning.

A double-fitting opening formed in a composite insulating layer consisting of a silicon oxide layer and multiple thin silicon nitride layers,
With the wide diameter opening 12b and the final narrow diameter opening 10 below it, the preparation for providing a double-fitting metal structure is completed.

CVD or R.I. By the F sputtering process, a copper layer having a thickness of about 10,000 to 15,000 is formed,
The double fitting opening consisting of the wide opening 12b and the final narrow opening 10b is completely filled. If necessary, before depositing the copper layer, tantalum (tantalu
m) or tantalum nitride, which is used as a barrier layer. Excess copper and a barrier layer are removed from the surface of the silicon oxide layer 8 by a chemical mechanical polishing method,
A double-fitting metal structure 13 is formed. This is shown in FIG.

The double-fitting metal structure 13 of the present invention can effectively reduce RC delay by using a thin silicon nitride layer as a stop layer. Although the preferred embodiments of the present invention have been disclosed as described above, they are not intended to limit the present invention in any way, and various persons skilled in the art can make various modifications without departing from the spirit and scope of the present invention. Variations and hydrations can be added, and the protection scope of the present invention is based on the contents specified in the claims.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view of a composite insulating layer in which a double fitting opening is formed according to the present invention.

FIG. 2 is a schematic cross-sectional view showing the formation of the first narrow opening 10a in the composite insulating layer in the present invention.

FIG. 3 In the present invention, the diameter is about 0.28 to 0.38 μm.
The photoresist 11 having a wide opening 12a of m
FIG. 2 is a schematic cross-sectional view showing that the first narrow opening 10 a and a part of the silicon oxide 8 are formed on the surface of the silicon oxide layer 8 exposing the silicon oxide layer 8.

FIG. 4 shows that, according to the present invention, a wide-diameter opening 12b is present only in the silicon oxide layer 8 due to the selective etching rate, and is exposed under the first narrow-diameter opening pattern in the original silicon nitride layer 7. 3 is a schematic sectional view showing that a silicon oxide layer 4 is etched.

FIG. 5 is a diagram showing a process for removing a silicon nitride layer 3 exposed under a final narrow opening 10b according to the present invention.
FIG. 4 is a schematic cross-sectional view showing removal of the silicon nitride layer 7 exposed below 12b.

FIG. 6 shows a method of forming a metal layer in a double-fitting opening according to the present invention, and then removing excess metal and a barrier layer from the surface of the silicon oxide layer 8 by a chemical mechanical polishing method. 2 is a schematic cross-sectional view showing forming.

[Description of Signs] 1 ... Silicon oxide layer 2 ... Metal wiring structure 3 ... Metal passivation layer 4 ... Silicon oxide layer 5 ... Second silicon nitride layer 6 ... Silicon oxide layer 7 ... Third silicon nitride layer 8 ... Silicon oxide layer 9: photoresist 10a: initial narrow diameter opening 10b: final narrow diameter opening 12a: wide diameter opening having a diameter of about 0.28 to 0.38 μm 12b: insulating layer 8 wide diameter opening 13: double Inlaid copper metal structure

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference) SS15 SS21 TT02 XX24

Claims (27)

[Claims] 1. A method of manufacturing a double-fitting metal structure in a double-fitting opening on a semiconductor substrate, wherein the double-fitting opening is formed in a composite insulating layer and comprises a metal wiring structure. Forming a first insulating layer, a first silicon nitride layer, and a second insulating layer on the barrier layer.
Depositing the composite insulating layer comprising an insulating layer, a second silicon nitride layer, and a third insulating layer; and using the first photoresist as a mask, the third insulating layer, the second silicon nitride layer, and the second insulating layer. Forming a first narrow diameter opening in the insulating layer and the first silicon nitride layer; forming a wide diameter opening in the third insulating layer using a second photoresist as a mask; Using the first narrow opening in the silicon nitride layer as a mask, the first
The insulating layer is removed, and the final narrow-diameter opening of the double fitting opening is formed by the second silicon nitride layer, the second insulating layer, and the first insulating layer.
Forming a silicon nitride layer on the first insulating layer; removing a region of the barrier layer exposed at the bottom of the final narrow-diameter opening to expose a surface of the metal wiring structure;
Removing the second silicon nitride region exposed at the wide-diameter opening; connecting to the surface of the metal structure located at the bottom of the double-fitting opening in the double-fitting opening in the composite insulating layer; Forming the double-fitting metal structure. 2. The method according to claim 1, wherein the barrier layer is formed by low pressure chemical vapor deposition (LPC).
The method according to claim 1, wherein the silicon nitride layer is obtained by a VD) or plasma enhanced chemical vapor deposition (PECVD) process and has a thickness of about 300 to 1000 °. 3. The method according to claim 1, wherein the first insulating layer has a thickness of about 5,000 to 6, obtained by the LPCVD or PECVD process.
2. The method according to claim 1, wherein the silicon oxide layer has a thickness of 2,000.degree. 4. The method according to claim 1, wherein the first silicon nitride layer is formed by the LPCVD.
Alternatively, the thickness is about 125 to 175 by the PECVD process.
The method according to claim 1, wherein the method is formed by Å. 5. The method according to claim 5, wherein the second insulating layer has a thickness of about 3000 to 4 obtained by the LPCVD or PECVD process.
2. The method according to claim 1, wherein the silicon oxide layer has a thickness of 2,000.degree. 6. The method according to claim 6, wherein the second silicon nitride layer is formed by the LPCVD.
Alternatively, the thickness is about 800 to 900 by the PECVD process.
The method according to claim 1, wherein the method is formed by Å. 7. The method according to claim 6, wherein the third insulating layer has a thickness of about 5,000 to 6, obtained by the LPCVD or PECVD process.
2. The method according to claim 1, wherein the silicon oxide layer has a thickness of 2,000.degree. 8. The first narrow opening is formed in the third insulating layer and the second insulating layer by anisotropic reactive ion etching (RIE) using CHF ₃ as an etching agent. Formed in the third
The etching rate ratio of the insulating layer to the second silicon nitride layer and the etching rate of the second insulating layer to the first silicon nitride layer is about 2: 1 respectively, while CF ₄ , CH ₂ F ₂ , CH ₃ F, etc. The second silicon nitride layer and the first silicon nitride layer are selectively etched using a fluorine compound as an etchant, so that the second silicon nitride layer and the third insulating layer, and the first silicon nitride layer The method of claim 1, wherein the ratio of etching rate of the second insulating layer to each of the second insulating layers is about 8: 1. 9. The method of claim 1, wherein the diameter of the first narrow opening is about 0.1.
2. The method according to claim 1, wherein the thickness is 8 to 0.22 μm.
The production method described in 1. 10. The wide-diameter opening is formed in the third insulating layer by anisotropic RIE using CHF ₃ as an etching agent, and an etching rate of the third insulating layer to the second silicon nitride layer. 2. The method according to claim 1, wherein the ratio is 2: 1. 11. The wide diameter opening having a diameter of about 0.28 to about 0.28.
2. The method according to claim 1, wherein the thickness is 0.32 [mu] m. 12. The barrier layer exposed at the bottom of the final narrow-diameter opening and the second silicon nitride layer exposed under the wide-diameter opening are formed of CF ₄ , CH ₂ F ₂ , CH ₃ F or the like. Is removed by anisotropic RIE using a fluorine compound as an etching agent, and the etching rate ratio of the barrier layer to the third insulating layer and the etching rate ratio of the second silicon nitride layer to the third insulating layer is about 8: 1. The method according to claim 1, wherein: 13. The manufacturing method according to claim 1, wherein the double-fitting metal structure formed in the double-fitting opening is made of copper. 14. A method for forming a double-fitted copper structure in a double-fitting opening in the composite insulating layer, the composite insulating layer comprising a silicon oxide and silicon nitride etch stop layer to form a metal interconnect structure. Depositing the first silicon nitride layer covering the metal wiring structure; depositing the first silicon oxide layer covering the first silicon nitride layer; covering the first silicon oxide layer Depositing the second silicon nitride layer, depositing the second silicon oxide layer covering the second silicon nitride layer, and depositing the third silicon nitride layer covering the second silicon nitride layer. Depositing, depositing the third silicon oxide layer covering the third silicon nitride layer, using the first photoresist as a mask,
Forming a first narrow opening in the silicon oxide layer, the third silicon nitride layer, the second silicon oxide layer, and the second silicon nitride layer; and using the second photoresist as a mask, Third
The third silicon nitride layer, the second oxide layer, and the second oxide layer are formed anisotropically in the silicon oxide layer while using the first narrow aperture in the third silicon nitride layer as a mask. Forming the final narrow diameter opening in the silicon layer, the second silicon nitride layer, and the first silicon oxide layer to produce the double-fitting opening; Anisotropically removing the exposed first silicon nitride layer portion and the region of the third silicon nitride layer exposed below the wide-diameter opening; depositing a copper layer; The copper layer portion on the silicon layer surface is removed, the double-fitting opening in the composite insulating layer, the copper wiring structure located in the wide-diameter opening, and the copper wiring structure located in the final narrow-diameter opening. Forming the double-fit copper structure comprising a copper via structure; The method according to claim 1, wherein the Ranaru. 15. The method according to claim 15, wherein the first silicon nitride layer is formed by the LPCVD.
Alternatively, the thickness is about 300 to 100 by the PECVD process.
15. The manufacturing method according to claim 14, wherein the angle is formed at 0 °. 16. The method according to claim 16, wherein the first silicon oxide layer comprises the LPCV.
D or a thickness of about 5000 to 6 by the PECVD process.
15. The manufacturing method according to claim 14, which is formed at 000 °. 17. The method according to claim 17, wherein the second silicon nitride layer is
D or a thickness of about 125 to 175 by the PECVD process.
15. The production method according to claim 14, wherein the production method is formed by Å. 18. The method according to claim 18, wherein the second silicon oxide layer comprises the LPCV
D or a thickness of about 3000 to 40 by the PECVD process.
15. The production method according to claim 14, wherein the production method is formed at 00 °. 19. The method according to claim 19, wherein the third silicon nitride layer comprises the LPCV
D or a thickness of about 800 to 900 by the PECVD process.
15. The production method according to claim 14, wherein the production method is formed by Å. 20. The method according to claim 19, wherein the third silicon oxide layer comprises the LPCV.
D or a thickness of about 5,000 to 60 by the PECVD process.
15. The production method according to claim 14, wherein the production method is formed at 00 °. 21. The method according to claim 14, wherein the diameter of the initial narrow opening and the diameter of the final narrow opening are about 0.18 to 0.28 μm. 22. The initial narrow opening is formed in the third silicon oxide layer and the second silicon nitride layer by anisotropic RIE using CHF ₃ as an etching agent, and CF ₄ ,
15. The method according to claim 14, wherein a fluorine compound such as CH ₂ F ₂ or CH ₃ F is used as an etching agent for the third silicon nitride layer and the second silicon nitride layer. 23. The method according to claim 14, wherein the etching rate ratio of silicon oxide to silicon nitride using CHF ₃ as an etching agent is 2: 1. 24. The etching method according to claim 14, wherein the etching rate ratio of silicon nitride to silicon oxide using a fluorine compound such as CF ₄ , CH ₂ F ₂ or CH ₃ F as an etching agent is 8: 1. The production method described in 1. 25. The wide-diameter opening is formed by anisotropic reactive ion etching using CHF ₃ as an etching agent.
15. The method according to claim 14, wherein the etching rate ratio of silicon oxide to silicon nitride is 2: 1 formed on the silicon oxide layer. 26. The method according to claim 14, wherein the diameter of the large-diameter opening in the third silicon oxide layer is 0.28 to 0.38 μm. 27. The first silicon nitride layer exposed at the bottom of the final narrow diameter opening and the third silicon nitride layer exposed at the wide diameter opening.
The silicon nitride layer is removed by anisotropic RIE using a fluorine compound such as CF ₄ , CH ₂ F ₂ or CH ₃ F as an etching agent, and the etching rate ratio of silicon nitride to silicon oxide is 8: 1. The method according to claim 1, wherein: