TW425648B - Method and apparatus for probing an integrated circuit through the back side of an integrated circuit die - Google Patents

Method and apparatus for probing an integrated circuit through the back side of an integrated circuit die Download PDF

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Publication number
TW425648B
TW425648B TW087111791A TW87111791A TW425648B TW 425648 B TW425648 B TW 425648B TW 087111791 A TW087111791 A TW 087111791A TW 87111791 A TW87111791 A TW 87111791A TW 425648 B TW425648 B TW 425648B
Authority
TW
Taiwan
Prior art keywords
integrated circuit
diffusion
passive diffusion
circuit die
passive
Prior art date
Application number
TW087111791A
Other languages
English (en)
Chinese (zh)
Inventor
Richard H Livengood
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of TW425648B publication Critical patent/TW425648B/zh

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/005—Control means for lapping machines or devices
    • B24B37/013—Devices or means for detecting lapping completion
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/305—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching
    • H01J37/3053—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching for evaporating or etching
    • H01J37/3056—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching for evaporating or etching for microworking, e. g. etching of gratings or trimming of electrical components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • H10P74/238—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/302—Contactless testing
    • G01R31/303—Contactless testing of integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/30—Electron or ion beam tubes for processing objects
    • H01J2237/304—Controlling tubes
    • H01J2237/30466—Detecting endpoint of process
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Mechanical Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Measuring Leads Or Probes (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
TW087111791A 1997-09-30 1998-07-20 Method and apparatus for probing an integrated circuit through the back side of an integrated circuit die TW425648B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/941,888 US6020746A (en) 1994-11-23 1997-09-30 Method and apparatus for probing an integrated circuit through the back side of an integrated circuit die

Publications (1)

Publication Number Publication Date
TW425648B true TW425648B (en) 2001-03-11

Family

ID=25477227

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087111791A TW425648B (en) 1997-09-30 1998-07-20 Method and apparatus for probing an integrated circuit through the back side of an integrated circuit die

Country Status (5)

Country Link
US (1) US6020746A (https=)
JP (1) JP2001518694A (https=)
AU (1) AU8406598A (https=)
TW (1) TW425648B (https=)
WO (1) WO1999017125A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106054057A (zh) * 2015-04-17 2016-10-26 爱思开海力士有限公司 用于检测半导体芯片的插入器件

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US6255124B1 (en) * 1999-02-08 2001-07-03 Advanced Micro Devices Test arrangement and method for thinned flip chip IC
US6545490B1 (en) * 1999-08-26 2003-04-08 Advanced Micro Devices, Inc. Trench-filled probe point for a semiconductor device
US6417680B1 (en) * 1999-09-29 2002-07-09 Advanced Micro Devices, Inc. Method and apparatus for stress testing a semiconductor device using laser-induced circuit excitation
US6664797B1 (en) * 1999-10-29 2003-12-16 Advanced Micro Devices, Inc. Method for profiling semiconductor device junctions using a voltage contrast scanning electron microscope
US6724928B1 (en) * 1999-12-02 2004-04-20 Advanced Micro Devices, Inc. Real-time photoemission detection system
US6248603B1 (en) * 2000-07-13 2001-06-19 Advanced Micro Devices Method of measuring dielectric layer thickness using SIMS
US6801046B1 (en) * 2000-09-26 2004-10-05 National Semiconductor Corporation Method of testing the electrostatic discharge performance of an IC device
US6624643B2 (en) * 2000-12-08 2003-09-23 Intel Corporation Apparatus and method to read output information from a backside of a silicon device
US6621281B1 (en) * 2001-01-05 2003-09-16 Advanced Micro Devices, Inc. SOI die analysis of circuitry logic states via coupling through the insulator
US6653849B1 (en) * 2001-05-23 2003-11-25 Advanced Micro Devices, Inc. IC analysis involving logic state mapping in a SOI die
US6566681B2 (en) 2001-07-19 2003-05-20 International Business Machines Corporation Apparatus for assisting backside focused ion beam device modification
US6692995B2 (en) 2002-04-05 2004-02-17 Intel Corporation Physically deposited layer to electrically connect circuit edit connection targets
US6957413B1 (en) 2002-06-27 2005-10-18 Advanced Micro Devices, Inc. System and method for specifying integrated circuit probe locations
US7015146B2 (en) * 2004-01-06 2006-03-21 International Business Machines Corporation Method of processing backside unlayering of MOSFET devices for electrical and physical characterization including a collimated ion plasma
US7141439B2 (en) * 2005-01-28 2006-11-28 Intel Corporation Transistor-level signal cutting method and structure
US7251762B2 (en) 2005-04-19 2007-07-31 Micron Technology, Inc. On-chip sampling circuit and method
US7915907B2 (en) * 2007-06-25 2011-03-29 Spansion Llc Faulty dangling metal route detection

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JPS5646534A (en) * 1979-09-25 1981-04-27 Nec Home Electronics Ltd Manufacture of semiconductor device
JPS5944827A (ja) * 1982-09-06 1984-03-13 Mitsubishi Electric Corp 半導体装置の製造方法
JPH0669031B2 (ja) * 1984-07-17 1994-08-31 日本電気株式会社 半導体装置
US4632724A (en) * 1985-08-19 1986-12-30 International Business Machines Corporation Visibility enhancement of first order alignment marks
EP0238694B1 (en) * 1986-03-27 1992-01-29 Ibm Deutschland Gmbh Method of forming identically positioned alignment marks on opposite sides of a semiconductor wafer
EP0295065A3 (en) * 1987-06-10 1991-07-03 Hitachi, Ltd. Semiconductor integrated circuit device, method of making same or cutting method for same, and cutting system using energy beam for same
US5165166A (en) * 1987-09-29 1992-11-24 Microelectronics And Computer Technology Corporation Method of making a customizable circuitry
JPH06101498B2 (ja) * 1987-10-30 1994-12-12 日本電気株式会社 半導体装置の故障解析方法
US5037771A (en) * 1989-11-28 1991-08-06 Cross-Check Technology, Inc. Method for implementing grid-based crosscheck test structures and the structures resulting therefrom
US5064498A (en) * 1990-08-21 1991-11-12 Texas Instruments Incorporated Silicon backside etch for semiconductors
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US6577148B1 (en) * 1994-08-31 2003-06-10 Motorola, Inc. Apparatus, method, and wafer used for testing integrated circuits formed on a product wafer
JPH08201432A (ja) * 1995-01-25 1996-08-09 Matsushita Electric Ind Co Ltd プローブシート及びその製造方法
JPH09153552A (ja) * 1995-11-29 1997-06-10 Mitsubishi Electric Corp 半導体装置およびその製造方法
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US5840627A (en) * 1997-03-24 1998-11-24 Clear Logic, Inc. Method of customizing integrated circuits using standard masks and targeting energy beams for single resist development

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106054057A (zh) * 2015-04-17 2016-10-26 爱思开海力士有限公司 用于检测半导体芯片的插入器件

Also Published As

Publication number Publication date
JP2001518694A (ja) 2001-10-16
AU8406598A (en) 1999-04-23
WO1999017125A1 (en) 1999-04-08
US6020746A (en) 2000-02-01

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