TW374954B - Integrated CVD/PVD AL planarization using ultra-thin nucleation layers - Google Patents
Integrated CVD/PVD AL planarization using ultra-thin nucleation layersInfo
- Publication number
- TW374954B TW374954B TW087105384A TW87105384A TW374954B TW 374954 B TW374954 B TW 374954B TW 087105384 A TW087105384 A TW 087105384A TW 87105384 A TW87105384 A TW 87105384A TW 374954 B TW374954 B TW 374954B
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- pvd
- cvd
- deposited
- interconnect
- Prior art date
Links
- 230000006911 nucleation Effects 0.000 title abstract 2
- 238000010899 nucleation Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 abstract 5
- 238000009736 wetting Methods 0.000 abstract 5
- 238000005240 physical vapour deposition Methods 0.000 abstract 4
- 229910052782 aluminium Inorganic materials 0.000 abstract 2
- 229910052751 metal Inorganic materials 0.000 abstract 2
- 239000002184 metal Substances 0.000 abstract 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 abstract 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 1
- 238000000151 deposition Methods 0.000 abstract 1
- 238000009713 electroplating Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- MNWRORMXBIWXCI-UHFFFAOYSA-N tetrakis(dimethylamido)titanium Chemical compound CN(C)[Ti](N(C)C)(N(C)C)N(C)C MNWRORMXBIWXCI-UHFFFAOYSA-N 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76868—Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76876—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for deposition from the gas phase, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Analytical Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Chemical Vapour Deposition (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/838,839 US6139905A (en) | 1997-04-11 | 1997-04-11 | Integrated CVD/PVD Al planarization using ultra-thin nucleation layers |
Publications (1)
Publication Number | Publication Date |
---|---|
TW374954B true TW374954B (en) | 1999-11-21 |
Family
ID=25278181
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW087105384A TW374954B (en) | 1997-04-11 | 1998-04-09 | Integrated CVD/PVD AL planarization using ultra-thin nucleation layers |
Country Status (5)
Country | Link |
---|---|
US (1) | US6139905A (zh) |
EP (1) | EP0871218A3 (zh) |
JP (1) | JPH1154512A (zh) |
KR (1) | KR100546466B1 (zh) |
TW (1) | TW374954B (zh) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6077781A (en) * | 1995-11-21 | 2000-06-20 | Applied Materials, Inc. | Single step process for blanket-selective CVD aluminum deposition |
US6057236A (en) * | 1998-06-26 | 2000-05-02 | International Business Machines Corporation | CVD/PVD method of filling structures using discontinuous CVD AL liner |
US6351036B1 (en) * | 1998-08-20 | 2002-02-26 | The United States Of America As Represented By The Secretary Of The Navy | Electronic devices with a barrier film and process for making same |
US7105434B2 (en) | 1999-10-02 | 2006-09-12 | Uri Cohen | Advanced seed layery for metallic interconnects |
US6610151B1 (en) | 1999-10-02 | 2003-08-26 | Uri Cohen | Seed layers for interconnects and methods and apparatus for their fabrication |
US6207558B1 (en) * | 1999-10-21 | 2001-03-27 | Applied Materials, Inc. | Barrier applications for aluminum planarization |
US6656831B1 (en) * | 2000-01-26 | 2003-12-02 | Applied Materials, Inc. | Plasma-enhanced chemical vapor deposition of a metal nitride layer |
US6465887B1 (en) * | 2000-05-03 | 2002-10-15 | The United States Of America As Represented By The Secretary Of The Navy | Electronic devices with diffusion barrier and process for making same |
KR100399066B1 (ko) * | 2000-12-28 | 2003-09-26 | 주식회사 하이닉스반도체 | 반도체소자의 알루미늄 합금 박막 제조 방법 |
US20020092673A1 (en) * | 2001-01-17 | 2002-07-18 | International Business Machines Corporation | Tungsten encapsulated copper interconnections using electroplating |
KR100400248B1 (ko) | 2001-04-06 | 2003-10-01 | 주식회사 하이닉스반도체 | 반도체소자의 배선 형성방법 |
US20020192948A1 (en) * | 2001-06-15 | 2002-12-19 | Applied Materials, Inc. | Integrated barrier layer structure for copper contact level metallization |
KR100501497B1 (ko) * | 2002-04-08 | 2005-07-18 | 동부아남반도체 주식회사 | 하층부 인터컨넥션 공정의 모니터링 방법 |
US6619538B1 (en) * | 2002-05-02 | 2003-09-16 | Texas Instruments Incorporated | Nickel plating process having controlled hydrogen concentration |
JP4457587B2 (ja) * | 2002-09-05 | 2010-04-28 | セイコーエプソン株式会社 | 電子デバイス用基体の製造方法及び電子デバイスの製造方法 |
KR100515828B1 (ko) * | 2002-11-25 | 2005-09-21 | 삼성에스디아이 주식회사 | 전도성 박막 제조 방법 |
US20050067295A1 (en) * | 2003-09-25 | 2005-03-31 | Dory Thomas S. | Deep via seed repair using electroless plating chemistry |
US20070281456A1 (en) * | 2006-05-30 | 2007-12-06 | Hynix Semiconductor Inc. | Method of forming line of semiconductor device |
US20100326497A1 (en) * | 2009-06-29 | 2010-12-30 | The Regents Of The University Of California | Highly efficient tandem polymer photovoltaic cells |
KR101197776B1 (ko) | 2010-12-27 | 2012-11-06 | 엘지이노텍 주식회사 | 와이어그리드편광자의 제조방법 |
KR20130104728A (ko) * | 2012-03-15 | 2013-09-25 | 에스케이하이닉스 주식회사 | 반도체 칩 및 이를 갖는 적층 반도체 패키지 |
US8835248B2 (en) | 2012-05-24 | 2014-09-16 | Sandisk Technologies Inc. | Method for forming metal wire |
US9076785B2 (en) | 2012-12-11 | 2015-07-07 | Invensas Corporation | Method and structures for via substrate repair and assembly |
US10068181B1 (en) | 2015-04-27 | 2018-09-04 | Rigetti & Co, Inc. | Microwave integrated quantum circuits with cap wafer and methods for making the same |
US11121301B1 (en) | 2017-06-19 | 2021-09-14 | Rigetti & Co, Inc. | Microwave integrated quantum circuits with cap wafers and their methods of manufacture |
Family Cites Families (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS639925A (ja) * | 1986-06-30 | 1988-01-16 | Nec Corp | 半導体装置の製造方法 |
JPS63160328A (ja) * | 1986-12-24 | 1988-07-04 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
US4784973A (en) * | 1987-08-24 | 1988-11-15 | Inmos Corporation | Semiconductor contact silicide/nitride process with control for silicide thickness |
US5240505A (en) * | 1989-08-03 | 1993-08-31 | Mitsubishi Denki Kabushiki Kaisha | Method of an apparatus for forming thin film for semiconductor device |
US5091339A (en) * | 1990-07-23 | 1992-02-25 | Microelectronics And Computer Technology Corporation | Trenching techniques for forming vias and channels in multilayer electrical interconnects |
US5080933A (en) * | 1990-09-04 | 1992-01-14 | Motorola, Inc. | Selective deposition of polycrystalline silicon |
US5032233A (en) * | 1990-09-05 | 1991-07-16 | Micron Technology, Inc. | Method for improving step coverage of a metallization layer on an integrated circuit by use of a high melting point metal as an anti-reflective coating during laser planarization |
US5147819A (en) * | 1991-02-21 | 1992-09-15 | Micron Technology, Inc. | Semiconductor metallization method |
JP2533414B2 (ja) * | 1991-04-09 | 1996-09-11 | 三菱電機株式会社 | 半導体集積回路装置の配線接続構造およびその製造方法 |
US5292558A (en) * | 1991-08-08 | 1994-03-08 | University Of Texas At Austin, Texas | Process for metal deposition for microelectronic interconnections |
DE69226411T2 (de) * | 1991-09-30 | 1998-12-24 | At & T Corp., New York, N.Y. | Herstellung eines leitenden Gebietes in elektronischen Vorrichtungen |
US5312774A (en) * | 1991-12-05 | 1994-05-17 | Sharp Kabushiki Kaisha | Method for manufacturing a semiconductor device comprising titanium |
US5300813A (en) * | 1992-02-26 | 1994-04-05 | International Business Machines Corporation | Refractory metal capped low resistivity metal conductor lines and vias |
US5240739A (en) * | 1992-08-07 | 1993-08-31 | Micron Technology | Chemical vapor deposition technique for depositing titanium silicide on semiconductor wafers |
US5354712A (en) * | 1992-11-12 | 1994-10-11 | Northern Telecom Limited | Method for forming interconnect structures for integrated circuits |
KR100320364B1 (ko) * | 1993-03-23 | 2002-04-22 | 가와사키 마이크로 엘렉트로닉스 가부시키가이샤 | 금속배선및그의형성방법 |
JPH07226387A (ja) * | 1993-03-26 | 1995-08-22 | Kawasaki Steel Corp | 金属配線およびその形成方法 |
JPH0722339A (ja) * | 1993-07-05 | 1995-01-24 | Toshiba Corp | 薄膜形成方法 |
US5585308A (en) * | 1993-12-23 | 1996-12-17 | Sgs-Thomson Microelectronics, Inc. | Method for improved pre-metal planarization |
US5420072A (en) * | 1994-02-04 | 1995-05-30 | Motorola, Inc. | Method for forming a conductive interconnect in an integrated circuit |
US5654232A (en) * | 1994-08-24 | 1997-08-05 | Intel Corporation | Wetting layer sidewalls to promote copper reflow into grooves |
JPH08107087A (ja) * | 1994-10-06 | 1996-04-23 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
US5523259A (en) * | 1994-12-05 | 1996-06-04 | At&T Corp. | Method of forming metal layers formed as a composite of sub-layers using Ti texture control layer |
US5712193A (en) * | 1994-12-30 | 1998-01-27 | Lucent Technologies, Inc. | Method of treating metal nitride films to reduce silicon migration therein |
US5565819A (en) * | 1995-07-11 | 1996-10-15 | Microchip Technology Incorporated | Accurate RC oscillator having modified threshold voltages |
US6120844A (en) * | 1995-11-21 | 2000-09-19 | Applied Materials, Inc. | Deposition film orientation and reflectivity improvement using a self-aligning ultra-thin layer |
US5804251A (en) * | 1995-12-29 | 1998-09-08 | Intel Corporation | Low temperature aluminum alloy plug technology |
US5582881A (en) * | 1996-02-16 | 1996-12-10 | Advanced Micro Devices, Inc. | Process for deposition of a Ti/TiN cap layer on aluminum metallization and apparatus |
US5858873A (en) * | 1997-03-12 | 1999-01-12 | Lucent Technologies Inc. | Integrated circuit having amorphous silicide layer in contacts and vias and method of manufacture thereof |
-
1997
- 1997-04-11 US US08/838,839 patent/US6139905A/en not_active Expired - Fee Related
-
1998
- 1998-04-09 EP EP98302798A patent/EP0871218A3/en not_active Withdrawn
- 1998-04-09 TW TW087105384A patent/TW374954B/zh active
- 1998-04-10 KR KR1019980012722A patent/KR100546466B1/ko not_active IP Right Cessation
- 1998-04-13 JP JP10139100A patent/JPH1154512A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPH1154512A (ja) | 1999-02-26 |
US6139905A (en) | 2000-10-31 |
EP0871218A2 (en) | 1998-10-14 |
EP0871218A3 (en) | 1999-07-07 |
KR19980081270A (ko) | 1998-11-25 |
KR100546466B1 (ko) | 2006-03-23 |
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