TW362191B - Sequence control circuit - Google Patents

Sequence control circuit

Info

Publication number
TW362191B
TW362191B TW086117820A TW86117820A TW362191B TW 362191 B TW362191 B TW 362191B TW 086117820 A TW086117820 A TW 086117820A TW 86117820 A TW86117820 A TW 86117820A TW 362191 B TW362191 B TW 362191B
Authority
TW
Taiwan
Prior art keywords
control circuit
sequence control
branch
branch address
logic operation
Prior art date
Application number
TW086117820A
Other languages
English (en)
Inventor
Toru Inagaki
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Application granted granted Critical
Publication of TW362191B publication Critical patent/TW362191B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/27—Built-in tests
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/23—Pc programming
    • G05B2219/23428—Select program from look up tables as function of detector states, pointer, index to program

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Automation & Control Theory (AREA)
  • Software Systems (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Executing Machine-Instructions (AREA)
  • Programmable Controllers (AREA)
TW086117820A 1996-11-27 1997-11-25 Sequence control circuit TW362191B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8316229A JPH10161899A (ja) 1996-11-27 1996-11-27 シーケンス制御回路

Publications (1)

Publication Number Publication Date
TW362191B true TW362191B (en) 1999-06-21

Family

ID=18074756

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086117820A TW362191B (en) 1996-11-27 1997-11-25 Sequence control circuit

Country Status (5)

Country Link
US (1) US6421773B1 (zh)
JP (1) JPH10161899A (zh)
KR (1) KR100277770B1 (zh)
DE (1) DE19752443A1 (zh)
TW (1) TW362191B (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19930169B4 (de) 1999-06-30 2004-09-30 Infineon Technologies Ag Testeinrichtung und Verfahren zum Prüfen eines Speichers
JP4686805B2 (ja) * 2000-01-25 2011-05-25 ソニー株式会社 データ記憶素子製造方法およびデータ記憶素子、並びにデータ処理装置
JP2001282324A (ja) * 2000-03-30 2001-10-12 Ando Electric Co Ltd シーケンス制御回路
JP2002093193A (ja) * 2000-09-13 2002-03-29 Advantest Corp メモリ試験方法・メモリ試験装置
DE10110050A1 (de) * 2001-03-02 2002-09-05 Bosch Gmbh Robert Verfahren zur Absicherung sicherheitskritischer Programmteile vor versehentlicher Ausführung und eine Speichereinrichtung zur Durchführung dieses Verfahrens
JP2004151990A (ja) 2002-10-30 2004-05-27 Renesas Technology Corp プログラムカウンタ回路
KR100788913B1 (ko) * 2005-11-18 2007-12-27 주식회사디아이 반도체 장치의 테스트 시스템을 위한 전치 분기 패턴 발생장치
JP5565228B2 (ja) 2010-09-13 2014-08-06 ソニー株式会社 プロセッサ

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4167779A (en) * 1978-03-10 1979-09-11 Digital Equipment Corporation Diagnostic apparatus in a data processing system
FR2472234A1 (fr) * 1979-12-21 1981-06-26 Philips Ind Commerciale Protocoles de communication geres par les modules de communication utilises dans un systeme de traitement de donnees reparti
US5652910A (en) * 1989-05-04 1997-07-29 Texas Instruments Incorporated Devices and systems with conditional instructions
US6047122A (en) * 1992-05-07 2000-04-04 Tm Patents, L.P. System for method for performing a context switch operation in a massively parallel computer system
US5646948A (en) * 1993-09-03 1997-07-08 Advantest Corporation Apparatus for concurrently testing a plurality of semiconductor memories in parallel
JP2646972B2 (ja) * 1993-11-01 1997-08-27 日本電気株式会社 多ビットメモリ
JPH08129056A (ja) * 1994-10-31 1996-05-21 Ando Electric Co Ltd 半導体試験装置のパターン発生器
US5568437A (en) * 1995-06-20 1996-10-22 Vlsi Technology, Inc. Built-in self test for integrated circuits having read/write memory
US5854801A (en) * 1995-09-06 1998-12-29 Advantest Corp. Pattern generation apparatus and method for SDRAM
JP3249040B2 (ja) * 1995-12-05 2002-01-21 株式会社アドバンテスト スキャンテスト装置
JP3150611B2 (ja) * 1996-03-29 2001-03-26 株式会社東芝 パターン発生装置

Also Published As

Publication number Publication date
DE19752443A1 (de) 1998-06-04
KR100277770B1 (ko) 2001-01-15
JPH10161899A (ja) 1998-06-19
KR19980042835A (ko) 1998-08-17
US6421773B1 (en) 2002-07-16
US20020046372A1 (en) 2002-04-18

Similar Documents

Publication Publication Date Title
TW256894B (en) Method and apparatus for multiple memory bank selection
US4785416A (en) Microprocessor timing emulator having a "Wait" state
KR830009518A (ko) 병렬처리용(竝列處理用)데이터 처리 시스템
JPS5752679B2 (zh)
TW362191B (en) Sequence control circuit
TW368621B (en) Method and apparatus for scan testing with extended test vector storage
KR960042344A (ko) 작은 하드웨어 규모로 많은 인터럽트 처리에 유연하게 대응하는 인터럽트 제어장치
CA2121297A1 (en) Apparatus and method for remotely controlled variable message display
KR900015434A (ko) 신호 발생회로
KR950006597A (ko) 마이크로컴퓨터
KR870003431A (ko) 데이타 처리장치
DE69933043D1 (de) Verfahren und vorrichtung für einen adaptiven generator von adressennachschlagtabellen
EP0945783A3 (en) Variable length register device
MY125195A (en) System and method for context switching in an electronic network
FR2738640B1 (fr) Architecture perfectionnee de base de temps pour testeur
US5337045A (en) Pattern generator
MY113542A (en) Scan test apparatus
KR980003618A (ko) 메모리 시험 장치
JPS6438672A (en) Pattern generator
JPS62259145A (ja) アルゴリズミツク・パタ−ン発生装置
JPS6429952A (en) Memory access controller
TW365658B (en) A method for implementing multiple format addressing in an embedded microcontroller, a compiler being arranged for implementing the method, and a microcontroller being arranged for using the method and compiler
JPS649525A (en) Branching control system for microcomputer
JPS6413477A (en) Testing device for integrated circuit
RU96105972A (ru) Устройство для диагностирования дискретных блоков