TW356559B - Method for fabricating semiconductor devices having triple well - Google Patents
Method for fabricating semiconductor devices having triple wellInfo
- Publication number
- TW356559B TW356559B TW086115298A TW86115298A TW356559B TW 356559 B TW356559 B TW 356559B TW 086115298 A TW086115298 A TW 086115298A TW 86115298 A TW86115298 A TW 86115298A TW 356559 B TW356559 B TW 356559B
- Authority
- TW
- Taiwan
- Prior art keywords
- type well
- type
- silicon substrate
- mask
- impurity ions
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823892—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation [BILLI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0928—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising both N- and P- wells in the substrate, e.g. twin-tub
Abstract
A kind of method for fabricating a semiconductor having triple wells, it comprises the following steps: an element isolation mask formed on a P-type silicon substrate; forming a N-type well mask on the element isolation mask; to implant N-type impurity ions in the exposed portion of the semiconductor substrate, N-type well implant region is formed in this way; removing the N-well mask, and oxidizing the silicon substrate portion of the corresponding field region, meanwhile according to the thermal oxidation process, infiltrating the N-type impurity ions of the N-type well implanting region into the semiconductor substrate, thereby forming field oxide film and defused N-type well portion; a P-type well mask formed on the silicon substrate, whereas the element isolation mask remained on the substrate; and implanting P-type impurity ions in the exposed portion of the silicon substrate, on the other hand in the meantime varying the concentration of the P-type impurity ions and ion implantation energy, therefore forming a P-type well regions in the silicon substrate, and forming internal p-type well portion in the N-type well portion.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960080269A KR100220954B1 (en) | 1996-12-31 | 1996-12-31 | Manufacturing method of semiconductor device having a triple well |
Publications (1)
Publication Number | Publication Date |
---|---|
TW356559B true TW356559B (en) | 1999-04-21 |
Family
ID=19493519
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086115298A TW356559B (en) | 1996-12-31 | 1997-10-17 | Method for fabricating semiconductor devices having triple well |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP2998730B2 (en) |
KR (1) | KR100220954B1 (en) |
GB (1) | GB2320802B (en) |
TW (1) | TW356559B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100328455B1 (en) * | 1997-12-30 | 2002-08-08 | 주식회사 하이닉스반도체 | Method of manufacuring a semiconductor device |
KR100465606B1 (en) * | 1998-06-30 | 2005-04-06 | 주식회사 하이닉스반도체 | Triple well manufacturing method of semiconductor device |
KR100524465B1 (en) * | 2003-06-30 | 2005-10-26 | 주식회사 하이닉스반도체 | Method of manufacturing in semiconductor device |
WO2013164210A1 (en) | 2012-05-02 | 2013-11-07 | Elmos Semiconductor Ag | Pmos transistor having low threshold voltage and method for the production thereof |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2795565B2 (en) * | 1991-10-08 | 1998-09-10 | シャープ株式会社 | Method for manufacturing semiconductor storage element |
US5702988A (en) * | 1996-05-02 | 1997-12-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Blending integrated circuit technology |
-
1996
- 1996-12-31 KR KR1019960080269A patent/KR100220954B1/en not_active IP Right Cessation
-
1997
- 1997-10-17 TW TW086115298A patent/TW356559B/en not_active IP Right Cessation
- 1997-10-23 GB GB9722437A patent/GB2320802B/en not_active Expired - Fee Related
- 1997-12-15 JP JP9362537A patent/JP2998730B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
GB9722437D0 (en) | 1997-12-24 |
JP2998730B2 (en) | 2000-01-11 |
JPH10209295A (en) | 1998-08-07 |
GB2320802A (en) | 1998-07-01 |
KR100220954B1 (en) | 1999-09-15 |
KR19980060901A (en) | 1998-10-07 |
GB2320802B (en) | 2002-01-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |