TW344073B - Current limiting during block writes of memory circuits - Google Patents

Current limiting during block writes of memory circuits

Info

Publication number
TW344073B
TW344073B TW085111664A TW85111664A TW344073B TW 344073 B TW344073 B TW 344073B TW 085111664 A TW085111664 A TW 085111664A TW 85111664 A TW85111664 A TW 85111664A TW 344073 B TW344073 B TW 344073B
Authority
TW
Taiwan
Prior art keywords
bias
coupled
line
current limiting
memory circuits
Prior art date
Application number
TW085111664A
Other languages
English (en)
Inventor
J Proebsting Robert
Original Assignee
Townsend & Townsend & Crew Llp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Townsend & Townsend & Crew Llp filed Critical Townsend & Townsend & Crew Llp
Application granted granted Critical
Publication of TW344073B publication Critical patent/TW344073B/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065Differential amplifiers of latching type
TW085111664A 1995-12-22 1996-09-24 Current limiting during block writes of memory circuits TW344073B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/578,885 US5740116A (en) 1995-12-22 1995-12-22 Current limiting during block writes of memory circuits

Publications (1)

Publication Number Publication Date
TW344073B true TW344073B (en) 1998-11-01

Family

ID=24314710

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085111664A TW344073B (en) 1995-12-22 1996-09-24 Current limiting during block writes of memory circuits

Country Status (7)

Country Link
US (1) US5740116A (zh)
EP (1) EP0790619B1 (zh)
JP (1) JP3066330B2 (zh)
KR (1) KR100275588B1 (zh)
CN (1) CN1131523C (zh)
DE (1) DE69626623T2 (zh)
TW (1) TW344073B (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10162577A (ja) * 1996-12-02 1998-06-19 Toshiba Corp 半導体記憶装置及びデータ書き込み方法
US6075737A (en) * 1998-12-02 2000-06-13 Micron Technology, Inc. Row decoded biasing of sense amplifier for improved one's margin
US6515926B1 (en) * 2002-01-04 2003-02-04 United Memories, Inc. Shared sense amplifier driver technique for dynamic random access memories exhibiting improved write recovery time
US7391638B2 (en) * 2006-10-24 2008-06-24 Sandisk 3D Llc Memory device for protecting memory cells during programming
TWI518666B (zh) * 2013-03-05 2016-01-21 友達光電股份有限公司 顯示裝置及其共同電壓產生電路
US9224453B2 (en) * 2013-03-13 2015-12-29 Qualcomm Incorporated Write-assisted memory with enhanced speed

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4823302A (en) * 1987-01-30 1989-04-18 Rca Licensing Corporation Block oriented random access memory able to perform a data read, a data write and a data refresh operation in one block-access time
JPH07109703B2 (ja) * 1989-11-15 1995-11-22 株式会社東芝 半導体メモリ装置
US5321658A (en) * 1990-05-31 1994-06-14 Oki Electric Industry Co., Ltd. Semiconductor memory device being coupled by auxiliary power lines to a main power line
JPH04125891A (ja) * 1990-09-17 1992-04-27 Oki Electric Ind Co Ltd 半導体記憶装置
WO1992005557A1 (de) * 1990-09-20 1992-04-02 Siemens Aktiengesellschaft Dynamischer halbleiterspeicher mit lokalen und hinsichtlich ihrer ansteuerfunktion optimierten leseverstärker-treiberschaltungen
JPH04216392A (ja) * 1990-12-18 1992-08-06 Mitsubishi Electric Corp ブロックライト機能を備える半導体記憶装置
JP3096314B2 (ja) * 1991-04-10 2000-10-10 沖電気工業株式会社 半導体記憶装置
US5305263A (en) * 1991-06-12 1994-04-19 Micron Technology, Inc. Simplified low power flash write operation
JP2939027B2 (ja) * 1991-10-31 1999-08-25 三菱電機株式会社 半導体記憶装置
US5282177A (en) * 1992-04-08 1994-01-25 Micron Technology, Inc. Multiple register block write method and circuit for video DRAMs
US5319606A (en) * 1992-12-14 1994-06-07 International Business Machines Corporation Blocked flash write in dynamic RAM devices

Also Published As

Publication number Publication date
CN1131523C (zh) 2003-12-17
KR100275588B1 (ko) 2000-12-15
US5740116A (en) 1998-04-14
JPH10188559A (ja) 1998-07-21
JP3066330B2 (ja) 2000-07-17
EP0790619A3 (en) 1999-05-26
EP0790619A2 (en) 1997-08-20
KR970051123A (ko) 1997-07-29
CN1174380A (zh) 1998-02-25
EP0790619B1 (en) 2003-03-12
DE69626623D1 (de) 2003-04-17
DE69626623T2 (de) 2004-02-19

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees