TW343296B - Internal clock generation circuit of semiconductor device and method for generating internal clock - Google Patents

Internal clock generation circuit of semiconductor device and method for generating internal clock

Info

Publication number
TW343296B
TW343296B TW086113256A TW86113256A TW343296B TW 343296 B TW343296 B TW 343296B TW 086113256 A TW086113256 A TW 086113256A TW 86113256 A TW86113256 A TW 86113256A TW 343296 B TW343296 B TW 343296B
Authority
TW
Taiwan
Prior art keywords
internal clock
signal
semiconductor device
receives
generation circuit
Prior art date
Application number
TW086113256A
Other languages
English (en)
Inventor
Yow-Biann Jeng
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of TW343296B publication Critical patent/TW343296B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
TW086113256A 1997-02-17 1997-09-12 Internal clock generation circuit of semiconductor device and method for generating internal clock TW343296B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019970004778A KR100230407B1 (ko) 1997-02-17 1997-02-17 반도체장치의 클럭 발생회로 및 클럭발생방법

Publications (1)

Publication Number Publication Date
TW343296B true TW343296B (en) 1998-10-21

Family

ID=19497262

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086113256A TW343296B (en) 1997-02-17 1997-09-12 Internal clock generation circuit of semiconductor device and method for generating internal clock

Country Status (4)

Country Link
US (1) US6154415A (zh)
JP (1) JP3681877B2 (zh)
KR (1) KR100230407B1 (zh)
TW (1) TW343296B (zh)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6275086B1 (en) * 1998-11-19 2001-08-14 Fujitsu Limited Clock signal generator for an integrated circuit
KR100328673B1 (ko) * 1999-11-30 2002-03-20 윤종용 반도체 메모리 장치 및 이 장치의 데이터 리드 방법
US6373784B2 (en) * 2000-01-20 2002-04-16 Nec Corporation Semiconductor memory device
US6222791B1 (en) * 2000-06-15 2001-04-24 Artisan Components, Inc. Slew tolerant clock input buffer and a self-timed memory core thereof
JP4986318B2 (ja) * 2000-08-28 2012-07-25 ルネサスエレクトロニクス株式会社 半導体装置
KR100438375B1 (ko) * 2001-09-18 2004-07-02 주식회사 코아매직 반도체메모리소자의 어드레스 입력 장치 및 방법
KR100445062B1 (ko) 2001-11-02 2004-08-21 주식회사 하이닉스반도체 반도체메모리장치의 클럭발생회로
DE10239322B4 (de) * 2002-08-27 2004-07-08 Infineon Technologies Ag Integrierter Speicher und Verfahren zur Einstellung der Latenzzeit im integrierten Speicher
KR100495916B1 (ko) * 2002-11-20 2005-06-17 주식회사 하이닉스반도체 클럭인에이블 버퍼를 구비한 반도체 장치
US7307913B2 (en) 2005-09-29 2007-12-11 Hynix Semiconductor Inc. Clock control device for toggling an internal clock of a synchronous DRAM for reduced power consumption
KR100772689B1 (ko) * 2006-09-29 2007-11-02 주식회사 하이닉스반도체 스몰클럭버퍼를 포함하는 메모리장치.
KR20100095250A (ko) * 2009-02-20 2010-08-30 삼성전자주식회사 전원 노이즈를 줄일 수 있는 반도체 메모리 장치
KR20100115613A (ko) 2009-04-20 2010-10-28 삼성전자주식회사 레이턴시 전류 소모를 줄일 수 있는 반도체 메모리 장치
KR101944964B1 (ko) * 2012-01-13 2019-02-01 삼성전자주식회사 반도체 메모리 장치 및 이를 포함하는 메모리 시스템

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5301165A (en) * 1992-10-28 1994-04-05 International Business Machines Corporation Chip select speedup circuit for a memory
JP2907081B2 (ja) * 1995-09-26 1999-06-21 日本電気株式会社 半導体記憶装置
JP3986578B2 (ja) * 1996-01-17 2007-10-03 三菱電機株式会社 同期型半導体記憶装置
JP3703241B2 (ja) * 1997-01-28 2005-10-05 Ｎｅｃエレクトロニクス株式会社 半導体メモリ装置
JPH10228772A (ja) * 1997-02-18 1998-08-25 Mitsubishi Electric Corp 同期型半導体記憶装置

Also Published As

Publication number Publication date
KR19980068266A (ko) 1998-10-15
US6154415A (en) 2000-11-28
KR100230407B1 (ko) 1999-11-15
JP3681877B2 (ja) 2005-08-10
JPH10240372A (ja) 1998-09-11

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees