TW332328B - The method for improving contact profile of IC - Google Patents

The method for improving contact profile of IC

Info

Publication number
TW332328B
TW332328B TW085113523A TW85113523A TW332328B TW 332328 B TW332328 B TW 332328B TW 085113523 A TW085113523 A TW 085113523A TW 85113523 A TW85113523 A TW 85113523A TW 332328 B TW332328 B TW 332328B
Authority
TW
Taiwan
Prior art keywords
insulating layer
opening
contact
etching rate
layer
Prior art date
Application number
TW085113523A
Other languages
Chinese (zh)
Inventor
Shoou-Wenn Guo
Tzwu Shy
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Priority to TW085113523A priority Critical patent/TW332328B/en
Application granted granted Critical
Publication of TW332328B publication Critical patent/TW332328B/en

Links

Abstract

A producing method for electrical contact of IC, it includes following steps: - Provide a semiconductor substrate with semiconductor devices; - Form multi-levels insulating layer on semiconductor structure, and at least two insulating layers inside the multi-layers insulating layer have different etching rate, and the A insulating layer has 1st etching rate, and the B insulating layer has 2nd etching rate; - Form photomask with opening on insulating layer, and the semiconductor devices are through the opening to electrically contact with outside; - Etch the contact opening, and through the area of insulating layer uncovered by photomask till the place that is the semiconductor substrate to electrically contact with outside; And the A insulating layer with 1st etching rate is etched faster than B insulating layer with 2nd etching rate at horizontal direction to form the profile of contact opening that is not totally vertical profile, and after etching, it is formed native oxide at the sidewalls of contact opening; - Soak the substrate into HF solution, to remove the oxide located at side wall of opening, and the A insulating layer has the lower etching rate than B insulating layer in HF solution, therefore, the contact profile is changed more vertical than above step; - Deposit glue layer on the opening till exceeding the insulating surface; - Deposit conduct layer on glue layer to fill the contact opening, and finish the producing electrical contact of IC.
TW085113523A 1996-11-05 1996-11-05 The method for improving contact profile of IC TW332328B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW085113523A TW332328B (en) 1996-11-05 1996-11-05 The method for improving contact profile of IC

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW085113523A TW332328B (en) 1996-11-05 1996-11-05 The method for improving contact profile of IC

Publications (1)

Publication Number Publication Date
TW332328B true TW332328B (en) 1998-05-21

Family

ID=58262772

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085113523A TW332328B (en) 1996-11-05 1996-11-05 The method for improving contact profile of IC

Country Status (1)

Country Link
TW (1) TW332328B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7084508B2 (en) 1997-03-27 2006-08-01 Renesas Technology Corp. Semiconductor device with multiple layer insulating film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7084508B2 (en) 1997-03-27 2006-08-01 Renesas Technology Corp. Semiconductor device with multiple layer insulating film

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Legal Events

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MK4A Expiration of patent term of an invention patent