TW428218B - Method for preventing residues of rugged polysilicon - Google Patents

Method for preventing residues of rugged polysilicon

Info

Publication number
TW428218B
TW428218B TW88115774A TW88115774A TW428218B TW 428218 B TW428218 B TW 428218B TW 88115774 A TW88115774 A TW 88115774A TW 88115774 A TW88115774 A TW 88115774A TW 428218 B TW428218 B TW 428218B
Authority
TW
Taiwan
Prior art keywords
forming
polysilicon layer
layer
rugged
dielectric layer
Prior art date
Application number
TW88115774A
Other languages
Chinese (zh)
Inventor
Tsai-Sen Lin
Chou-Shiu Jou
Jay Shaw
Original Assignee
Mosel Vitelic Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mosel Vitelic Inc filed Critical Mosel Vitelic Inc
Priority to TW88115774A priority Critical patent/TW428218B/en
Application granted granted Critical
Publication of TW428218B publication Critical patent/TW428218B/en

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Weting (AREA)

Abstract

A method of producing a capacitor according to the present invention comprises: forming a field effect transistor structure on a silicon substrate; forming a first dielectric layer covering the surface of the silicon substrate; etching a portion of the first dielectric layer to form a contact window connecting to the field effect transistor; forming a second polysilicon layer covering the first dielectric layer and filling up the contact window; forming a chemical oxide layer by immersing the wafer in a SPM solution; forming a rugged polysilicon layer; performing a HF immersion step on the rugged polysilicon layer; etching a portion of the rugged polysilicon layer, the chemical oxide layer and the second polysilicon layer to form an opening therein; forming a capacitor dielectric layer covering the rugged polysilicon layer; and forming a third polysilicon layer covering the capacitor dielectric layer. The invented method can prevent residues of the rugged polysilicon.
TW88115774A 1999-09-10 1999-09-10 Method for preventing residues of rugged polysilicon TW428218B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW88115774A TW428218B (en) 1999-09-10 1999-09-10 Method for preventing residues of rugged polysilicon

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW88115774A TW428218B (en) 1999-09-10 1999-09-10 Method for preventing residues of rugged polysilicon

Publications (1)

Publication Number Publication Date
TW428218B true TW428218B (en) 2001-04-01

Family

ID=21642282

Family Applications (1)

Application Number Title Priority Date Filing Date
TW88115774A TW428218B (en) 1999-09-10 1999-09-10 Method for preventing residues of rugged polysilicon

Country Status (1)

Country Link
TW (1) TW428218B (en)

Similar Documents

Publication Publication Date Title
US6140024A (en) Remote plasma nitridation for contact etch stop
US7214981B2 (en) Semiconductor devices having double-sided hemispherical silicon grain electrodes
WO2003044833A2 (en) Method for limiting divot formation in post shallow trench isolation processes
EP1017096A3 (en) Method of fabricating semiconductor memory device
KR20020090879A (en) Method of fabricating semiconductor device
TW345741B (en) Process for producing a capacitor for DRAM
US6242331B1 (en) Method to reduce device contact resistance using a hydrogen peroxide treatment
US20060027875A1 (en) Semiconductor device with gate space of positive slope and fabrication method thereof
US6187649B1 (en) Shallow trench isolation process
US6667224B1 (en) Method to eliminate inverse narrow width effect in small geometry MOS transistors
WO2004073058A3 (en) Flash memory devices
TW428218B (en) Method for preventing residues of rugged polysilicon
TW367585B (en) Method for completely removing the titanium nitride residuals outside the integrated circuit contacts
US6403445B1 (en) Enhanced trench isolation structure
JP2002026309A (en) Manufacturing method of field-effect transistor
US6399494B1 (en) Method of making a semiconductor device
TW441012B (en) Manufacturing method of spacer in the self-aligned contact process
KR100511908B1 (en) Method of manufacturing semiconductor device using damascene and self aligned contact process
TW408425B (en) Shallow trench isolation process
KR100800106B1 (en) Method for forming trench isolation layer in semiconductor device
KR100554145B1 (en) Method of manufacturing a transistor in a semiconductor device
KR100527563B1 (en) A method for forming a capacitor of a semiconductor device
KR20000003613A (en) Method of fabricating capacitor of semiconductor device
TW345721B (en) Method for improving polysilicon interconnect between split gates of flash memory
KR950021381A (en) Field oxide film formation method of a semiconductor device

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees