TW327243B - Plasma etching method used in a process for manufacturing semiconductor device the invention relates to a plasma etching method used in a process for manufacturing a semiconductor device, which can be used to produce wafers with high integration. - Google Patents

Plasma etching method used in a process for manufacturing semiconductor device the invention relates to a plasma etching method used in a process for manufacturing a semiconductor device, which can be used to produce wafers with high integration.

Info

Publication number
TW327243B
TW327243B TW086103170A TW86103170A TW327243B TW 327243 B TW327243 B TW 327243B TW 086103170 A TW086103170 A TW 086103170A TW 86103170 A TW86103170 A TW 86103170A TW 327243 B TW327243 B TW 327243B
Authority
TW
Taiwan
Prior art keywords
semiconductor device
etching method
plasma etching
manufacturing
method used
Prior art date
Application number
TW086103170A
Other languages
English (en)
Inventor
Park Yuong-Hyeon
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of TW327243B publication Critical patent/TW327243B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • ing And Chemical Polishing (AREA)
  • Electrodes Of Semiconductors (AREA)
TW086103170A 1996-06-12 1997-03-14 Plasma etching method used in a process for manufacturing semiconductor device the invention relates to a plasma etching method used in a process for manufacturing a semiconductor device, which can be used to produce wafers with high integration. TW327243B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960021026A KR980005793A (ko) 1996-06-12 1996-06-12 반도체장치 제조공정의 플라즈마 식각 방법

Publications (1)

Publication Number Publication Date
TW327243B true TW327243B (en) 1998-02-21

Family

ID=19461604

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086103170A TW327243B (en) 1996-06-12 1997-03-14 Plasma etching method used in a process for manufacturing semiconductor device the invention relates to a plasma etching method used in a process for manufacturing a semiconductor device, which can be used to produce wafers with high integration.

Country Status (6)

Country Link
JP (1) JPH1012600A (zh)
KR (1) KR980005793A (zh)
CN (1) CN1168535A (zh)
DE (1) DE19654178A1 (zh)
GB (1) GB2314207A (zh)
TW (1) TW327243B (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3650022B2 (ja) 2000-11-13 2005-05-18 三洋電機株式会社 半導体装置の製造方法
JP4593551B2 (ja) * 2006-11-15 2010-12-08 エルジー ディスプレイ カンパニー リミテッド 電子機器用基板及びその製造方法と電子機器
US10240230B2 (en) * 2012-12-18 2019-03-26 Seastar Chemicals Inc. Process and method for in-situ dry cleaning of thin film deposition reactors and thin film layers

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3752259T2 (de) * 1986-12-19 1999-10-14 Applied Materials Bromine-Ätzverfahren für Silizium
JP2673380B2 (ja) * 1990-02-20 1997-11-05 三菱電機株式会社 プラズマエッチングの方法
DE4107006A1 (de) * 1991-03-05 1992-09-10 Siemens Ag Verfahren zum anisotropen trockenaetzen von aluminium bzw. aluminiumlegierungen enthaltenden leiterbahnebenen in integrierten halbleiterschaltungen
US5304775A (en) * 1991-06-06 1994-04-19 Mitsubishi Denki Kabushiki Kaisha Method of etching a wafer having high anisotropy with a plasma gas containing halogens and in inert element
JP3200949B2 (ja) * 1992-03-28 2001-08-20 ソニー株式会社 ドライエッチング方法
JP3118946B2 (ja) * 1992-03-28 2000-12-18 ソニー株式会社 ドライエッチング方法
JP3371179B2 (ja) * 1995-05-19 2003-01-27 ソニー株式会社 配線形成方法

Also Published As

Publication number Publication date
KR980005793A (ko) 1998-03-30
DE19654178A1 (de) 1997-12-18
GB9700655D0 (en) 1997-03-05
CN1168535A (zh) 1997-12-24
JPH1012600A (ja) 1998-01-16
GB2314207A (en) 1997-12-17

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