GB9700655D0 - Plasma etching method in manufacturing process of semiconductor device - Google Patents

Plasma etching method in manufacturing process of semiconductor device

Info

Publication number
GB9700655D0
GB9700655D0 GBGB9700655.5A GB9700655A GB9700655D0 GB 9700655 D0 GB9700655 D0 GB 9700655D0 GB 9700655 A GB9700655 A GB 9700655A GB 9700655 D0 GB9700655 D0 GB 9700655D0
Authority
GB
United Kingdom
Prior art keywords
semiconductor device
manufacturing process
plasma etching
etching method
plasma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB9700655.5A
Other versions
GB2314207A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of GB9700655D0 publication Critical patent/GB9700655D0/en
Publication of GB2314207A publication Critical patent/GB2314207A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
GB9700655A 1996-06-12 1997-01-14 Plasma etching method for a semiconductor device fabrication process Withdrawn GB2314207A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960021026A KR980005793A (en) 1996-06-12 1996-06-12 Plasma Etching Method in Semiconductor Device Manufacturing Process

Publications (2)

Publication Number Publication Date
GB9700655D0 true GB9700655D0 (en) 1997-03-05
GB2314207A GB2314207A (en) 1997-12-17

Family

ID=19461604

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9700655A Withdrawn GB2314207A (en) 1996-06-12 1997-01-14 Plasma etching method for a semiconductor device fabrication process

Country Status (6)

Country Link
JP (1) JPH1012600A (en)
KR (1) KR980005793A (en)
CN (1) CN1168535A (en)
DE (1) DE19654178A1 (en)
GB (1) GB2314207A (en)
TW (1) TW327243B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3650022B2 (en) 2000-11-13 2005-05-18 三洋電機株式会社 Manufacturing method of semiconductor device
JP4593551B2 (en) * 2006-11-15 2010-12-08 エルジー ディスプレイ カンパニー リミテッド Electronic device substrate, method for manufacturing the same, and electronic device
KR101792165B1 (en) * 2012-12-18 2017-10-31 시스타 케미칼즈 인코포레이티드 Process and method for in-situ dry cleaning of thin film deposition reactors and thin film layers

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0272143B1 (en) * 1986-12-19 1999-03-17 Applied Materials, Inc. Bromine etch process for silicon
JP2673380B2 (en) * 1990-02-20 1997-11-05 三菱電機株式会社 Plasma etching method
DE4107006A1 (en) * 1991-03-05 1992-09-10 Siemens Ag METHOD FOR ANISOTROPICALLY DRYING ALUMINUM OR BZW. ALUMINUM ALLOYS CONTAINING LADDER RAILINGS IN INTEGRATED SEMICONDUCTOR CIRCUITS
US5304775A (en) * 1991-06-06 1994-04-19 Mitsubishi Denki Kabushiki Kaisha Method of etching a wafer having high anisotropy with a plasma gas containing halogens and in inert element
JP3118946B2 (en) * 1992-03-28 2000-12-18 ソニー株式会社 Dry etching method
JP3200949B2 (en) * 1992-03-28 2001-08-20 ソニー株式会社 Dry etching method
JP3371179B2 (en) * 1995-05-19 2003-01-27 ソニー株式会社 Wiring formation method

Also Published As

Publication number Publication date
TW327243B (en) 1998-02-21
GB2314207A (en) 1997-12-17
CN1168535A (en) 1997-12-24
KR980005793A (en) 1998-03-30
JPH1012600A (en) 1998-01-16
DE19654178A1 (en) 1997-12-18

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)