TW305960B - - Google Patents

Download PDF

Info

Publication number
TW305960B
TW305960B TW084100845A TW84100845A TW305960B TW 305960 B TW305960 B TW 305960B TW 084100845 A TW084100845 A TW 084100845A TW 84100845 A TW84100845 A TW 84100845A TW 305960 B TW305960 B TW 305960B
Authority
TW
Taiwan
Prior art keywords
signal
external
bus
cache
access
Prior art date
Application number
TW084100845A
Other languages
English (en)
Chinese (zh)
Original Assignee
Hitachi Ltd
Hitachi Microcomp System Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Microcomp System Kk filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TW305960B publication Critical patent/TW305960B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3636—Debugging of software by tracing the execution of the program

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
TW084100845A 1994-02-09 1995-01-28 TW305960B (en:Method)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP3649694 1994-02-09
JP6259727A JPH07271705A (ja) 1994-02-09 1994-09-30 データプロセッサ及びこれを用いたトレース回路

Publications (1)

Publication Number Publication Date
TW305960B true TW305960B (en:Method) 1997-05-21

Family

ID=26375556

Family Applications (1)

Application Number Title Priority Date Filing Date
TW084100845A TW305960B (en:Method) 1994-02-09 1995-01-28

Country Status (4)

Country Link
EP (1) EP0667576A1 (en:Method)
JP (1) JPH07271705A (en:Method)
KR (1) KR950033860A (en:Method)
TW (1) TW305960B (en:Method)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3934710B2 (ja) * 1996-09-13 2007-06-20 株式会社ルネサステクノロジ マイクロプロセッサ
JP3214613B2 (ja) 1998-07-03 2001-10-02 日本電気株式会社 マイクロプロセッサ及びデータ処理システム
GB2366006B (en) 1999-12-23 2004-06-30 St Microelectronics Sa A computer system with debug facility
GB2362730B (en) 1999-12-23 2004-02-11 St Microelectronics Sa Computer register watch
GB2362729B (en) 1999-12-23 2004-02-11 St Microelectronics Sa Memory access debug facility
GB2362968B (en) 1999-12-23 2003-12-10 St Microelectronics Sa Computer system with debug facility
GB2365546B (en) 1999-12-23 2004-02-18 St Microelectronics Sa A computer system with two debug watch modes
TWI384397B (zh) * 2007-04-18 2013-02-01 聯發科技股份有限公司 資料位址追蹤方法及資料位址追蹤裝置、資料追蹤方法及資料追蹤裝置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0371418A3 (en) * 1988-11-30 1991-09-04 National Semiconductor Corporation Apparatus for and method of providing the program counter of a microprocessor external to the device
KR910018909A (ko) * 1990-04-20 1991-11-30 미다 가쓰시게 데이타처리장치 및 그것을 사용한 시스템개발장치

Also Published As

Publication number Publication date
EP0667576A1 (en) 1995-08-16
JPH07271705A (ja) 1995-10-20
KR950033860A (ko) 1995-12-26

Similar Documents

Publication Publication Date Title
TW552515B (en) Input/output (I/O) address translation in a bridge proximate to a local I/O bus
Roth Axiomatic models of bargaining
TWI254211B (en) System-on-a-chip
TW384440B (en) A method and apparatus for data ordering of I/O transfers in bi-modal endian power PC systems
TWI261159B (en) Clock generator circuitry
JPS60100258A (ja) バツフア装置
TW200915087A (en) Bridge device with page-access based processor interface
EP0422103A1 (en) BUS INTERFACE IN / OUT TO SYSTEM BUS.
TW305960B (en:Method)
TW200809511A (en) Systems and methods for transactions between processor and memory
TW201140094A (en) Test apparatus and test method
TWI326826B (en) Spi device
TWI336478B (en) Semiconductor memory apparatus and data masking method of the same
TWM298188U (en) Control device for accessing Non-Volatile memory
JPS582922A (ja) 装置とコンピユ−タの間でデ−タを交換するためのバツフアおよび方法
JPS6187451A (ja) ディジタルデータ通信システム
TW322546B (en:Method)
TW201131578A (en) Memory management method, memory controller and memory storage system
CN206575508U (zh) 一种基于dsp的视频拼接处理器
JPS59151371A (ja) 半導体メモリ素子
JPH03167648A (ja) ダイレクトメモリアクセス制御装置
TW200419366A (en) Method and related apparatus for controlling a peripheral device to transfer data to a bus
JPH04160458A (ja) Ｄｍａコントローラ周辺回路
Schramm et al. Long delay before celiac disease is recognized
JPS5647847A (en) Diagnostic system for logical device