EP0371418A3 - Apparatus for and method of providing the program counter of a microprocessor external to the device - Google Patents

Apparatus for and method of providing the program counter of a microprocessor external to the device Download PDF

Info

Publication number
EP0371418A3
EP0371418A3 EP19890121797 EP89121797A EP0371418A3 EP 0371418 A3 EP0371418 A3 EP 0371418A3 EP 19890121797 EP19890121797 EP 19890121797 EP 89121797 A EP89121797 A EP 89121797A EP 0371418 A3 EP0371418 A3 EP 0371418A3
Authority
EP
European Patent Office
Prior art keywords
program counter
providing
microprocessor
microprocessor external
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19890121797
Other languages
German (de)
French (fr)
Other versions
EP0371418A2 (en
Inventor
Bruce B. Razban
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of EP0371418A2 publication Critical patent/EP0371418A2/en
Publication of EP0371418A3 publication Critical patent/EP0371418A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G06F11/3636—Software debugging by tracing the execution of the program
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G06F11/3648—Software debugging using additional hardware
    • G06F11/3656—Software debugging using additional hardware using a specific debug interface

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

A microprocessor's program counter is made available external to the device on a dedicated bus. Thus, an emulator can readily generate a list of executed instruction addresses by monitoring the bus. This eliminates the conventional requirement of monitoring system bus traffic and attempting to extract and reconstruct the instruction execution sequence.
EP19890121797 1988-11-30 1989-11-25 Apparatus for and method of providing the program counter of a microprocessor external to the device Withdrawn EP0371418A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US27800388A 1988-11-30 1988-11-30
US278003 1988-11-30

Publications (2)

Publication Number Publication Date
EP0371418A2 EP0371418A2 (en) 1990-06-06
EP0371418A3 true EP0371418A3 (en) 1991-09-04

Family

ID=23063282

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19890121797 Withdrawn EP0371418A3 (en) 1988-11-30 1989-11-25 Apparatus for and method of providing the program counter of a microprocessor external to the device

Country Status (2)

Country Link
EP (1) EP0371418A3 (en)
JP (1) JPH02270038A (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3088129B2 (en) * 1991-05-29 2000-09-18 日本電気株式会社 Microprocessor
JPH0528002A (en) * 1991-07-24 1993-02-05 Nec Corp Microprocessor
GB2273184B (en) * 1992-12-05 1996-11-20 Motorola Inc A cache processor and a method for observing program flow in a cache processor
JPH07271705A (en) * 1994-02-09 1995-10-20 Hitachi Ltd Data processor and trace circuit using same
JPH086918A (en) * 1994-06-15 1996-01-12 Nec Corp Microcomputer
US5623615A (en) * 1994-08-04 1997-04-22 International Business Machines Corporation Circuit and method for reducing prefetch cycles on microprocessors
US6044477A (en) * 1996-01-31 2000-03-28 International Business Machines Corporation System and method for auditing buffer usage in a data processing system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6391746A (en) * 1986-10-06 1988-04-22 Matsushita Electric Ind Co Ltd Microcomputer for evaluation

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
"MC68020, 32-bit microprocessor user's manual", 1985, Englewood Cliffs, Prentice Hall, US *
IBM TECHNICAL DISCLOSURE BULLETIN, vol. 20, no. 9, February 1978, pages 3503-3506, New York, US; F.R. MOORE et al.: "Instruction trace apparatus" *
PATENT ABSTRACTS OF JAPAN, vol. 12, no. 329 (P-754), 7th September 1988; & JP-A-63 091 746 (MATSUSHITA) 22-04-1988 *

Also Published As

Publication number Publication date
EP0371418A2 (en) 1990-06-06
JPH02270038A (en) 1990-11-05

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