TW300341B - - Google Patents

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TW300341B
TW300341B TW085105967A TW85105967A TW300341B TW 300341 B TW300341 B TW 300341B TW 085105967 A TW085105967 A TW 085105967A TW 85105967 A TW85105967 A TW 85105967A TW 300341 B TW300341 B TW 300341B
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Taiwan
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film
pattern
gate
gold
electrode
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TW085105967A
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Chinese (zh)
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Advanced Display Kk
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Priority claimed from JP7131695A external-priority patent/JPH08328035A/en
Priority claimed from JP15486495A external-priority patent/JPH095786A/en
Priority claimed from JP15486395A external-priority patent/JPH095785A/en
Application filed by Advanced Display Kk filed Critical Advanced Display Kk
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Publication of TW300341B publication Critical patent/TW300341B/zh

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136259Repairing; Defects
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136231Active matrix addressed cells for reducing the number of lithographic steps
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136259Repairing; Defects
    • G02F1/136263Line defects
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136259Repairing; Defects
    • G02F1/136272Auxiliary lines

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)

Description

ο 0 QS41 Α7 Β7 五、發明説明(3 ) [産業上的利用領域] 本發明為關於薄膜電晶體(TFT, Thin Film Transistor)陣列基板(array board),使用該基板的液晶 顯示裝置以及TFT陣列基板之製造方法,尤其為關於提供 改善使製造成品率低下主要原因之一的點缺陷之修復方法 者。 [習用的技術] 習用的液晶顯示裝置使用之TFT陣列有如圖25及圖26 所示者。 圖25表示習用的液晶顯示裝置使用之TFT陣列的部分 擴大圖,圖26為圖25中A-A斷面圖。圖中1為玻璃基板,2 為兼做閘極U a t e )的閘極配線,3為由透明導電膜形成的 畫素電極,4為絶緣膜,5為半導體層,6為電阻性接觸( ohmic contact)層,7為源極(source) ♦配線,8為汲極( drain) 〇 經濟部中央標準局員工消費合作社印製 (請先閲讀背面之注意事項再填寫本頁) 以下説明習用之TFT陣列的製造程序及構造。首先於 洗淨的玻璃基板1以噴鍍(sputter ing)法等的方法形成鉻( Ο),鉅(Ta),鈦(Ti)等之金羼薄膜,然後以照像蝕刻等 的方法形成電路模圖(pattern)而做成閘極♦配線2。其次 以等電漿化學的氣相澱積法(p 1 a s m a C V D , c h b i c a 1 Vapor Deposition)形成做為聞極絶緣膜4的氮化砂(SiN) 或《化矽(Si〇2)等的絶緣膜,做為半導體層5的i-a-Si或 Poly-Si等,以及做為電阻性接觸層6的n-a-Si等。其次為 以照像蝕刻等的方法將n-a-Si及ί-a-Si形成島狀或為線狀 本紙張尺度適用中國國家標準(CNS ) A4規格(210X29*7公釐) 3 38 183 A7 B7 經濟部中央標準局員工消費合作社印製 五、 發明説明(4 ) * 1 的 模 圖 (P at t e Γ η ) 〇 其次以噴鍍等的方法形成絪錫氣化物( 1 :| I IT0 , I n d i u m - T i η Ox i d e ) 等 的透 明導 電膜以形 成畫 素電極 1 1 1 3 〇 其後以噴鍍法等形成鋁( A e ), 络(Cr)等的金屬薄膜, /—S 1 I 請 1 I 將 其 以 照 像 蝕 刻 法 等 形 成 模 画做 成源 極•配線 7及汲極8後 先 閱 1 I 1 I 9 將 源 極 ♦ 汲 極 間 的 電 阻 性 接觸 層6之η-a-Si以独刻去除 背 ώ 1 1 之 1 〇 最 後 因 應 需 要 以 Si N等形成保護膜。 意 1 事 1 又 習 用 之 用 於 該 種 液 晶 顯示 裝置 的TFT陣列有如圖27 項 再 1 填 及 圖 28所 示 者 0 圖 27 表 示 用 於習 用之 液晶顯示 裝置 之TFT % 本 装 I 陣 列 部 分 平 面 圖 9 圖 28為 圖 27之 B-B斷面圖。下面參照該 頁 1 1 圖 等 說 明 習 用 之 TFT陣列的製造程序及構造。 1 1 圖 27及 CBI 圖 2 8所 示 的 習 用 裝置 ,首 先於洗淨 的玻 璃基板 1 1 1以噴鍍法等的方法形成鉻, 鉅, 鈦等之金屬薄膜, 然後 訂 1 以 照 像 独 刻 等 的 方 法 形 成 必 要的 模圖 而做成閘 極(及閘極 1 I 配 線 )2 0 其 次 以 噴 鍍 法 等 的 方法 形成 IT0 (铟錫 氧化 物)等 1 I 的 透 明 導 電 膜 9 將 其 以 照 像 蝕刻 法等 的方法形 成必 要的模 1 [ 圖 而 做 成 畫 素 電 極 3。 其次以等電漿C V D (化學氣相澱積)法 1 等 形 成 做 為 閘 極 絶 緣 膜 4之例如為由S i 〇2 , S i N * 金 羼氣化 1 1 膜 等 的 絶 緣 膜 9 做 為 半 導 體 層5的i - a -S i 或 Po 1 y - S i ,以及 1 1 做 為 電 阻 性 接 觸 層 6的u -a -S i等。 其次以照像蝕刻法等的 1 1 方 法 將 η ** a - Si 及 i - a - Si 形 成 島狀 /如圖1所示半 導體 層5之 1 1 島 狀 部 分 )或線狀( 細 長 之 帶 狀的 部分 )的模圖。 1 1 1 妖 後 以 昭 像 蝕 刻 法 等 之 方法 形成 必要的模 圖以 形成畫 1 1 素 電 極 上 的 接 觸 孔 9 (汲 極 8與畫素電極3相接的 部分 )〇其 1 1 次 以 噴 鍍 法 等 的 方 法 形 成 鋁 ,鉻 等的 金屬薄膜 ,將 其以照 1 1 本紙張尺度適用中國國家標隼(CNS ) A4規格(210X297公釐) 4 3 8 18 3 經濟部中央標隼局員工消費合作社印製 A7 B7 五、發明説明(5 ) 像蝕刻等的方法形成模圖做成源極(及源極配線)7及汲極 8。其次將源極與汲極之間(圖4所示半導體層5上部之未被 源極及汲極被覆的部分)的n-a-Si由蝕刻去除。最後因應 需要以SiN等形成保護膜。 如上述構成的TFT陣列,由於雜物構成閘極2與汲極8 的短路,以及由其構成之不能得十分的電阻性接觸等之理 由,以數PPm的或然率發生不能正常動作的晝素,亦即所 謂點缺陷。用以修復該點缺陷的方法有如日本特開昭59-101693號公報及特開平2-135320號公報掲示,由形成連接 互為相鄰之驅動電極間的模圖,而由雷射照射將成為缺陷 的畫素電極連接至相鄰之畫素電極的方法。 圖29表示具有積蓄電容之用於習用的液晶顯示裝置之 TFT陣列的部分擴大圖,圖30為圖29中的A-A斷面圖。匾中 ,1為玻璃基板,21為積蓄電容電極,31為積蓄電容的電 介質。 以下說明上述型類之習用TFT陣列的製造程序及構造 。首先於洗淨的玻璃基板1以噴鍍法等的方法形成鉻,鉅, 鈦等的金屬薄膜,然以照像蝕刻法等的方法形成模圖以形 成積蓄電容電極21。其次以電漿CVD法等形成做為積蓄; 容之電介質31的氮化矽或氣化矽等的膜,並形成用以接觸 於其後形成的閘極及閘極配線2之接觸孔模圖。其次以噴 鍍法等的方法形成鉻,鉅,鈦等的金靨薄膜,以照像蝕刻 法等的方法將其形成模圖以形成閘極及閘極配線2。其後 以噴鍍等的方法形成ΙΤ0(洇錫氧化物)等的透明導電膜, 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210X29?公釐) c (請先閲讀背面之注意事項再填寫本頁)ο 0 QS41 Α7 Β7 V. Description of the invention (3) [Industrial application field] The present invention relates to a thin film transistor (TFT, Thin Film Transistor) array board, an liquid crystal display device and a TFT array using the same The manufacturing method of the substrate is particularly about providing a repair method for improving point defects, which is one of the main reasons for lowering the manufacturing yield. [Conventional Technology] Conventional liquid crystal display devices use TFT arrays as shown in FIG. 25 and FIG. 26. Fig. 25 is a partially enlarged view of a TFT array used in a conventional liquid crystal display device, and Fig. 26 is a cross-sectional view taken along line A-A in Fig. 25. In the figure, 1 is a glass substrate, 2 is a gate wiring that also serves as a gate U ate), 3 is a pixel electrode formed by a transparent conductive film, 4 is an insulating film, 5 is a semiconductor layer, and 6 is a resistive contact (ohmic contact) ) Layer, 7 is the source ♦ Wiring, 8 is the drain 〇 Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs (please read the precautions on the back before filling in this page) The following describes the conventional TFT array Manufacturing process and structure. First, a gold thin film of chromium (O), giant (Ta), titanium (Ti), etc. is formed on the cleaned glass substrate 1 by sputtering ing, etc., and then a circuit is formed by photoetching, etc. The pattern is made into a gate. Wiring 2. Secondly, an insulating layer such as nitrided sand (SiN) or silicon dioxide (Si〇2), which is used as the smell electrode insulating film 4, is formed by a plasma deposition chemical vapor deposition method (p 1 asma CVD, chbica 1 Vapor Deposition) The film includes ia-Si or Poly-Si as the semiconductor layer 5, and na-Si as the resistive contact layer 6. Secondly, to form na-Si and ί-a-Si into islands or lines by photo-etching, etc. This paper scale applies the Chinese National Standard (CNS) A4 specification (210X29 * 7mm) 3 38 183 A7 B7 Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of the invention (4) * 1 pattern (P at te Γ η) 〇Secondly, the tin tin vapors are formed by spraying and other methods (1: | I IT0, I ndium-T i η Ox ide) and other transparent conductive films to form pixel electrodes 1 1 1 3 〇 Then, a metal thin film such as aluminum (A e), complex (Cr), etc. is formed by a sputtering method, / —S 1 I Please 1 I make it as a source by forming a pattern by photo etching etc. • Read 7 after wiring 7 and drain 8 I 1 I 9 Will source η- of resistive contact layer 6 between drain a-Si removes the background by a single tick. Finally, a protective film is formed of Si N or the like as needed. Meaning 1 event 1 The conventional TFT array used for this type of liquid crystal display device is shown in item 27 and then filled in and shown in FIG. 28 0. FIG. 27 shows the TFT% used for the conventional liquid crystal display device. 9 Figure 28 is a BB cross-sectional view of Figure 27. The following describes the manufacturing process and structure of the conventional TFT array with reference to FIG. 11 on the page. 1 1 Figure 27 and the conventional device shown in Figure 28 of CBI. First, a metal thin film of chromium, giant, titanium, etc. is formed on the cleaned glass substrate 1 1 1 1 by spraying, etc., and then 1 is ordered to take photos alone Form the gate pattern (and gate 1 I wiring) by etching and other methods to form the gate (and gate 1 I wiring) 2 0 Next, form a transparent conductive film 9 of 1 I such as IT0 (Indium Tin Oxide) by sputtering or other methods. The necessary mold 1 is formed by a photo-etching method or the like to form a pixel electrode 3. Next, the gate insulating film 4 is formed by an isoplasma CVD (Chemical Vapor Deposition) method 1 etc. The insulating film 9 made of, for example, S i 〇2, S i N * Jinji gasification 1 1 film etc. I-a -S i or Po 1 y -S i of the semiconductor layer 5, and u -a -S i of the resistive contact layer 6 as 1 1 and so on. Secondly, η ** a-Si and i-a-Si are formed into islands by the 1 1 method such as photo etching or the like (as shown in FIG. 1 1 1 island part of the semiconductor layer 5) or linear (slender belt The figure of the shape part). 1 1 1 The demon forms the necessary pattern by the method such as the etching method of the image to form the contact hole 9 (the portion where the drain 8 and the pixel electrode 3 are in contact) on the pixel electrode. The metal film of aluminum, chromium, etc. is formed by spraying method, etc., and it is applied to the Chinese National Standard Falcon (CNS) A4 specification (210X297 mm) according to the paper size of 1 1 4 3 8 18 3 Central Standard Falcon Bureau of the Ministry of Economic Affairs Printed by employees' consumer cooperatives A7 B7 V. Description of invention (5) Form a pattern by etching and other methods to make source (and source wiring) 7 and drain 8. Next, the n-a-Si between the source and the drain (the portion of the upper portion of the semiconductor layer 5 shown in FIG. 4 that is not covered by the source and the drain) is removed by etching. Finally, if necessary, a protective film is formed with SiN or the like. In the TFT array constructed as described above, due to the short circuit between the gate 2 and the drain 8 due to impurities, and the inability to obtain a very resistive contact, the diurnal element that cannot operate normally occurs with a probability of several PPm. This is the so-called point defect. The methods for repairing this point defect are as shown in Japanese Patent Laid-Open No. 59-101693 and Japanese Patent Laid-Open No. 2-135320. By forming a pattern between drive electrodes adjacent to each other, laser irradiation will become A method of connecting a defective pixel electrode to an adjacent pixel electrode. Fig. 29 is a partially enlarged view of a TFT array of a conventional liquid crystal display device having a storage capacitor, and Fig. 30 is a cross-sectional view taken along line A-A in Fig. 29. In the plaque, 1 is a glass substrate, 21 is a storage capacitor electrode, and 31 is a dielectric of the storage capacitor. The following describes the manufacturing process and structure of the conventional TFT array of the above type. First, a metal thin film of chromium, giant, titanium, or the like is formed on the cleaned glass substrate 1 by a method such as sputtering, and then a pattern is formed by a method such as photo etching to form a storage capacitor electrode 21. Secondly, a plasma CVD method or the like is used as the accumulation; a film of silicon nitride or vaporized silicon of the dielectric 31 is formed, and a contact hole pattern for forming the gate and the gate wiring 2 formed afterwards is formed . Next, a thin film of gold, such as chromium, giant, and titanium, is formed by a method such as sputtering, and then patterned to form a gate and a gate wiring 2 by a method such as photolithography. Afterwards, a transparent conductive film such as ITO (fossil oxide) is formed by spraying, etc. The paper size is applicable to the Chinese National Standard (CNS) Λ4 specification (210X29? Mm) c (Please read the precautions on the back first Fill in this page)

3003^1 A7 B7 經濟部中央標準局員工消費合作社印製 五、 發明説明 (6 ) I 並 將 其 以 照 像 蝕 刻 法 等 的 方 法 形 成 模圖 做 成 室 素 電 極 3 〇 Η I 其 次 以 電 漿 CVD法等形成做為閘極絶綠膜4的 氮 化 矽 9 1 1 1 氣 化 矽 等 的 绝 緣 膜 t 做 為 半 導 體 層 5的i -a -S ί或Ρ ο 1 y - Si 等 1 I 請 I * 以 及 做 為 電 阻 性 接 觸 層 6的η -a -S 1 〇 其次以照像蝕刻 先 閱 1 I 1# 1 I 法 等 的 方 法 將 η - a - Si 及 1 - a - si 形 成 島狀 或 線 狀 的 楔 圖 〇 其 背 1 | 之 1 次 以 照 像 蝕 刻 法 等 的 方 法 形 成 模 圖 ,於 蜜 素 電 極 3上形成 注 意 1 I 事 1 接 觸 孔 〇 其 次 以 噴 鍍 法 等 形 成 鋁 鉻等 的 金 羼 薄 膜 將 其 項 1 填 —1 以 照 像 蝕 刻 法 等 形 成 模 圖 以 做 成 源 極與 源 極 配 線 7及汲極 寫 本 百 ▲ I 8後, 將源極< >汲極間之η -a -S i由蝕刻去除。 最後因應必 貝 、^〆 1 1 I 要 以 Si N等形成保護膜。 1 1 如 上 述 構 成 的 TFT陣列, 由於雜物構成閘極2與 汲 極 8 1 1 的 短 路 t 以 及 由 其 構 成 之 不 能 得 充 分的 電 阻 性 接 觸 等 之 理 訂 1 由 以 數 P P m的或然率發生不能正常動作的畫素, 亦即所 1 I 謂 點 缺 陷 〇 用 以 修 復 該 缺 陷 的 方 法 有如 B 本 待 開 平 2 - 1 1 2 8 4 1 20 號 公 報 或 特 開 平 5 - 6 6 4 1 5號公報所掲示, 將連接相 1 1 鄰 驅 動 電 極 間 的 模 圖 與 積 蓄 電 容 同 時形 成 t 將 其 由 雷 射 照 1 1 射 熔 融 而 將 成 為 缺 陷 之 衋 素 電 極 至相 鄰 之 奎 素 電 極 的 方 1 1 法 〇 1 1 [發明所欲解決的課題] 1 1 如 上 述 於 習 用 的 TFT陣列存在有因點缺陷的發生使成 1 I 品 率 低 下 的 問 題 〇 又 於 習 用 的 點 缺 陷修 復 方 法 t 雖 然 具 備 1 I 修 復 點 缺 陷 的 連 接 模 圖 1 然 而 欲 以 雷射 照 射 該 將 模 圖 與 鄰 1 1 I 接 的 盡 素 電 極 連 接 時 * 由 於 亶 素 電 極為 透 明 而 由 畫 素 電 極 1 1 側 照 射 的 雷 射 光 透 過 畫 素 霄 極 » 構 成不 容 易 與 修 理 用 之 連 1 1 本纸張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 6 38 183 A7 B7 經濟部中央標準局員工消費合作社印製 五、 發明説明 (7 ) I 接 模 圖 做 良 好 連 接 的 問 題 0 1 :I I 又 於 實 行 雷 射 照 射 時 1 亦 有 不 能 確 實 熔 融 連 接 楔 圖 的 1 1 | 狀 態 而 成 修 復 困 難 的 問 題 0 1 I 請 1 又 於 習 用 的 點 缺 陷 修 復 方 法 » 雖 妖 備 有 為 了 修 復 的 模 先 閱 1 I 讀 1 | 圖 > 然 而 由 雷 射 照 射 將 該 模 圖 與 鄰 接 的 畫 素 電 極 連 接 時 9 背 IS 1 I 之 1 | 由 於 畫 素 電 極 為 透 明 而 由 亶 素 電 極 側 照 射 的 雷 射 光 透 過 畫 注 意 1 1 事 1 素 電 極 f 構 成 不 容 易 做 良 好 之 連 接 的 問 題 Ο 項 再 導 1 —J 本 發 明 為 鑑 於 此 » 以 具 備 與 閘 極 及 閘 極 配 線 同 材 料 同 Ή 本 4- 頁 1 時 形 成 的 重 複 於 鄰 接 之 2畫素的點缺陷修復模圖, 以及介 1 I 由 閘 極 绝 緣 膜 形 成 於 該 點 缺 陷 修 復 模 圖 上 的 島 部 » 而 對 於 1 認 為 點 缺 陷 的 晝 素 以 雷 射 光 切 斷 其 畫 素 的 電 晶 體 部 > 以 雷 1 1 射 光 照 射 而 介 由 點 缺 陷 修 復 模 圖 將 鄰 接 之 畫 素 的 畫 素 電 極 訂 1 相 互 間 予 以 連 接 者 0 1 1 又 以 具 備 與 積 蓄 電 容 霣 極 同 材 料 同 時 形 成 的 重 複 於 鄰 1 I 接 之 2畫素的點缺陷修復模圖, 以及介由積蓄電容電介質 1 膜 形 成 於 該 點 缺 陷 修 複 模 圖 上 的 島 部 , 而 對 於 認 為 點 缺 陷 \ I 的 畫 素 以 雷 射 光 切 歐 其 晝 素 的 電 晶 體 部 t 以 雷 射 光 照 射 而 1 1 介 由 點 缺 陷 修 復 模 圖 將 鄰 接 之 畫 素 的 盡 素 電 極 相 互 間 予 以 1 1 連 接 者 0 1 1 以 上 述 狀 態 為 將 介 以 绝 緣 膜 的 2金羼膜, 亦即為將點 1 I 缺 陷 修 復 模 圖 及 接 以 畫 素 電 極 形 成 的 島 部 以 雷 射 連 接 % 因 1 1 此 可 容 易 並 確 實 的 修 復 0 1 1 1 [圖面的簡單說明] 1 1 I 圓 1表示本發明實施例1 之 用 於 液 晶 顯 示 裝 置 的 TFT陣 1 1 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) 38 183 經濟部中夬標準局員工消費合作社印製 A7 B7 五、發明説明(8 ) 列之部分平面圖。 圖2表示圖1之A-A斷面圖。 圖3表示圖1之B-B斷面函。 圖4表示本發明實施例2之用於液晶顯示裝置的TFT陣 列之部分斷面圖。 圖5表示本發明實施例3之用於液晶顯示裝置的TFT陣 列之部分平面圖。 圖6表不圖5之A_A斷面圖。 圖7表7F圖5之B-B斷面圖。 圖8表示本發明實施例4之用於液晶顯示裝置的TFT陣 列之部分斷面圖。 圖9表示本發明實施例5之用於顯示裝置的TFT陣列之 部分平面圖。 圖10表示圖9之A-A斷面圖。 圖11表示圖9之B-B斷面圖。 圖12表示本發明實施例6之用於顯示裝置的TFT陣列之 斷面圖。 圖13表示本發明實施例7之用於顯示裝置的TFT陣列之 部分¥面圖。 圖14表示圖13之A-A斷面圖。 圖15表示圖13之B-B斷面圖。 圖16表示本發明實施例8之用於顯示装置之TFT陣列的 斷面圖。 圖17表示本發明實施例9之用於液晶顯示裝置的TFT陣 本纸張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) Q , Q , Q , (請先閱讀背面之注意事項再填寫本頁) -.3003 ^ 1 A7 B7 Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of the invention (6) I and formed into a pattern by photo etching etc. to make the chamber electrode 3 〇Η I followed by plasma The silicon nitride 9 as the gate green film 4 is formed by the CVD method, etc. 1 1 1 1 The insulating film t such as vaporized silicon is i-a -S ί or Ρ ο 1 y -Si etc. as the semiconductor layer 1 I please I * and η -a -S 1 as the resistive contact layer 6 followed by photo etching first reading 1 I 1 # 1 I method and the like to form η-a-Si and 1-a-si Island-shaped or linear wedge pattern 〇The back 1 | Once, the pattern is formed by the photo etching method, etc., and the attention is formed on the vegan electrode 3. The contact hole is formed by the sputtering method, etc. Aluminium chromium and other gold film are filled with item 1 to 1 to form a photo-etching method. After forming the pattern drawing to make source-to-source wiring 7 and drain script 100 ▲ I 8, remove the η -a -S i between source < > drain by etching. Finally, due to the need, ^ 〆 1 1 I need to form a protective film with Si N and so on. 1 1 As described above, the short circuit t of the gate 2 and the drain 8 1 1 due to the impurities constitutes the reason that the sufficient resistive contact cannot be obtained due to the composition 1 and it occurs by the probability of a few PP m Pixels that do not work properly, that is, so-called I point defects. The method used to repair the defects is like B. To be published in Hei Ping No. 2-1 1 2 8 4 1 20 or No. 5-6 6 4 1 5 The gazette shows that the pattern between the connecting phase 1 1 adjacent to the driving electrode and the storage capacitor are simultaneously formed t. It will be melted by the laser beam 1 1 and will be a defect of the element electrode to the side of the adjacent quinoline electrode. 1 Method 〇1 1 [Problems to be solved by the invention] 1 1 As mentioned above, the conventional TFT array has a problem that the defect rate is reduced due to the occurrence of point defects. I also has a conventional point defect repair method t 1 I Connection model for repairing point defects Laser irradiation When connecting the pattern to the pixel electrode connected to the adjacent 1 1 I * The laser light irradiated from the pixel electrode 1 1 side is transparent through the pixel electrode because the pixel electrode is transparent »It is not easy to repair and use Link 1 1 This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 6 38 183 A7 B7 Printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs V. Description of the invention (7) I The drawing is good Connection problem 0 1: II When performing laser irradiation 1 There are also 1 1 which cannot be reliably melted and connected to the wedge diagram | The problem that is difficult to repair due to the state 0 1 I Please 1 It is also a conventional method of repairing point defects »Although monster There is a mold for repair first read 1 I read 1 | Figure> However, when the mold is connected to the adjacent pixel electrode by laser irradiation 9 Back 1 of IS 1 I | By The pixel electrode is transparent and the laser light irradiated from the side of the pixel electrode passes through the painting. Note 1 1 Things 1 The element electrode f constitutes a problem that it is not easy to make a good connection Ο Item Redirection 1 —J The present invention takes this into consideration » The same material as the gate and the gate wiring is the same as Ή. This is a pattern of point defect repair patterns that are repeated at 2 pixels adjacent to each other on page 4 of page 4-, and I 1 is formed by the gate insulating film at this point defect repair pattern The island on the picture »For 1 day pixel that is considered to be a point defect, the transistor part of its pixel is cut with laser light > The picture of the adjacent pixel is illuminated by the laser 1 1 laser light and the point defect repair model The element electrodes 1 are connected to each other. 0 1 1 is a pattern of point defects repaired with 2 pixels connected to the adjacent 1 I and formed by the same material with the storage capacitor and the same material. The capacitor dielectric 1 film is formed on the island part of the point defect repair pattern, and the pixel part of the pixel that is considered to be a point defect I is cut with laser light and the transistor part t of the diurnal element is irradiated with laser light and 1 1 passes through the point The defect repairing pattern maps all the adjacent electrodes of the adjacent pixels to each other. 1 1 Connector 0 1 1 In the above state, a 2 gold film with an insulating film interposed, which is the point 1 I defect repairing pattern. And the island part formed by the pixel electrode is connected by a laser. Because 1 1 this can be easily and surely repaired. 0 1 1 1 [Simple description of the drawing] 1 1 I Circle 1 indicates the use of Embodiment 1 of the present invention TFT array of liquid crystal display device 1 1 The paper size is in accordance with Chinese National Standard (CNS) A4 specification (210X 297 mm) 38 183 Printed A7 B7 by Employee Consumer Cooperative of China National Standards Bureau, Ministry of Economic Affairs 5. Invention description (8) listed Partial plan view. Fig. 2 shows an A-A cross-sectional view of Fig. 1. Figure 3 shows the B-B section letter of Figure 1. Fig. 4 shows a partial cross-sectional view of a TFT array used in a liquid crystal display device according to Embodiment 2 of the present invention. Fig. 5 shows a partial plan view of a TFT array used in a liquid crystal display device according to Embodiment 3 of the present invention. Figure 6 shows the A_A cross-sectional view of Figure 5. Figure 7 Table 7F B-B cross-sectional view of Figure 5. Fig. 8 shows a partial cross-sectional view of a TFT array used in a liquid crystal display device according to Embodiment 4 of the present invention. Fig. 9 shows a partial plan view of a TFT array for a display device according to Embodiment 5 of the present invention. Fig. 10 is a cross-sectional view taken along line A-A in Fig. 9. Fig. 11 shows a B-B cross-sectional view of Fig. 9. Fig. 12 shows a cross-sectional view of a TFT array for a display device according to Embodiment 6 of the present invention. Fig. 13 is a partial plan view of a TFT array for a display device according to Embodiment 7 of the present invention. Fig. 14 is a cross-sectional view taken along line A-A in Fig. 13. Fig. 15 shows a B-B cross-sectional view of Fig. 13. Fig. 16 shows a cross-sectional view of a TFT array for a display device according to Embodiment 8 of the present invention. FIG. 17 shows that the paper size of the TFT array used in the liquid crystal display device according to Embodiment 9 of the present invention is applicable to the Chinese National Standard (CNS) A4 specification (210X 297mm) Q, Q, Q, (please read the notes on the back first (Fill in this page again)-.

'1T A7 B7 經濟部中央標準局員工消費合作杜印製 五、 發明説明 (9 ) I 列 之 部 分平 面 圖 0 :| | 圖 18表 示 圖 17 之 A- A斷面 圖。 1 1 I 圖 19表 示 圖 1 7 之 B - B斷面 圖。 1 I 請 1 圖 20表 示 本 發 明 實 施例1 0之 用 於 液 晶 潁 示裝置的 TFT 先 閱 1 I 1 I 陣 列 之 部分 斷 面 rat _ 0 背 1 I 之 1 圖 21表 示 本 發 明 實 施例1 1之 用 於 液 晶 顯 示裝置的 TFT 1 f ψ 1 陣 列 之 部分 平 面 圖 〇 再 1 4 —J 圖 22表 示 圖 21 之 A- A斷面 圖。 馬 本 頁 1 圔 23表 示 圖 21 之 B - B斷面 面 國〇 ___, 1 I 圖 24表 示 本 發 明 實 施例1 2之 用 於 液 晶 顯 示裝置的 TFT 1 1 陣 列 之 部分 斷 面 圖 〇 1 1 圖 25表 示 習 用 之 用 於液晶顯 示 裝 置 的 TFT陣列之部分 訂 1 平 面 画 0 1 1 圖 26表 示 圖 25 之 A- A斷面 圖。 1 I 圖 27表 示 習 用 之 用 於液晶顯 示 裝 置 的 TFT陣列的部分 1 平 面 圖 0 Γ I 圖 23表 示 面 圖 27之 B - B斷面 圖。 1 1 圖 29表 示 習 用 之 用 於液晶顯 示 裝 置 的 TFT陣列之部分 1 1 平 面 圖 0 * ! 1 圖 30表 示 圖 29之 A- A斷面 圖。 1 j [實施例] 1 I s_ 施 例 1 1 ! I 參 照圖 面 說 明 實 施 例1 〇 圖1 表 示 使 用 於 本發明之 液晶 1 1 1 顯 示 裝 置的 TFT陣列之部分平 面圖, 圖2 為 圖 1之A - A斷 面圖 1 1 本紙張尺度適用中國國家標準(CNS ) A4規格(210Χ 297公釐) 9 38183 A7 B7 經濟部中央標準局員工消費合作社印製 五、 發明説明 (10 ) 1 * 圖 3為圖1 之B- B斷面圖。 圖 中 9為與閘極 •配線2同 材 料 '1 I 並 於 同 時 形 成之 第1金羼模圖 的 點 修 復模 圖 t 1 0為 與 源 極 1 1 I ♦ 配 線 7及汲極8同材料 同 時形成的第2金 羼 模 圖 之 島 部 9 -Ν 1 I 請 I 島 部 1 0與 晝 素電 極3上接觸以 形 成 〇 又圖 中 C - C及D 表 示 做 先 閱 1 1 讀 1 I 點 缺 陷 修 復 之際 照射雷 射 處所。 圖中與習用例同- -部分註 背 1 I 之 1 以 同 一 符 號 而省 各其說 明 0 注 意 1 I 事 1 以 下 說 明本 實施例 之 TFT陣 列 的 製造 方 法 〇 首 先 於 洗 項 再 填 1 淨 的 玻 璃 基 板1以噴鍍法等的 方 法 形 成鉻 1 鉅 9 鈦 等 之 膜 寫 本 百 浪 I 厚 為 3 0 0 η m程度的高融點金屬 薄 膜 9 然後 將 其 以 照 像 蝕 刻 Η '— 1 1 I 法 等 的 方 法 形成 模圖以 形 成閘極 >配線2及 點 缺 陷 修 復 模 1 1 圖 9。 其次以電漿C V D (化學氣 相 澱 積 )法等形成做為閘極絶 1 1 緣 膜 4之膜厚300 n in程度 的 S i N或 Si 〇2 等的 絶 綠 膜 » 做 為 半 訂 1 導 體 層 5之膜厚200nm程 度 的i -a -S i 或 Ρ 〇 1 y - Si 等 以 及 做 1 1 為 電 阻 性 接 觸層 6之膜厚50nm 程 度 的 η - a ~ si 等 〇 其 次 以 照 1 I 像 独 刻 法 等 的方 法將η - a - S i及i -a -S i形成線狀或島狀的模 1 圖 0 Γ I 其 次 以 噴鍍 等的方 法 形成膜厚1 0 0 n m 程 度 之 ΙΤ0 ( 絪 錫 1 1 氣 化 物 )等的透明導電膜, 然 後 以 照 像蝕 刻 法 等 的 方 法 形 1 1 成 模 _ 以 形 成畫 素電極 3 〇 其 次 以 噴 鍍法 等 形 成 膜 厚 4 0 0 n m 1 1 程 度 的 鋁 鉻或 鉬等的 金 羼薄膜, 然後將其以照像蝕刻法 1 I 等 形 成 模 圖 以形 成源極 • 配線7 汲 極8以及於點缺陷修復 1 1 模 圖 9之接觸部分的島部1 0 〇 亦 即 在 做點 缺 陷 修 復 時 雷 射 1 1 1 照 射 處 所 D 〇 為於點缺陷修復 模 圖 9上經介以閘極絶緣膜4 1 1 及 金 素 電 極 3形成島部1 0 〇 其 後 將 源 極· 汲 極 間 之 η - a - S ί 1 1 10 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) 38183 A7 B7 經濟部中央標準局員工消費合作杜印製 五、 發明説明(11 ) | 以 独 刻 去 除 0 取 後 因 應 需 要 以 Si N形成保護膜。 於 如 上 述 作 成 的 TFT陣列及用該陣列作成的液晶顯示 1 1 裝 置 * 對 於 認 為 點 缺 陷 的 盡 素 9 將 該 畫 素之 電 晶 體 部 以 雷 1 1 請 1 I 射 光 昭 yv»、 射 圖 1所示C -C 線 部 將 其 切 斷 $ 然 後照 射 雷 射 光 於 耋 先 閱 1 I 讀 I I 素 電 極 3上的D部 及 鄰 接 盡 素 之 畫 素 電 極 3上的D部 1 亦 卽 經 背 ιέ 1 I 之 1 I 介 點 缺 陷 修 復 模 圖 9將鄰接之畫素的畫素電極相互間予以 注 意 1 ψ 1 短 路 0 由 於 僳 將 介 著 絶 緣 膜 之 兩 金 羼 膜 ,即 為 以 雷 射 連 接 .項 再 1 填 點 缺 陷 修 復 模 圖 9及島部1 0 , 可以容易並確實的實行修復 寫 本 •2Γ I 0 尤 其 對 於 由 畫 素 電 極 3側的雷射照射甚具效果。 又由於 貝 1 1 I 傷 以 鉻 t 鉅 或 鈦 等 的 金 屬 形 成 點 缺 陷 修 復模 圖 9 因 此 比 較 1 i 用 矽 薄 膜 形 成 該 模 圖 時 9 其 照 射 雷 射 時 的熔 融 連 接 更 容 易 1 1 0 又 於 本 實 施 例 構 成 為 連 接 左 右 的 盡 素 電極 » 但 亦 讓 成 為 訂 1 連 接 上 下 的 盡 素 電 極 亦 可 〇 1 1 依 本 實 施 例 將 認 識 為 點 缺 陷 的 畫 素 利用 點 缺 陷 修 復 模 1 1 圖 與 鄰 接 的 畫 素 短 路 » 使 相 互 鄰 接 的 畫 素電 極 在 同 電 位 做 1 意 同 一 的 顯 示 f 因 此 難 認 為 點 缺 陷 而 可 提 高TFT陣列的成品 1 I 率 0 又 依 本 實 施 例 與 習 用 技 術 為 以 同 樣 的製 造 方 法 而 僅 變 1 1 更 其 模 圖 1 因 此 其 加 工 程 序 數 不 致 增 加 而具 不 增 加 成 本 的 1 1 優 點 〇 ' 1 1 又 依 本 發 明 > 對 於 TFT陣列階段發現之點缺陷的修復 I I 白 不 待 言 f 對 於 成 為 具 有 該 TFT陣列基板與透明電極及色 1 1 濾 器 等 之 對 向 電 極 基 板 之 間 挾 持 液 晶 的 液晶 顯 示 裝 置 之 後 1 I I 9 亦 卽 為 由 畫 素 電 極 側 射 入 雷 射 光 的 狀 態, 亦 可 容 易 並 且 1 1 I 確 實 的 修 復 0 1 1 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210X297公釐) 38 183 11 A 7 B7 經濟部中央標準局員工消費合作社印製 五、 發明説明(12 ) 1 菁 旅 蓋 2 | 圖 4表示用於本發明 之 實 施 例 2的顯示裝置之TFT陣 列 I 1 | 部 分 斷 面 圖。 本實 施例除將畫素電極3與 源 極 • 配 線7及汲 ^-Ν 1 I 請 I 極 8的製造工程之順序更 換 之 外 9 為 與 實 施 例 1相同的構造 先 閱 1 I 讀 I I 〇 亦 即 於 點缺 陷修 復模画9上 挾 以 絶 緣 膜 形 成 島 部 10, 又 背 \έ 1 1 之 1 在 其 上 形 成金 素電 極3 〇 如 上 述 島 部 1 0 可 以 為 形 成 在畫 素 注 意 1 I ψ 1 電 極 3之上或之下的構成 9 任 一 之 構 成 均 可 利 用 點 缺陷 修 項 再 1 填 i 復 模 圖 9容易且確實的修 復 點 缺 陷 9 可 以 得 到 與 實 施例 1同 寫 本 - 頁 1 樣 的 效 果 0 1 I S. 旃 例 3 1 1 以 下 參照 圖面 説明本發明之實施例3 〇 圖 5表示用於本 1 1 發 明 之 顯 示裝 置的 TFT陣 列 部 分 平 面 圖 f m 6為圖5之A- A斷 訂 1 面 圖 , 圖 7為圖5之 B-B斷 面 圖 0 圖 中 11 為 蝕 刻 停 止 膜。 1 1 其 次 説明 本實 施例之TFT陣 列 的 製 造 方 法 0 首 先將 洗 1 I 淨 之 玻 Ιήχ 调 基板 1以噴鍍法 等 的 方 法 形 成 鉻 9 鉅 t 鈦 等之 膜 1 1 Μ 厚 為 3 0 0 η ffl程度的高融點 金 屬 薄 膜 > 然 後 將 其 以 昭 川、 像蝕 刻 1 I 法 等 的 方 法形 成模 圖以形成閘極 配線2 及 點 缺 陷 修復 模 1 1 圖 9〇 其次以電漿C VD (化 學 的 氣 相 澱 積 法 )法等形成做為閘 1 1 極 絶 緣 膜 4之膜厚300ηπ程度的S i N或 Si 0 2 等 的 絶 緣 膜, 做 1 1 為 半 導 體 層5之膜厚100η m程度的i -a -S i或P 〇 1 y - Si 等, 以 1 | 及 做 為 独 刻停 止膜 1 1之膜厚200 n m 程 度 的 Si N或S i 0 2等的絶 1 I 緣 膜 0 其 次以 照像 蝕刻法等的方法形成蝕刻停止膜之模圖 1 I I 0 接 著 以 電漿 CVD法等形 成 做 為 電 阻 性 接 觸 層 6的η -a - S ί膜 1 1 | 9 並 形 成 模圖 0 1 1 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) 12 38183 A7 B7五、發明説明(U )其次以噴鍍等的方法形成膜厚lOOnm程度的ITO (絪錫 氧化物)等的透明導電膜。為得到做為液晶顯示装置所要 η 極 η電_ ο 霄! 5 1罾或為盡一I 路 大成 最形, 原以 膜圖 該模 ,成 度形 亮法40 的方厚 求的膜 鋁 的 度 程 η 等成像 法形照 刻等以 蝕法其 像鍍將 照噴 , 以以膜 其次薄 將其颶 然 。金 之 〇 3 源 成 形 以 圖 模 成 形 等圖膜 法模護 刻復保 蝕修的 極 線 配 及 8 ο 1 部 島 成 形 分 部 接 boe 形 要 極需 汲應 , 因 7Γ 後 最 與 成 陷等 缺iN 點 示 顯 晶 液 的 成 作 列 BF 該 用 及 列 I 8^ 雷 3 以極 部電 體素 晶耋 E <z pr 方 之光 素射 該射 將照 , 後 素其 I 3 , 的斷 TF陷切 的缺線 成點-C 作為: 述認 上於 如對圖 於 ,如 置光 裝射 示 所 (請先閱讀背面之注意事項再填寫本頁) 之 上 上 3 pr 音 D 的 模 復 路 短 極 極 電 電 素 素畫 畫之 之素 齧 3 畫的 接接 鄰鄰 及將 部19 D 圖 修 陷 缺 點 由 介 訂 之 造 構 的 述 上 以'1T A7 B7 Printed by the Ministry of Economic Affairs, Central Bureau of Standards, and Employee Consumption Cooperation V. Description of the invention (9) Part of the plane of line I Figure 0: | | Figure 18 shows the A-A cross-sectional view of Figure 17. 1 1 I Figure 19 shows the B-B section of Figure 1 7. 1 I please 1 FIG. 20 shows the embodiment 1 of the present invention. The TFT used in the liquid crystal display device is read first. 1 I 1 I Partial cross section of the array rat _ 0 Back 1 I. 1 FIG. 21 shows the embodiment 1 of the present invention 1 1 Partial plan view of the TFT 1 f ψ 1 array used in the liquid crystal display device. Then, 1 4 —J FIG. 22 shows the A-A cross-sectional view of FIG. 21. Page 1 of this page 圔 23 shows the B-B cross-sectional state of FIG. 21 ___, 1 I FIG. 24 shows a partial cross-sectional view of a TFT 1 1 array for a liquid crystal display device according to Embodiment 12 of the present invention. 〇1 1 FIG. 25 shows a part of a conventional TFT array used in a liquid crystal display device. 1 Plane drawing 0 1 1 FIG. 26 shows an A-A cross-sectional view of FIG. 25. 1 I FIG. 27 shows a portion of a conventional TFT array used in a liquid crystal display device. 1 Plane view 0 Γ I FIG. 23 shows a view B-B cross-sectional view of FIG. 27. 1 1 FIG. 29 shows a part of a conventional TFT array used in a liquid crystal display device. 1 1 Plan view 0 *! 1 FIG. 30 shows the A-A cross-sectional view of FIG. 29. 1 j [Example] 1 I s_ Example 1 1! I will explain Example 1 with reference to the drawings. FIG. 1 shows a partial plan view of a TFT array of a liquid crystal 1 1 1 display device used in the present invention. FIG. 2 is a diagram of FIG. 1 A-A cross-sectional diagram 1 1 The paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210Χ 297 mm) 9 38183 A7 B7 Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Invention description (10) 1 * Picture 3 is a BB cross-sectional view of FIG. 1. In the figure, 9 is the dot repair pattern of the first gold mold pattern that is the same material as the gate electrode and wiring 2 '1 I and formed at the same time. T 1 0 is the same material as the source electrode 1 1 I. The wiring 7 and the drain electrode 8 are formed at the same time. The island part 9 -N 1 I of the second gold mold model of the second part, please contact the island part 10 with the diurnal electrode 3 to form it. In the figure, C-C and D indicate first reading 1 1 reading 1 I point defect repair Exposure to laser space. The figure is the same as the conventional example.-Part of the note 1 I of 1 I use the same symbol to save the description 0 Note 1 I matter 1 The following describes the manufacturing method of the TFT array of this embodiment. First, fill 1 net in the wash item The glass substrate 1 is formed by a sputtering method or the like to form a film of chromium 1 giant 9 titanium etc. Bai Lang I a high-melting-point metal thin film 9 with a thickness of about 3 0 0 η m and then it is etched as a photo Η′— 1 1 A method such as the I method forms a gate pattern to form a gate> wiring 2 and a point defect repair mold 1 1 FIG. 9. Next, a plasma CVD (Chemical Vapor Deposition) method or the like is used to form a green film such as Si N or Si 〇2 with a thickness of 300 n in as the gate barrier 1 1 edge film 4 and a thickness of 300 n in 1 Conductive layer 5 with a film thickness of approximately 200 nm i-a-S i or Ρ 〇1 y-Si, etc. and 1 1 for the resistive contact layer 6 with a film thickness of approximately 50 nm η-a ~ si etc. followed by 1 I Form η-a-S i and i-a-S i into linear or island-like molds by methods such as single engraving. Figure 1 Γ I Secondly, a film thickness of 100 nm is formed by spraying or other methods A transparent conductive film such as ΙΤ0 (絪 锡 1 1 vapor), etc., and then formed by a photo etching method or the like 1 1 to form a pixel electrode 3 〇 Secondly, a film thickness is formed by a sputtering method or the like 4 0 0 nm 1 1 degree of aluminum chromium or molybdenum thin film, etc., and then use photo etching method 1 I to form a pattern to form the source electrode • Wiring 7 Drain 8 and point defect repair 1 1 pattern 9 The island part 10 of the contact part is also in When the point defect is repaired, the laser 1 1 1 irradiates the location D. The point defect repair pattern 9 is formed with the gate insulating film 4 1 1 and the gold electrode 3 to form the island portion 10. Then, the source and drain Η-a-S ί 1 1 10 The size of the paper is in accordance with the Chinese National Standard (CNS) A4 specification (210X 297 mm) 38183 A7 B7 Central China Bureau of Economic Affairs Employee consumption cooperation du printing V. Invention description (11 ) | Remove 0 with a single tick. After taking it, form a protective film with Si N as needed. For the TFT array fabricated as described above and the liquid crystal display fabricated using the array 1 1 device * For the pixel that considers a point defect 9 The transistor part of the pixel is thundered 1 1 Please 1 I illuminate the light yv », shoot 1 The C-C line part shown is cut off and then irradiated with laser light to the first reading 1 I reading II The D part on the pixel electrode 3 and the D part 1 on the pixel electrode 3 adjacent to all the pixels are also passed through. 1 I 1 I I defect repair mode Figure 9 Pay attention to the pixel electrodes of adjacent pixels 1 ψ 1 Short circuit 0 Since the two gold films between the insulating film are connected by the laser, it is a laser connection. Item 1 is filled with dot defect repair pattern 9 and island part 10, and the repair script can be easily and surely performed. 2Γ I 0 is especially effective for laser irradiation from the pixel electrode 3 side. In addition, because the shell 1 1 I is damaged by a metal such as chromium or titanium, a point defect repair mold is formed. FIG. 9 Therefore, comparison 1 i When the mold pattern is formed with a silicon thin film 9 It is easier to melt the connection during laser irradiation 1 1 0 In this embodiment, it is configured to connect left and right electrode electrodes »but it can also be set to 1 to connect the upper and lower electrode electrodes 〇1 1 According to this embodiment, pixels recognized as point defects use point defect repair mode 1 1 Figure Short circuit with adjacent pixels »Make the adjacent pixel electrodes display the same meaning at the same potential f. Therefore, it is difficult to think of a point defect and can improve the finished TFT array 1 I rate 0 According to this embodiment and the conventional technology The same manufacturing method only changes 1 1 to change its model. Therefore, the number of processing procedures does not increase and it has the advantage of 1 1 that does not increase cost. 〇 1 1 According to the present invention > Repair of point defects found in the TFT array stage II Needless to say f After the liquid crystal display device that has the liquid crystal between the TFT array substrate and the counter electrode substrate such as the transparent electrode and the color filter 1 1 holds 1 II 9 The state of laser light incident from the pixel electrode side is also easy and 1 1 I is indeed repaired 0 1 1 This paper scale is applicable to the Chinese National Standard (CNS) Λ4 specification (210X297 mm) 38 183 11 A 7 B7 Ministry of Economic Affairs Printed by the Staff Consumer Cooperative of the Central Bureau of Standards 5. Description of the invention (12) 1 Travel cover 2 | FIG. 4 shows a partial cross-sectional view of a TFT array I 1 | used in the display device of Embodiment 2 of the present invention. In this embodiment, the pixel electrode 3, the source electrode, the wiring 7, and the ^ -Ν 1 I are requested to be replaced in the order of the manufacturing process of the I electrode 8. 9 is the same structure as the embodiment 1. First read 1 I read II 〇 That is, an island 10 is formed with an insulating film on the point defect repair mold 9, and a gold electrode 3 is formed on the back 1 1 1. As described above, the island 10 can be formed on a pixel. Note 1 I ψ 1 Composition above or below electrode 3 9 Any composition can be repaired using point defects and then fill in i. Duplicate pattern 9 Easy and reliable repair of point defects 9 Can get the same copy as Example 1-Page 1 Effect 0 1 I S. Example 3 1 1 The following describes the embodiment 3 of the present invention with reference to the drawings. FIG. 5 shows a partial plan view of the TFT array used in the display device of the present invention 1 1 fm 6 is A of FIG. 5 -A cut off 1 side view, Figure 7 is the B-B section of Figure 5 Figure 0 Figure 11 is the etching stop film. 1 1 Next, the manufacturing method of the TFT array of the present embodiment will be described. First, the cleaned glass substrate 1 is formed by a method such as a sputtering method, such as a film of chromium 9 giant t titanium 1 1 Μ thick is 3 0 0 η ffl-level high-melting-point metal film> Then it is patterned by Zhaochuan, etching 1 I method, etc. to form a gate wiring 2 and a point defect repairing mold 1 1 FIG. 9 followed by plasma C VD (Chemical Vapor Deposition) method is used to form an insulating film such as Si N or Si 0 2 with a thickness of about 300 ηπ as the gate 1 1 electrode insulating film 4, and 1 1 is the film thickness of the semiconductor layer 5 I -a -S i or P 〇1 y -Si, etc. of about 100η m, with 1 | and as a single-stop stop film 1 1 with a film thickness of about 200 nm, such as Si N or S i 0 2, etc. Edge film 0 Next, the etch stop film is formed by a photo etching method or the like. FIG. 1 II 0 Next, the η -a-S film 1 1 | 9 as the resistive contact layer 6 is formed by the plasma CVD method, etc. Forming figure 0 1 1 This paper scale applies the Chinese National Standard (CNS) A4 specification (210X 297 mm) 12 38183 A7 B7 V. Description of invention (U) Secondly, ITO (acrylic tin oxide) with a film thickness of about 100 nm is formed by spraying, etc. ) Etc. transparent conductive film. In order to obtain the η pole η electricity_ ο Xiao! 5 1 齾 or to make the best way to complete the I path, the film is based on the model, the thickness of the film is determined by the square shape method 40, the thickness of the film aluminum η, etc. The imaging method is shaped, and the etching method is used to form the image. Spray to make it hurricane with the film next thin. Jinzhi 〇3 source forming uses pattern film forming and other film methods to protect the pole line of the complex corrosion protection repair and 8 ο 1 island forming branch is connected to the boe shape. It needs to be absorbed, because it is most likely to sink after 7Γ The iN point shows the formation of the liquid crystal. The BF should be used and the column I 8 ^ Lei 3 will be shot with the polar electron voxel crystal E < z pr. The missing line of the broken TF is cut into a point-C as: Recognize on the above, as shown in the photo, (please read the precautions on the back and then fill out this page) on the 3 pr sound D The shortcomings of the model complex short-electrode electron element painting of the prime element 3 drawing of the adjacent neighbors and the repairing of the 19 D picture. The shortcomings of the drawing are described by the construction of the introduction.

例 施 實 及 1X 例 施 實 與 到 得 可 亦 列 I 果 效 的 樣 同 例 旃 奮 之 置 裝 示 顯 晶 液 於 用 的 4 例 施 實 之 明 發 本 示 表 8 圖 經濟部中央標準局負工消費合作社印製 與超 3 β 極為 電 , 素外 畫之 將換 除更 中 序 例順 施的 實程 本工 〇 造 圖製 面之 斷 8 卜極 Γ 彳及 的 7 列線 陣配 容 亦上9¾ 。 其圖 造在模 構 ,復 的10修 樣部陷 同島缺 圖 模 復30 修 極 陷電 缺素 點晝 於成 即形 上缺 以點 復 修 的 實 確 且 易 極 源 例 施 實 成點例 形用施 模利實 HHff αί 緣可與 絶亦到 以造得 挾構 , 上述陷 9 明 發 本 例1 其 為 僅 造 構 之 列 il T F T 示 〇 所 果例 效施 的實 樣" 同上 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) 3 11 38183 A7 A7 經濟部中央標準局員工消費合作社印製 B7 五、發明説明(14 ) 的構造當不限定於此。 如上述依本發明以雷射光照射溶融鄰接於重複二畫素 之第1金靨模圖以及介以閘極絶緣膜形成於該第1金屬模圖 上的第2金屬模圖,可以得到容易並且確實修復畫素缺陷 之TFT陣列基板及使用該TFT陣列基板的液晶顯示裝置,具 有提高成品率的效果。 又由於第1金靥模圖與閘極配線,第2金屬模圖與源極 及汲極各為以相同金屬材料同時形成,因此以與習用工程 為同樣的工程數,僅以變更模圖遮蔽(patter· n mask),故 可不提高成本而容易製造。 啻旃例5 圖9至圖11表示本發明之實施例5。圖9表示本發明之 顯示裝置使用的TFT陣列之部分平面圖,圖10為圖9之A-A 斷面圖。圖11為圖9之B-B斷面圖。首先以噴鍍法等的方法 形成膜厚300nm程度的鉻,鉅,鈦,鍚,钜,鋁等的高融 點金屬薄膜,然後以照像蝕刻法等的方法形成閘極(及閘 極配線)2,然後於其後形成之點缺陷修復模圖之橋部連接 的位置形成模圖(pattern)12當作島部。其次以噴鍍法等 之方法形成膜厚為ΙΟΟηπι程度的ΙΤ0(洇錫氣化物)等的透明 等電膜。然後以照像蝕刻法等的方法形成模圖以形成盖素 電極3。其後以電漿C V D (化學氣相澱積)法等形成做為閘極 絶線膜4的膜厚300πβ程度的SiN或Si〇2等的絶緣膜,做為 半導體層5之膜厚100nm程度的ί-a-Si或Poly-Si,以及做 為電阻性接觸層6之膜厚500nm程度的n-a-Si。其次以照像 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210X 297公釐) 14 〇 〇 , 〇 « (請先閱讀背面之注意事項再填寫本頁)Example implementation and 1X example implementation and the same results as Deco. I have worked hard to put the crystal display liquid in use. 4 examples of the application of Mingshi are shown in this table. 8 Figure Ministry of Economic Affairs Central Standards Bureau Printed by the Negative Labor Cooperative and Super 3 β poles, the original paintings will be replaced by more practical examples. The cut of the drawing surface 8 Bu Ji Γ 彳 and 7 line array capacity also On 9¾. The picture is built in the model structure, the complex 10 repair samples are trapped in the same island, and the model is complex. The 30 repair electrodes are trapped, and the electric defects are missing in the day, and the points are repaired. It is possible to use the model to make the HHff αί, and it can be used to create the structure. The above-mentioned depression 9 shows this example 1. It is the only example of the structure of the il TFT. The actual example of the effect is the same as the "Ibid. The paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) 3 11 38183 A7 A7 Printed by the Ministry of Economy Central Standards Bureau Employee Consumer Cooperative B7 5. The structure of the invention description (14) is not limited to this. As described above, according to the present invention, the first metal mold pattern adjacent to the repeated two pixels is melted by laser irradiation and the second metal mold pattern formed on the first metal mold pattern through the gate insulating film can be easily and surely repaired A pixel defective TFT array substrate and a liquid crystal display device using the TFT array substrate have the effect of improving yield. Moreover, since the first metal pattern and the gate wiring, the second metal pattern and the source and the drain are formed of the same metal material at the same time, so the same number of projects as the conventional project, only by changing the pattern to cover (patter · N mask), so it can be easily manufactured without increasing the cost. Example 5 Figures 9 to 11 show Example 5 of the present invention. 9 is a partial plan view of a TFT array used in the display device of the present invention, and FIG. 10 is a cross-sectional view taken along line A-A of FIG. Fig. 11 is a sectional view taken along the line B-B in Fig. 9. First, a high-melting-point metal thin film of chromium, giant, titanium, titanium, thorium, aluminum, etc. with a thickness of about 300 nm is formed by a method such as sputtering, and then a gate (and gate wiring) is formed by a method such as photo etching ) 2. Then, a pattern 12 is formed at the position where the bridge portion of the point defect repair pattern formed later is connected as the island portion. Next, a transparent isoelectric film such as ITO (flux tin oxide) having a film thickness of about 100 nm is formed by a method such as a sputtering method. Then, a pattern is formed by a photo etching method or the like to form the capillary electrode 3. Then, a plasma CVD (chemical vapor deposition) method or the like is used to form an insulating film such as SiN or Si〇2 with a thickness of about 300πβ as the gate insulating film 4 and a thickness of about 100 nm as the semiconductor layer 5 Ί-a-Si or Poly-Si, and na-Si as the resistive contact layer 6 with a thickness of about 500 nm. Secondly, according to the photo paper, the Chinese National Standard (CNS) Λ4 specification (210X 297mm) 14 〇 〇, 〇 «(Please read the precautions on the back before filling this page)

、1T Μ ! A7 B7 經濟部中央標準局員工消費合作杜印製 五、 發明説明 ;15 ) :丨 I 蝕 刻 法 等 的 方 法 將 η - a - Si 及 1 - a - Si 形成 線 狀 (或島狀) 的模 圖 〇 I 1 | 其 次 以 昭 像 蝕 刻 法 等 的 方 法 形 成模 圖 以 於 耋 素 電 極上 ^—v 1 I 請 | 形 成 接 觸 孔 9 1 0 其 次 以 噴 鍍 法 等 的 方法 形 成 膜 厚 400 η m程 先 閱 I I it 1 I 度 的 鋁 > 鉻 等 的 金 羼 薄 膜 > 然 後 以 照像 独 刻 法 等 的 方 法形 背 1 之 1 I 成 模 圖 以 形 成 源 極 (及源極配線) 7 , 汲極8及 做 為 點 缺 陷修 注 意 1 I 事 1 復 模 圖 的 橋 部 13 0 其 次 將 源 極 及 汲 極之 間 的 η - a - Si 以 蝕刻 項 再 1 去 除 0 最 後 因 應 需 要 以 Si H等形成保護膜。 寫 ▲ - 頁 1 於 如 上 述 作 成 的 TFT陣列及使用該陣列作成的液晶顯 1 I 示 裝 置 對 於 認 為 點 缺 陷 的 畫 素 > 將 其含 於 盖 素 之 電 晶 體以 1 1 雷 射 光 如 圖 9之C -C 線 切 斷 1 其 後 照 射雷 射 光 於 盡 素 電 極上 1 I 之 D部( 在 橋 部 13 的 部 分 中 於 橋 部 下 層配 置 島 部 12 的 部 分) 訂 1 及 鄰 接 壷 素 之 畫 素 電 極 上 之 同 樣 的 D部將閘極絶緣膜熔融, 1 1 介 由 修 復 模 圖 之 橋 部 將 前 述 認 為 點 缺陷 的 盖 素 之 畫 素 電極 1 I 與 鄰 接 之 畫 素 的 奎 素 電 極 短 路 0 1 惠 菁 旃 例 1 I 圖 1 2 表 示 本 發 明 之 實 施 例 6 〇 圖12之構造除了其閘極 1 1 2與畫素電極3 的 製 造 X 程 之 順 序 更 換以 外 與 實 施 例 5的構 1 1 造 相 同 〇 亦 即 於 奎 素 電 極 3上形成島部電極1 2 〇 1 Ί W 旃 例 7 I | 圖 13 至 圖 15表 示 本 發 明 之 實 施 例7 〇 圖1 3表示本發明 1 I 之 顯 示 装 置 使 用 的 TFT陣列之部分平面圖, 圖1 4為圖1 3之 1 1 I A - A斷面圖。 圖1 5為圖1 3之B -B m 面 圖。 首 先 於 洗 淨 的 玻璃 1 1 | 基 板 1以噴鍍法等的方法形成膜厚300πβ 程 度 之 鉻 t 鉅 ,鈦 1 1 15 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210X 297公釐) 38 183 A7 ^ϋΰυ^ί五、發明説明(16 ) ,鎢,鉬,鋁等的高融點金屬之薄膜,然後以照像蝕刻法 等的方法形成模圖以形成閘極(及閘極配線)2 ,然後於其 後形成之點缺陷修復模圖之橋部連接的位置形成模圖12當 作島部。其次以噴鍍法等的方法形成膜厚lOOnm程度之ITO (洇錫氣化物)等的透明導電膜。為得到做為液晶顯示裝置 以 極 lyml 質 ο 素 15耋 為成 大形 最以 成圖 做模 厚成 膜形 該法 度方 亮的 的等 求法 要刻 所蝕 像 照 以 後 然 Ο 下 漿 以 次 其 厚 膜 之 4 膜 緣 絶 極 閘 為 做 成 形 各 等 法 法 積 澱 相 氣 學 化 或 N S 的 度 程 0 η 膜 之 5 層 體 導 半 為 做 膜 緣 絶 的 等 2 (請先閱讀背面之注意事項再填寫本頁) 厚 的on 度20 程厚 nm膜 00之 或 或 N «1 S 的 度 程 膜 止 停 刻 蝕 為 做 及 以 照 以 次 其 0 膜 緣 絶 的 圖 模 成 形 膜 止 停 刻0 將 法CV 方漿 的電 等以 法次 刻其 蝕 像 厚 膜 之 層 觸 接 性 阻 電 為 做 成 形 等 法 膜法 成方 形的 法等 方法 的鍍 等噴 法以 刻次 蝕其 像 〇 照91 以 孔 後觸 然接 , 成 等形 S1上 a-極 _ η 質 的素 度畫 程於 nm以 50圖 鋁 的 度 程 a η ο ο 4 厚 膜 成 形 極 源 成 形 以 圖 楔 成 形 法 方 的 等 法 刻0 像汲 照 , 以)7 後線 然配 , 極 膜源 薄及 屬 ί 金 之 等 鉻 訂 _竣_. 經濟部中央標準局員工消費合作社印製 做 Γ 及>η 8 之 極間 部 橋 的 圖 模 復 修 陷 缺 點 為 的 要 不 之 部 素 i 3 於 及 a 極 汲 與 極 源 將 次 其 或 去 刻 蝕 用 置 装 示 顯 晶 液 之 ο 列 膜陣 護該 保 用 成使 形及 等列 H il «1 ΐϋυ S τ 以TF 要的 必成 於作 應述 後上 最如 ο 除 晶 B tpBT 之 素 ί 3 於 含 將 光 射 雷 以 素 i 簦 的 陷 缺 點 為 認 所 其 於 對 後 其 斷 切 線 C- C 之 3 1X 圖 依 體 部 島 置 配 層 下 部 橋 在 中 分 部 之 3 11 部 橋 /IV 部 之鄰 上及 極丨 電 素 i 3 射 照 光 射 雷 以 分 部 的 本紙張尺度適用中國國家標隼(CNS ) Λ4規格(210X 297公釐) 16 38 183 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明(I?) 接之畫素的畫素電極上同樣的D部將閘極絶緣膜熔融,介 由修復模圖之橋部將前述認為點缺陷的畫素之畫素電極與 鄰接之畫素的畫素電極短路。 啻旃例8 圖16表示本發明之實施例8。圖16之構造除其閘極2與 畫素電極3的製造工程之順序更換以外與實施例7的構造相 同。亦即為在畫素電極3上形成島部電極12。 依本發明可以容易的修復點缺陷,改善TFT陣列及使 用該陣列之液晶顯示裝置的製造時之成品率。又依本發明 於製造途中發現的TFT陣列階段容易修復點缺陷自不待言, 對於成為液晶顯示装置後發現的點缺陷,亦即於修復之際 必需將雷射光由畫素電極側射入時,亦可容易並確實的實 行修後。 又其製造工程與習用方法完全相同,僅為變更模圖, 不增加工程而不提高成本。 審施例9 圔17表示本發明之實施例9。圖17表示用於本發明之 顯示装置的TFT陣列之部分平面圖,圖18為圖17的A-A斷面 圖,圖19為匾17的B-B斷面圖。圖中111為與積蓄電容電極 21同材料同時形成之第1金屬模圖的點缺陷修復模圖,12 為與閘極及閘極配線2同材料同時形成的第2金屬模圖之島 部,島部12為接於耋素電極3之下形成。又圖中C-C及D為 修復點缺陷時照射雷射處所。 其次説明本實施例之TFT陣列的製造方法。首先將洗 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210X297公釐) 38 183 (請先閱讀背面之注意事項再填寫本頁) μ衣. 訂 A 7 B7 經濟部中央標準局員工消費合作社印製 五、 發明説明 (18 ) Ί I 淨 的 玻 璃 基 板 1以噴鍍法等的方法形成 鉻, 鉅 » 鈦等的金 «Μ | I 屬 薄 膜 $ 妖 後 以 昭 像 蝕 刻法等 的方 法形成模圖以形成積 蓄 1 1 I 電 容 電 極 21 及 點 缺 陷 修 復模圓 1 1 1 〇 其 次以 電 漿 CVD法等 形 1 I 請 I 成 積 蓄 電 容 的 電 介 質 膜 31之 S i N或S 1 0 2 等的 薄 膜 ,以模圖 先 閱 1 I 讀 1 I 形 成 與 其 後 形 成 之 閘 極 及閘極 配線 2接 觸的 接 AJS 胸 孔。其次 背 1 I 之 1 I 以 噴 鍍 法 等 的 方 法 形 成 膜厚300nm程度 之鉻 > 鉅 ,鈦等高 注 意 1 I 事 1 融 點 金 屬 薄 膜 9 將 其 以 照像蝕 刻法 等的方法形成模圖以 形 項 再 1 填 Λ 成 閘 極 • 配 線 2及與點缺陷修復楔圖11 1接觸部分形成島 部 寫 本 百 A 1 1 2 0 亦 即 於 修 復 點 缺 陷 時照射 雷射 處所D , 為 在 點缺陷修 貝 1 1 I 復 模 圖 11 1上介著積蓄電容之電介質31 形成 島 部 1 2 〇 I 1 其 次 以 噴 鍍 等 的 方 法形成 膜厚 100 n in程 度 之 ΙΤ0 (銦錫 1 1 氣 化 物 )等的透明導電膜,然後將其以 照像 独 刻 法等的方 訂 1 法 形 成 模 圖 以 形 成 畫 素 電極3。 其次以 電漿 C V D法等形成 做 1 1 為 閘 極 絶 緣 膜 4之膜厚300nm程 度的 S i N 或S i 0 2 等 之絶線膜, 1 1 做 為 半 導 體 層 5之膜厚200nm程 度的 i - a -S i 或 P 〇 1 y-Si 等, 1 以 及 做 為 電 阻 性 接 觸 層 6之膜厚50η m程 度的 η - a - S i等。其 ! I 次 以 照 像 蝕 刻 法 等 的 方 法將η- a - S i 及ί -a - S i形成線狀或 島 1 1 狀 的 楔 圖 0 然 後 以 照 像 蝕刻法 等的 方法形成模圖以於畫 素 1 1 電 極 3上形成-接觸孔。 其次以噴鍍法形 成膜 厚 400nm程度 的 1 1 鋁 t 鉻 等 之 金 屬 薄 膜 » 將其以 照像 蝕刻法形成模圖以形 成 1 I 源 極 • 配 線 7及汲極8後 ,將源 極· 汲極間之η -a -S ί由蝕 刻 1 I 去 除 0 最 後 應 於 必 要 以 S i Ν等形成保護 膜。 1 I 於 如 上 述 作 成 的 TFT陣列及使用該 陣列 之 液 晶顯不裝 1 1 1 置 t 對 於 認 為 點 缺 陷 的 畫素, 為將 其盡素之電晶體部以 雷 1 1 本紙張尺度適用中國國家標羋(CNS ) Λ4規格(210X 297公釐) 18 38183 經濟部中央標準局員工消費合作社印製 A7 B7 五、發明説明(19 ) 射光依圖1 7所示C - C線切斷,其後於畫素電極3上之D部及 鄰接盡素之盖素電極3上之D部以雷射光照射,介以點缺陷 修復楔圖111將鄰接奎素之奎素電極短路。此時因偽將介 存積蓄電容之電介質31的二金屬膜,即點缺陷修復模圖 111及島部12以雷射連接,可以容易並且確實予以修復。 尤其由畫素電極3側照射雷射時為有效。又於本實施例為 以連接左右畫素電極的構成,然亦可做為連接上下之畫素 電極的構成。 依本實施例,為利用點缺陷修復模圖111將認為點缺 陷的畫素與鄰接的畫素短路,因此其相鄰接的畫素電極成 為同電位,做相同的顯示而不易認為偽點缺陷,由此提高 TFT陣列的成品率。又因其為與習用技術以同樣製造方法 而僅變更其模圖,不增加工程數而具不增加成本的優點。 又依本發明,對於TFT陣列階段發現之點缺陷的修復 自不待言,對於成為具有該TFT陣列基板與透明電極及色 濾器等之對向電極基板之間挟持液晶的液晶顯示裝置之後 ,亦即為由畫素電極側射入雷射光的狀態,亦可容易並且 確實的予以修復。 窨旃例1 0 圖20表示本發明之實施例10的用於顯示裝置之TFT陣 列的部分斷面圖。本實施例10除了將閘極•配線2與畫素 電極3之製造工程的順序更換以外與實施例9的構造相同。 即為於點缺陷修復模圖111上介以積蓄電容之電介質31形 成畫素電極;3,在其上形成島部12。如上述其島部12可以 本纸張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) 。。t。。 ---------尽------ΐτ------f (請先閲讀背面之注意事項再填寫本頁) A7 B7 經濟部中央標準局員工消f合作社印製 五、 發明説明 (2 0 ) :丨 I 為 形 成 在 上 或 下 的 構 造 均 可 利 用點缺陷修復模圖1 1 1容易 •m ] 1 的 修 復 點 缺 陷 * 得 到 與 實 施 例 9同樣 的 效 果 0 1 1 S. 旅 例 1 1 1 I 請 1 I 以 下 參 照 圖 面 説 明 本 發 明 之實施例1 1 〇 圖21表示本發 先 閱 1 I 讀 1 I 明 之 液 晶 顯 示 装 置 使 用 的 TFT陣列之 部 分 平 面圖 9 圖22為 背 1 I 之 1 圖 2 1 之 A- A斷面圖, 圖23為圖2 1之Β - Β斷面圖。圖中131為 注 意 1 事 1 独 刻 停 止 膜 〇 項 再 1 4 J 其 次 說 明 本 實 施 例 之 TFT陣列的 製 造 方 法。 首 先以噴 本 | 鍍 法 等 的 方 法 於 洗 淨 的 玻 璃 基 板1形 成 鉻 > 鉅, 鈦 等的金 貝 1 1 I 屬 薄 膜 > 然 後 將 其 以 照 像 蝕 刻 法等的方法形成模圖以形成 1 1 積 蓄 電 容 電 極 2 1 及 點 缺 陷 修 復 模圖1 11 0 其 次以 電 漿CVD法 1 1 等 形 成 做 為 積 蓄 電 容 之 誘 電 體 膜31的S i N或 S i 〇2 等 的薄膜, 訂 1 然 後 形 成 與 其 後 形 成 之 閘 極 ♦ 配線接觸的接觸孔之模圖。 1 1 其 次 以 噴 鍍 法 等 的 方 法 形 成 膜 厚300 n m 程 度 的鉻 f 钽,鈦 1 I 等 之 高 融 點 金 饜 薄 膜 妖 後 將 其以照像蝕刻法等的方法形 1 成 模 圖 以 形 成 閘 極 ♦ 配 線 2 , 並在與 點 缺 陷 修復 模 圖1 1 1的 1 | 接 觸 部 分 形 成 島 部 12 0 亦 即 於 修復點缺陷時照射雷射的處 1 1 所 為 於 點 缺 陷 修 復 模 圖 11 1上介以積 蓄 電 容 的電 介 質31形 1 ! 成 島 部 12 0 - 1 1 其 次 以 噴 鍍 等 的 方 法 形 成 膜厚1 00 n m 程 度之 ΙΤ0 (銦錫 1 1 氣 化 物 )等的透明導電膜。 為得到做 為 液 晶 顯示 裝 置所要 1 I 求 的 亮 度 • 該 膜 厚 最 大 為 150η η 〇然 後 將 其 以照 像 蝕刻法 1 I I 等 的 方 法 形 成 模 圖 以 形 成 畫 素 電極3 0 其 次 以電 漿 CVD法等 1 1 1 形 成 做 為 閘 極 緣 膜 4之膜厚3 00 n m程度的S ί N或 Si 〇2等的 1 1 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210X 297公釐) 38 183 20 A7 B7 經濟部中央標準局員工消費合作社印製 五、 發明説明 (2 1 ) I 絶 綠 膜 » 做 為 半 導 體 層 5之 膜厚 1 00η π程度的丨-a -S ί或 | Po 1 y -S ί等的薄膜, 以及做 為蝕 刻 停 止 膜 1 3 1之膜厚20 0 n m 1 1 I 程 度 的 Si N或S i 0 2等的絶緣 膜0 其 次 以 照 像 蝕刻 法等的方 ^-Ν 1 I 請 1 I 法 形 成 蝕 刻 停 止 膜 1 3 1之模 圖。 接 著 以 電 漿 C VD法等形成做 先 閱 1 I 讀 1 | 為 電 阻 性 接 觸 層 6之膜厚50 n m程 度 的 η - a - S i 等, 然後以照 背 ιδ 1 | 之 1 像 蝕 刻 法 等 的 方 法 形 成 模圖以於盡素電極3上形 成接觸孔 意 1 事 1 〇 其 次 以 噴 鍍 法 等 形 成 膜厚400 n m 程 度 之 鋁 ,鉻 等的金靥 項 再 1 寧 薄 膜 t 將 其 以 照 像 蝕 刻 法等形成模圔以形成源極•配線7 頁 1 及 汲 極 8 〇 其次將源極 汲 極間 之 η - a - Si 及 在畫 素部之不 1 I 要 的 η - a - Si 或 i - a - Si 由 蝕刻去除。 最後因應需要以SiN等 1 1 形 成 保 護 膜 〇 ! 1 於 如 上 述 作 成 的 TFT陣 列及 用 該 陣 列 作 成的 液晶顯示 訂 1 裝 置 9 對 於 其 認 為 點 缺 陷的盡素, 將該畫素之電晶體部以 1 I 雷 射 光 依 圖 2 1 所 示 C - C線切 imr 斷, 其 後 對 於 畫 素電 極3上的D 1 I 部 及 鄰 接 畫 素 之 畫 素 電 極3上的 D部各以雷射光照射,而介 1 1 由 點 缺 陷 修 復 模 圖 11 1將郯 接之 畫 素 的 衋 素 電極 予以短路 1 1 0 如 上 述 構 造 之 TFT陣列 亦可 得 到 與 實 施 例9及實施例10 1 I ! 同 樣 的 效 果 0 - 1 1 奮 旃 例 12 1 I 1〇| 圖 24 表 示 本 發 明 之 實施例1 2的用於液晶顯示装置之 1 I TFT陣列的部分斷面圖。 本 實施 例 1 2除 了 閘 極2與畫素電極 1 1 I 3的製造工程的順序更換以 外, 為 與 實 施 例 1 1同 樣的構造 1 1 1 0 亦 即 為 於 點 缺 陷 修 復 模圖1 1 1 上 介 著 積 蓄 電容 之電介質 1 1 本纸張尺度適用中國國家標準(CNS ) Λ4規格(210X297公釐〉 38 183 2 1 A7 B7 五、發明説明(22 )膜3 1形成番素電極 於其上形成島部12。以上述構成亦 施 1L> J/ 缺 f 寶點-Ϊ 用 9 利例 可施 圖 模 復 修 陷 例 實 與 到 得 陷 缺 點 復 修 的 易。 容果 11效 tfL 的 樣 同 發 本 例 1 其 為 hBa 造 構 的 列 il st τ ρ τ 示 ο 所此 例於 施限 實不 述當 上造 又構 的 明 素 I 3 個 兩 之 接 鄰 於 複 S 3 射 照 射 雷 以 為 明 發 本 依 上 以 1 成 形 膜 緣 絶 之 等 膜 體 gml 誘 容 i Ι^ΠΓ 蓄 積 以 介 及 圖 ml/ 效 的 率 品 成 高 TF提 I I 之有 模模 陷具 屬屬® , 素置 第第畫裝 的在復示 金 2 該 用 使 及 板 基 第列 的陣 上FT 圖r 修顯 實晶 確液 並的 易板 容基 得列 可陣 而FT 融Γ 熔 圖 楔 屬 圖 容時 I 模 電同 罾#更 HIPS ! S 箩 與 靥 ! I僅 圔金 模同卩 屬相 。 & 程造 金以 1纟 工製 為 第」的易 各 其冑同容 ,S相而 二 S * 方㈤工成 造^造高 製f 製提 的m的不 & ίν & ΓΓ 模 明 W 用以 發 Ϊ 習得 金 本2i與此 依 第為因 X, — , 極成散 電形遮 (請先閱讀背面之注意事項再填寫本頁 ,-=5 經濟部中央標準局員工消費合作社印製 本纸張尺度適用中國國家標準(CNS ) Λ4規格(21〇Χ 297公釐) 22 38 183, 1T Μ! A7 B7 Ministry of Economic Affairs Central Standards Bureau staff consumer cooperation Du printed five, invention description; 15): 丨 I etching method and other methods to form η-a-Si and 1-a-Si linear (or island Pattern) 〇I 1 | Next, the pattern is formed by a method such as the etching method of the image to form the zigzag electrode ^ —v 1 I Please | Form the contact hole 9 1 0 Next, the film is formed by the method such as the sputtering method 400 η m thick first read II it 1 I degree of aluminum> chromium and other gold film> then use the method of photo engraving and so on to form the back 1 of 1 I pattern to form the source (and source wiring ) 7, Drain 8 and attention as a point defect repair 1 I matter 1 Bridge part of the complex pattern 13 0 Secondly, the η-a-Si between the source and the drain is etched and then 1 is removed 0 Finally, as needed A protective film is formed with Si H or the like. Write ▲-Page 1 In the TFT array made as described above and the liquid crystal display using the array 1 I display device For pixels that are considered to be point defects> The transistor contained in the cover element is 1 1 laser light as shown in Figure 9 The C-C line is cut 1 and then the laser light is irradiated on the element electrode 1 D part of the I (the part where the island 12 is arranged in the lower part of the bridge in the part of the bridge 13) Order 1 and the picture of the adjacent pixel The same D part on the pixel electrode melts the gate insulating film, 1 1 short-circuits the pixel electrode 1 of the cape which is considered to be a point defect and the quino electrode of the adjacent pixel via the bridge part of the repair pattern 0 1 Hui Jing Example 1 I FIG. 1 2 shows the embodiment 6 of the present invention. The structure of FIG. 12 is the same as the structure of the embodiment 5 except that the gate 1 1 2 and the pixel electrode 3 are replaced in the order of manufacturing X process. Make the same. That is, form on the quino electrode 3 Island electrode 1 2 〇1 Ί W Example 7 I | FIGS. 13 to 15 show the embodiment 7 of the present invention. FIG. 13 shows a partial plan view of the TFT array used in the display device of the present invention 1 I, FIG. 14 is Figure 1 3-1 1 IA-A cross-sectional view. Fig. 15 is the B-B m plane view of Fig. 13. First, on the cleaned glass 1 1 | the substrate 1 is formed by a method such as spray coating, chromium t giant with a film thickness of about 300πβ, titanium 1 1 15 This paper scale is applicable to the Chinese National Standard (CNS) Λ4 specification (210X 297 mm) 38 183 A7 ^ ϋΰυ ^ ί 5. Description of the invention (16), thin films of high melting point metals such as tungsten, molybdenum, aluminum, etc., and then the pattern is formed by photo etching etc. to form gates (and gate wiring ) 2, and then form the figure 12 as the island part at the position where the bridge part of the point defect repair figure formed later is connected. Next, a transparent conductive film such as ITO (flux tin oxide) having a film thickness of about 100 nm is formed by a method such as a sputtering method. In order to obtain a liquid crystal display device with extremely lyml quality ο element 15% into a large shape, the most is to make a mold thickness into a film shape, the method of squareness is bright, and the method of etching the etched image should be engraved. The thick film of the 4th film edge barrier gate is used for forming various methods of deposition phase gasification or NS range 0 η 5 layer of the film is half for the film insulation 2 (please read the back side first (Notes to fill out this page) Thick on degree 20-thick nm film 00 or N «1 S degree film stop etching is used as follows and the film is formed according to the next 0 film edge. Stop engraving 0. Use the method of etching the CV paste to etch it like a thick film. The contact resistance of the layer is to form a square film. Like 〇Photo 91, touched behind the hole, forming an isomorphic S1 a-pole _ η quality of the basic drawing range in nm with 50 figure aluminum range a η ο ο 4 thick-film forming electrode source shape to figure wedges The method of forming a French method engraves 0 like drawing, (7) After the line is equipped, the thin film source and the chrome of the gold are _complete_. Printed by the Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs to make a picture of the bridge between the poles of Γ and η 8 The disadvantages of the trapping are that the element i 3 and the pole source and the source will be used next or for etching. The display array will be used to display the crystal liquid. il «1 Ιϋυ S τ is based on the TF must be the most appropriate after the description ο except the crystal B tpBT element ί 3 Yu contains the light beam to the defect of the element i 簦 to be recognized as the opposite Broken tangent line C-C 3 1X Figure According to the island of the body part, the lower bridge is located on the 3 11 part of the middle part / the adjacent part of the IV and the pole. The standard is applicable to China National Standard Falcon (CNS) Λ4 specification (210X 297mm) 16 38 183 Printed A7 B7 by Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs V. Invention description (I?) The same on the pixel electrode connected to the pixel Part D melts the gate insulating film through the repair model The portion that the pixel electrode and the pixel electrode short-circuiting of adjacent pixels of the pixel of point defects. Example 8 Figure 16 shows Example 8 of the present invention. The structure of FIG. 16 is the same as that of Embodiment 7 except that the order of the manufacturing process of the gate electrode 2 and the pixel electrode 3 is replaced. That is, the island electrode 12 is formed on the pixel electrode 3. According to the present invention, point defects can be easily repaired, and the yield of the TFT array and the liquid crystal display device using the array during manufacturing can be improved. According to the invention, it is easy to repair point defects at the TFT array stage found during the manufacturing process. For the point defects found after becoming a liquid crystal display device, that is, when laser light must be incident from the pixel electrode side during repair, It can also be easily and surely repaired. In addition, the manufacturing process is exactly the same as the conventional method, only the model drawing is changed, and the project is not increased without increasing the cost. Examination Example 9 Fig. 17 shows Example 9 of the present invention. Fig. 17 shows a partial plan view of a TFT array used in the display device of the present invention, Fig. 18 is an A-A sectional view of Fig. 17, and Fig. 19 is a B-B sectional view of a plaque 17. In the figure, 111 is a point defect repair pattern of the first metal pattern formed simultaneously with the same material of the storage capacitor electrode 21, and 12 is an island portion of the second metal pattern formed simultaneously with the same material of the gate electrode and the gate wiring 2. The island portion 12 is formed under the zipper electrode 3. In the figure, C-C and D are the laser irradiation locations when repairing point defects. Next, the method of manufacturing the TFT array of this embodiment will be described. First of all, the size of the washable paper is applicable to the Chinese National Standard (CNS) Λ4 specification (210X297 mm) 38 183 (please read the precautions on the back and then fill out this page) μ clothes. Order A 7 B7 Employee Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs Printed 5. Description of the invention (18) Ί I clean glass substrate 1 is formed by a method such as sputtering, chromium, giant »titanium and other gold« Μ | I is a thin film $ demon is formed by a method such as etching method The pattern is formed to form a storage 1 1 I capacitor electrode 21 and a point defect repair mold circle 1 1 1 〇 followed by plasma CVD method to form a shape 1 I please I form the storage capacitor dielectric film 31 S i N or S 1 0 2 etc. For the film, first read 1 I, read 1 I to form the AJS chest hole which is in contact with the gate and gate wiring 2 formed later. Secondly, 1 I to 1 I are formed by sputtering or other methods to form chromium with a thickness of about 300 nm> Ju, Titan, etc. Note 1 I matter 1 Melting-point metal thin film 9 This is formed into a mold by a photo etching method, etc. The figure is filled with Λ to form a gate. Wiring 2 and the wedge for repairing the point defect. Figure 11 The contact part forms the island copy 100 A 1 1 2 0, which means that the laser space D is irradiated when the point defect is repaired. Point defect repairing 1 1 I Duplexing Figure 11 1 Forming an island portion 1 2 through a dielectric 31 of a storage capacitor. Next, ITO (indium tin 1 1 gas) with a film thickness of about 100 n in is formed by sputtering or the like. A transparent conductive film, etc., which is then patterned to form a pixel electrode 3 by a method such as photolithography. Secondly, a plasma CVD method or the like is used to form an insulating film such as Si N or Si 0 2 with a thickness of 1 nm as the gate insulating film 4 of about 300 nm, and a thickness of about 200 nm as the semiconductor layer 5 of 1 1. i-a -S i or P 〇1 y-Si etc., 1 and η-a -S i etc. as the film thickness of the resistive contact layer 6 are about 50 η m. Which! I times η- a-S i and ί -a-S i are formed into a linear or island 1 1 wedge pattern 0 by a photo etching method, etc. Then a pattern is formed by a photo etching method etc. In this way, a contact hole is formed on the pixel 1 1 electrode 3. Next, a metal thin film such as 1 1 aluminum t chromium with a thickness of about 400 nm is formed by a sputtering method. It is formed into a pattern by photo etching to form a 1 I source electrode. After wiring 7 and drain electrode 8, the source electrode is formed. Η -a -S ί between the drains is removed by etching 1 I 0 and finally a protective film should be formed with S i N and so on as necessary. 1 I In the TFT array made as described above and the liquid crystal display using the array is not installed 1 1 1 Set t For pixels that are considered to be a point defect, the pixel part of the transistor is to be used as the best 1 1 This paper size is suitable for China Standard (CNS) Λ4 specification (210X 297 mm) 18 38183 Printed by the Consumer Standardization Bureau of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the invention (19) The light is cut off according to the C-C line shown in Figure 17 and then The D part on the pixel electrode 3 and the D part on the cape electrode 3 adjacent to all pixels are irradiated with laser light, and the quine electrode adjacent to the quinoline is short-circuited through the point defect repair wedge pattern 111. At this time, since the two-metal film of the dielectric 31 storing the storage capacitor, that is, the point defect repair pattern 111 and the island portion 12 are connected by laser, it can be easily and surely repaired. This is particularly effective when laser light is irradiated from the pixel electrode 3 side. In this embodiment, the configuration is to connect the left and right pixel electrodes, but it can also be used to connect the upper and lower pixel electrodes. According to this embodiment, in order to use the dot defect repair pattern 111 to short-circuit the pixel that is considered to be a dot defect to the adjacent pixel, the adjacent pixel electrode becomes the same potential, and the same display is made and it is not easy to think of a pseudo-dot defect , Thereby improving the yield of the TFT array. And because it is the same manufacturing method as the conventional technology, it only has to change its mold drawing, without increasing the number of projects and has the advantage of not increasing the cost. According to the present invention, the repair of the point defects found in the TFT array stage is self-evident. After the liquid crystal display device with the liquid crystal held between the TFT array substrate and the counter electrode substrate such as the transparent electrode and the color filter, that is The laser light incident from the pixel electrode side can also be repaired easily and surely. Example 1 0 FIG. 20 shows a partial cross-sectional view of a TFT array used in a display device according to Example 10 of the present invention. This embodiment 10 has the same structure as the embodiment 9 except that the order of the manufacturing processes of the gate and wiring 2 and the pixel electrode 3 is replaced. That is, a pixel electrode is formed on the point defect repairing pattern 111 by a dielectric 31 with a storage capacitor; 3, an island 12 is formed thereon. As mentioned above, the island section 12 can be applied to the Chinese National Standard (CNS) A4 specification (210X 297 mm) on this paper scale. . t. . --------- Full ------ lsτ ------ f (Please read the precautions on the back before filling out this page) A7 B7 Printed by the Employees ’Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs V. Description of the invention (2 0): I can use point defect repair molds for structures formed above or below. Figure 1 1 1 Easy • m] 1 Repair point defects * Obtain the same effect as Example 9 0 1 1 S. Travel example 1 1 1 I Please 1 I The following describes the embodiment 1 of the present invention with reference to the drawings. FIG. 21 shows a partial plan view of the TFT array used in the liquid crystal display device of the first reading 1 I reading 1 I. 22 is a cross-sectional view of A-A of FIG. 21, and FIG. 23 is a cross-sectional view of B-B of FIG. 21. In the figure, 131 shows one thing, one stop film alone, and then 14 J. Next, the manufacturing method of the TFT array of this embodiment will be described. First, chromium > gold shell 1 1 I thin film of giant titanium, titanium, etc. is formed on the cleaned glass substrate 1 by a spray plating method, etc., and then a pattern is formed by a method such as photo etching. Forming 1 1 storage capacitor electrode 2 1 and point defect repair pattern 1 1 1 0 Next, a plasma CVD method 1 1 or the like is used to form a thin film such as S i N or S i 〇2 that serves as an accumulator film 31 for the storage capacitor. 1 Then form a pattern of the contact hole with the gate formed later. 1 1 Next, chromium f tantalum with a thickness of 300 nm and titanium 1 I and other high melting point gold films are formed by spraying and other methods, and then they are formed by photo etching etc. 1 Forming the gate ♦ Wiring 2 and forming the island part 12 in the contact part with the point defect repair pattern 1 1 1 1 in FIG. 1 1 1. That is, the point where the laser is irradiated while repairing the point defect 1 1 is the point defect repair pattern 11 1. A dielectric 31 with a storage capacitor is formed. The island-forming part 12 0-1 1 Next, a transparent conductive film such as ITO (indium tin 1 1 vapor) with a film thickness of about 100 nm is formed by sputtering or the like. In order to obtain the brightness required for 1 I as a liquid crystal display device • The film thickness is at most 150 η η 〇 Then it is patterned by a photo etching method 1 II or the like to form a pixel electrode 3 0 followed by plasma CVD Method 1 1 1 Formed as the gate film 4 with a thickness of 300 nm, such as S ί N or Si 〇 2 etc. 1 1 The paper size is applicable to the Chinese National Standard (CNS) Λ 4 specifications (210X 297 mm) 38 183 20 A7 B7 Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of the invention (2 1) I Green film »As a semiconductor layer 5 with a film thickness of 1 00η π, 丨 -a -S ί or | Po 1 y -S ί thin film, etc., and an etch stop film 1 3 1 with a thickness of 20 0 nm 1 1 I I degree of Si N or S i 0 2 and other insulating film 0 Secondly by the photo etching method, etc. ^ -Ν 1 I Please use 1 I method to form the etch stop film 1 3 1 pattern. Then, the plasma C VD method is used to form the first reading 1 I reading 1 | η-a-S i of the resistive contact layer 6 with a film thickness of about 50 nm, and then using the photo etching method ιδ 1 | 1 Use a method such as to form a pattern to form contact holes on the electrode 3. A matter 1 〇 Secondly, a metal film with a thickness of about 400 nm such as aluminum and chromium is formed by a sputtering method, etc., and then a thin film t is used. Photolithography etc. to form a pattern to form the source • Wiring 7 Page 1 and Drain 8 〇 Secondly, the source and drain between the η-a-Si and the pixel part of the I η-a- Si or i-a-Si is removed by etching. Finally, if necessary, a protective film is formed with SiN or the like 1 1! 1 The TFT array prepared as described above and the liquid crystal display device made using the array are ordered. 1 Device 9 For the pixel defects that it considers to be, the transistor part of the pixel 1 I laser light is cut off according to the C-C line shown in FIG. 2 1, and then each of the D 1 I portion on the pixel electrode 3 and the D portion on the pixel electrode 3 adjacent to the pixel are irradiated with laser light , And 1 1 from the point defect repair mode Figure 11 1 short circuit of the pixel electrode of the tethered pixel 1 1 0 TFT array structure as above can also be obtained as in Example 9 and Example 10 1 I! Effect 0-1 1 Example 12 1 I 1〇 | FIG. 24 shows a partial cross-sectional view of a 1 I TFT array for a liquid crystal display device according to Example 12 of the present invention. This embodiment 12 has the same structure as the embodiment 1 1 except that the gate electrode 2 and the pixel electrode 1 1 I 3 are replaced in the order of manufacturing processes. 1 1 1 0 is also a point defect repair mold. FIG. 1 1 1 Dielectric with a storage capacitor 1 1 This paper scale is applicable to the Chinese National Standard (CNS) Λ4 specification (210X297mm) 38 183 2 1 A7 B7 5. Invention description (22) Membrane 3 1 Form a fan electrode on it Form an island 12. With the above configuration, 1L is also available. J / Defective point-Ϊ It can be easily repaired by using 9 advantages, and it is easy to repair the defects. Rongguo 11 effect tfL sample Simultaneously, this example 1 shows the column il st τ ρ τ constructed by hBa. This example is not limited by the actual construction. The lemmas I constructed and constructed are three adjacent to the complex S 3. I thought that the Mingfa book is based on the formation of a film with a marginal equivalent to the body of the film gml induced capacity i Ι ^ ΠΓ accumulates the rate of the ml / effect of the product into a high TF and II. In the second picture set, it is necessary to use The FT graph r on the array of the base of the substrate shows the solid crystal and the liquid is easy to contain the matrix and the array can be arrayed while the FT melting Γ melting graph is a figure of content. I 模 电 同 罾 # More HIPS! ! I only have gold molds that are in the same phase. &Amp; Cheng Zuojin's Yi Geqi has the same content, S phase and two S * Fang (manufacturing) ^ manufacturing high system f m's & ίν & ΓΓ model Ming W is used to send Ϊ learned gold book 2i and according to the reason X, —, extremely dissipative shape cover (please read the precautions on the back before filling this page,- = 5 The size of the paper printed by the Staff Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs is applicable to the Chinese National Standard (CNS) Λ4 specification (21〇297 mm) 22 38 183

Claims (1)

AS B8 C8 D8 六、申請專利範圍 1. 一種薄膜電晶體(TFT)陣列基板,為具備由形成在透明 線與配膜 配 ,極電 極層源導 閘體之明 之導極透 極半源之 閘的為近 為設兼附 兼所的件 的 膜件元 成緣元體 形絶體導 所極導半 膜閘半述 薄介成上 颶經構於 金上起設 之線一由 上配層 , 板極體極 基閘導汲 緣該半及 絶在該線 料 材 屬 金 的 同 相 線 配 極 0 述之 上置 與配 以素 , 畫 極 二 Be 素接 畫鄰 的於 成跨 形重第 述配 上極 在源 及與 以之 , 置 圖配 模膜 屬緣 金絶 1I& 極 閘 述 上 以 介 中 上 圖 模 羼 金 模 颶 3 金 由 2 而第 , 述 圖上 模與 屬圖 金模 2屬 了 之 1 料第 材述 羼上 金於 的光 同射 Jd 梦3 f 脅B 極射 汲照 及 線 行 實 而 間 極 素 ί 養 個 兩 之 接 鄰 接 3 以 接 I- 遶 融 熔 其 將 圖 其金 , 之 板等 基鈦 列或 陣鉅 體 , 晶絡 電以 膜偽 薄圖 。的模 者 激 I記金 持 I 1 項 其 1 第 為第及 復圍線 修範配 之利極 素專閘 畫請述 陷申前 缺如中 2 其其 , 為 板成 基形 列屬 陣金 體之 晶 等 1Ε 百 5® 0 膜或 薄鉻 的 , 載鋁 記以 項偽 。1圖 者第 I 模 擻圍 屬 其利 2 為專第 成請述 形申前 屬如中 3 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 其為 , 成 板形 基下 列或 陣上 體之 晶 極 BegBt 膜素 薄蛋 的於 載接 記以 項係 1圖 第 — 3 模 圍 屬 範 Ji金 和 2 。 專第 者請述 激申前 待如中 製 之 列 下 括 包 法 方 造 製 之 板 基 列 I 阔 體 晶 E o IplT 者膜 擻薄 待種 其一 5 程 等 鈦 或 鉅 鉻 成 形 等 法 鍍 噴 以 上 板 基 緣 绝 明 透 於 本紙張尺度適用中國國家標準(CNS〉Α4規格(210Χ297公釐) 38183 A8 B8 C8 D8 經濟部中央標隼局員工消費合作社印製 六、申請專利範 圍 I 的 金 屬 薄 膜 9 然 後 以 照 像 蝕 刻 法 等 的 方 法 形 成 楔 圖 以 1 1 I 形 成 閛 極 » 閘 極 配 線 及 重 跨 郯 接 之 二 耋 素 的 第 1金屬模 1 1 I 圖 之 製 程 1 I 請 1 I 以 電 漿 C V D (化 學 氣 相 澱 積 )法等依次形成閘極絶綠 先 閲 1 I 1 1 膜 » 半 導 體 層 及 電 阻 性 接 觸 層 » 然 後 將 其 形 成 模 圖 的 背 面 1 I 之 1 製 程 意 1 事 1 以 噴 鍍 法 等 的 方 法 形 成 透 明 導 電 膜 » 然 後 形 成 模 項 再 1 填 圖 以 形 成 畫 素 電 極 的 裂 程 寫 本 笨 頁 1 以 噴 鍍 法 等 形 成 鋁 1 鉻 或 鉬 等 的 金 屬 薄 膜 » 然 後 1 形 成 模 圖 以 形 成 源 極 與 源 極 配 線 $ 汲 極 及 於 上 述 第1 1 1 金 靨 模 圖 上 至 少 為 介 以 上 述 閘 極 絶 緣 膜 形 成 第 2金屬模 1 1 圖 的 製 程 以 及 訂 1 於 認 出 缺 陷 的 亶 素 時 t 以 雷 射 照 射 將 該 畫 素 的 訊 1 | 號 電 路 切 離 i 然 後 將 上 述 第 1金羼模圖與上述第2金 屬 1 I 模 圖 熔 融 以 連 接 鄰 接 的 兩 個 盡 素 電 極 間 而 實 行 對 缺 陷 1 1 —N.. 室 素 修 復 之 製 程 1 為 其 特 徽 者 0 1 1 6 . — 種 薄 膜 電 晶 體 陣 列 基 板 9 為 具 備 由 形 成 在 透 明 絶 緣 1 1 基 板 上 之 金 羼 薄 膜 所 形 成 的 兼 為 閘 極 之 閘 極 配 線 * 在 1 I 該 閛 極 配 線 上 中 介 閘 極 絶 綠 膜 所 設 的 半 導 體 層 » 與 該 1 I 半 導 體 層 一 起 構 成 半 導 體 元 件 的 兼 為 源 極 之 源 極 配 線 1 1 I 及 汲 極 1 由 設 於 上 述 半 導 體 元 件 附 近 之 透 明 導 電 膜 形 1 1 I 成 的 衋 素 電 極 « 由 形 成 在 上 述 透 明 絶 緣 基 板 上 之 金 屬 1 1 薄 膜 形 成 積 蓄 電 容 電 極 » 設 於 該 積 蓄 電 容 電 極 上 的 積 1 1 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 2 4 3 8 1 8 3 A8 B8 C8 D8 經濟部中央標準局員工消費合作社印製 六、 申請專利範圍 I 蓄 電 容 誘 電 體 膜 » 以與上述積蓄電容電極相同的金羼 I 材 料 而 重 跨 於 鄰 接 之兩値畫素配置的第1金 屬 模 圖, 以 1 1 I 及 在 該 第 1金羼模圖上 中 介 上 述 積 蓄 電 容 誘 電 體 膜等 之 1 I 請 先 閱 I 絶 綠 膜 配 置 的 第 2金靥 模 圖 t 而 由 1 I 讀 1 | 照 射 雷 射 光 於 上述第1金 屬 模 m 與 上 述 第 2金屬模 背 ιέ 1 I 之 1 画 將 其 熔 融 連 接 以 連接鄰接之兩値畫素電極間而實行 注 意 1 | 事 1 缺 陷 耋 素 之 修 復 為 其特擻者。 項 再 1 7 . 如 申 請 專 利 範 圍 第 6項 記 載 的 薄 膜 電 晶 體 陣 列 基 板, 其 寫 装 頁 1 中 前 述 閘 極 配 線 及 第1金 屬 模 圖 偽 以 鉻 » 鉅 或 鈦 等之 金 —^ 1 I 屬 形 成 為 其 特 擻 者 0 1 1 1 8 . 如 申 請 專 利 範 圍 第 6項 記 載 的 薄 膜 電 晶 體 陣 列 基 板, 其 1 1 中 刖 述 第 2金屬模圖以 鉻 9 鉅 或 鈦 等 之 金 靨 形 成 為其 特 訂 1 擻 者 0 1 1 9 . 如 申 請 專 利 範 圍 第 6項 記 載 的 薄 膜 電 晶 體 陣 列 基 板, 其 1 I 中 刖 述 第 2金屬模圖以 與 閘 極 配 線 相 同 的 金 屬 材 料形 成 1 i 為 其 特 歡 者 0 Γ 10 .如 請 專 利 範 圍 第 6項 記 載 的 薄 膜 電 晶 體 陣 列 基 板, 其 1 1 中 前 述 第 2金屬模画以 接 於 畫 素 電 極 之 上 或 下 形 成為 其 1 1 特 擻 者 0 1 1 11 ,一 種 液 晶 顯 示 裝 置 ,以申請專利範圍第1項 至 第 4項, 1 I 第 6項至第1 0項之任一 項 記 載 的 薄 膜 電 晶 體 陣 列 基板 與 1 I 具 有 透 明 電 極 與 色 過濾器之對向電極基板間配置液晶 1 1 I 為 其 特 歡 者 〇 1 1 12 ♦ 一 種 薄 膜 電 晶 體 陣 列基板之製造方法, 包括下列之製 1 1 本紙伕尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 25 38183 8 8 8 8 ABCD 經濟部中央標準局員工消費合作社印製 六、申請專利範圍 程: 於透明絶綠基板上以噴鍍法等形成鉻,鉅或鈦等 的金屬薄膜,然後以照像蝕刻法等的方法形成模圖以 形成積蓄電容電極及重跨鄰接之二畫素的第1金屬模圖 之製程; 以電漿C V D (化學氣相澱積)法等形成S i H , S ί 0 2等 的薄膜,然後將其形成模圖以形成積蓄電容電介質膜 的製程; 以噴鍍法等形成鉻,鉋或鈦等的金颶薄膜,然後 將其以照像蝕刻法等的方法形成模圖以形成閘極與閘 極配線,及於上述第1金屬模圖上至少中介上述積蓄電 容介質膜形成第2金屬模圖的製程; 以噴鍍等的方法形成透明導電膜,由形成模圖以 形成畫素電極的製程; 以電漿CVD法等依次形成閘極絶緣膜,半導體層及 電阻性接觸層,然後將其形成模圖的製程; 以噴鍍法等形成鋁,鉻等的金屬薄膜,然後由形 成模圖以形成源極與源極配線及汲極的製程;以及 於認出缺陷的畫素時,以雷射照射將該畫素的訊 號電路切離,然後將上述第1金屬模画與上述第2金屬 模圖熔融以連接郯接的兩値畫素電極間而實行對缺陷 畫素修復之製程; 為其等獻者。 1 3 . —種液晶顯示裝置,為以包含金屬薄膜形成的閘極與 2 6 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 38183 --------f 裝-- (請先閲讀背面之注意事項再填寫本頁) 、-a AS B8 C8 D8 六、申請專利範圍 閘極配線,閘極絶綠膜,半導體層,電阻性接觸層, 源極與源極配線及汲極的薄膜電晶體,以及由透明導 經濟部中央標準局員工消費合作社印製 電對成 ,置薄 前 前一 裝 方一 第 素素電 膜之形 部位屬 中 中任 示 造同 圍耋 蜜素 薄器以橋應金 其 其之 顯 。製以 範之一耋 的濾而的對成 , ,中 晶者的 , 利陷任之 上過,成的形 置 置鋁 液歡置時 專 缺將陷 板色置形層置 裝 裝或 的特装同 請點中缺 基及装膜下位 示 α 示鉬 載其示之 申有極點 緣極示薄部的 顯者顯 , 記為顯成 。於 含電有 絶電顯 屬橋層 晶 徽晶鎢 項極晶 形者係 將素含 明明晶金述下 液待液 ,15電液線戡 ,中畫述 透透液由前或 的其的鈦 第素的配特法其個前 於有的為於層 載為載 , 或畫載極其方 ,二復 設具晶並膜上 。記成記鉅14於記閘為復置之修 為與液極緣之者項形項 , ,接項與部修裝接以 極其持電絶極擻13屬14鉻13以13極島的示鄰位 電以挾素極電特第金第以 第部第閘述置 顯極電 。 素,間畫閘 素其圍 點圍偽 。圍 島圍述 前裝晶電同者 畫板之的述畫為範融範屬者範述範前成示液素為擻 的基板接前述 ,利高利金激利前利於形顯的畫一特 成列基鄰介前部專以專點特專中專中料 晶載該另其 形陣極於中於島請部請融其請其請其材液記與與為 膜 體電跨 及為之 申島申 高為申 .申 ,屬種 項極極 , 電晶向重以並膜如述如述種如置如法金 一13電電極 {裝 訂 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) Λ4規格(210X297公釐) 38183 ^〇〇3^i as B8 C8 D8 六、申請專利範圍 19.如申請專利範圍第18項記載的液晶顯示裝置的修復方 該與者 於.徽 接部待 鄰橋其 與的為 極極位 iyes 素素 同 畫金為 的之成 陷一其 缺任使 點中路 有極短 含電部 於素島 跨晝之 重二 部 將之橋 中極該 其電於 , 素應 法畫對 方極 。 復閛者 修的歡 的間待 置之其 裝部為 示島路 顯的短 晶部以 液橋予 的該而 載於融 記應熔 項對其 19與將 第部光 圍橋射 範述雷 利前用 專中為 請其膜 申 ,緣 如法絶 (請先閱讀背面之注意事項再填寫本頁) 裝. 訂 經濟部中央標準局員工消費合作社印製 本纸張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) 28 3 8 18 3AS B8 C8 D8 VI. Patent application 1. A thin-film transistor (TFT) array substrate equipped with a transparent semi-source gate of a transparent gate and source gate body formed by a transparent electrode and a matching film and a source electrode layer It is a membrane element that is nearly equipped with both parts and elements. It is a marginal element-shaped insulation guide pole. The semi-membrane gate is thinly described. The upper hurricane is constructed on the gold. The half pole of the base gate of the body pole and the in-phase line matching pole of the wire material are gold. The above is placed and matched with the prime, and the second pole is connected to the adjacent shape of the second. The upper pole is at the source and with it, the placement of the matching film is the edge of the gold 1I & pole gate, the upper picture is the upper picture, the gold die is 3, and the gold is 2 and the second is the picture. 2 belongs to the 1st material, the material is described in the light of the gold on the same day, Jd dream 3 f threat B, the polar radiation, the line is real, and the pole is very good, and the two are adjacent to each other. 3 to connect I- winding melting It will map its gold, the plate and other base titanium arrays or array giants, and the crystal network will use a pseudo-thin film. The model's stimulus I remember the gold holding I 1 item 1 is the first and the complex line repair and configuration of the Lijisu special gate painting, please describe the lack of pre-shenzhen 2 as the other, it is a plate-shaped array of array gold Body crystals, such as 1E 100 5® 0 film or thin chromium, containing aluminum are marked as pseudo. 1Picture No. I, Mosuowei belongs to its benefits. 2 is dedicated, please describe the former and the former. 3 (please read the precautions on the back before filling out this page). The employee consumer cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs printed its behavior. , In the form of a plate-shaped base or on-chip crystal BegBt membrane thin egg on the load interface is shown in Figure 1-Figure 3-Modules belong to Fan Ji Jin and 2. For those who have special experience, please describe the method to be prepared in the following way, including the slab base made by the French method I, the wide body crystal E o IplT, the film is thin, and the titanium or giant chromium forming method is required. The base edge of the plate above the spray coating is very clear and transparent. The paper standard is applicable to the Chinese national standard (CNS> A4 specification (210Χ297 mm) 38183 A8 B8 C8 D8 Printed by the Employee Consumer Cooperative of the Central Standard Falconry Bureau of the Ministry of Economic Affairs. The metal thin film 9 is then formed into a wedge pattern by a photo etching method, etc. 1 1 I is used to form the gate electrode »The gate wiring and the first metal mold of the second cross-connected bismuth element 1 1 I Figure process 1 I Please 1 I Form the gate green by plasma CVD (Chemical Vapor Deposition) method, etc. First read 1 I 1 1 film »Semiconductor layer and resistive contact layer» Then form it on the back of the mold pattern 1 I 1 1 Thing 1 Form a transparent conductive film by sputtering or other methods »Then form a model and then 1 fill in the picture to form the crack electrode of the pixel electrode. Page 1 Form a metal thin film of aluminum, chromium or molybdenum by sputtering, etc.» Then 1 form a pattern to form the source and source wiring $ Drain and on the above 1 1 1 1 gold metal pattern drawing at least for the process of forming the second metal mold 1 1 pattern through the above gate insulating film and order 1 When a defect occurs, the signal 1 | circuit of the pixel is cut by laser irradiation i, and then the above first metal pattern and the second metal 1 I pattern are melted to connect two adjacent electrode electrodes From time to time, the defect 1 1 —N .. The repair process of the chamber element 1 is its special emblem 0 1 1 6. — A thin film transistor array substrate 9 Equipped with a gate wiring formed of a gold thin film formed on a transparent insulating 1 1 substrate and also serving as a gate * On 1 I the semiconductor wiring provided with an intermediary green gate film on the gate wiring »and the 1 I The semiconductor layers together form the source wiring 1 1 I and the drain of the semiconductor element, which are the source electrodes 1 1 I and the drain 1 are formed of a transparent conductive film formed in the vicinity of the semiconductor element 1 1 I The metal 1 1 on the film forms a storage capacitor electrode »The storage capacitor electrode 1 1 installed on the storage capacitor electrode 1 This paper scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 2 4 3 8 1 8 3 A8 B8 C8 D8 Printed by the Employee Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs VI. Scope of Patent Application I. Capacitor Membrane Film »The first metal mold placed on the two adjacent pixel elements with the same gold I material as the above storage capacitor electrode Fig 1 1 I and 1 I of the above-mentioned storage capacitor dielectric film are interposed on the first gold pattern. Please read the second gold tart pattern t of the I green film configuration and read 1 from 1 I | irradiate laser light on the above 1 The metal mold m and the second metal mold back 1 above 1 I are melted and connected to connect two adjacent pixel electrodes to carry out the attention 1 | Event 1 The repair of the defective element is a unique one. Item 1 7. The thin-film transistor array substrate as described in item 6 of the patent application scope, the gate wiring and the first metal pattern on page 1 are pseudo-chromium »gold such as giant or titanium — ^ 1 I It belongs to the special group 0 1 1 1 8. The thin film transistor array substrate as described in item 6 of the patent application, the second metal pattern described in 1 1 is formed of gold, such as chromium 9 giant or titanium It is specified as 1 擞 者 0 1 1 9. For the thin film transistor array substrate described in item 6 of the patent scope, the second metal pattern is described in 1 I. It is formed of the same metal material as the gate wiring 1 i It is the special person 0 Γ 10. For the thin film transistor array substrate described in item 6 of the patent scope, the aforementioned second metal pattern in 1 1 is formed to be connected to the pixel electrode above or below to be 1 1擞 者 0 1 1 11, a liquid crystal display device, the thin-film transistor array substrate described in any one of the patent application items 1 to 4 and 1 I item 6 to item 10 is transparent to 1 I The liquid crystal is arranged between the electrode and the opposite electrode substrate of the color filter. 1 1 I is its favorite. 〇 1 1 12 ♦ A method of manufacturing a thin-film transistor array substrate, including the following system 1 1 The paper scale is applicable to Chinese national standards ( CNS) A4 specification (210X297mm) 25 38183 8 8 8 8 ABCD Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 6. Patent application process: Forming chromium, giant or titanium on the transparent green substrate by spraying method Metal thin film, etc., and then form a pattern by photo etching or the like to form a storage capacitor electrode and the first metal pattern of the two pixels adjacent to the process; plasma CVD (chemical vapor deposition) The process of forming a thin film such as S i H, S ί 0 2, etc., and then forming a pattern to form a storage capacitor dielectric film; Form a gold hurricane film of chromium, planing or titanium by spraying method, etc., and then form a pattern by a method such as photo etching to form a gate and a gate wiring, and at least on the above first metal pattern The process of forming the second metal pattern by interposing the above storage capacitor dielectric film; the process of forming a transparent conductive film by sputtering or the like, and the process of forming the pixel electrode by forming the pattern; forming the gate insulating film in sequence by plasma CVD method, etc. , A semiconductor layer and a resistive contact layer, and then form a pattern of the process; forming a metal film of aluminum, chromium, etc. by spraying, etc., and then forming a pattern to form the source and source wiring and drain process ; And when the defective pixel is recognized, the signal circuit of the pixel is cut off by laser irradiation, and then the first metal mold drawing and the second metal mold drawing are fused to connect the two pixels The process of repairing defective pixels is implemented between the electrodes; it is for its contributors. 1 3. A kind of liquid crystal display device, which is composed of a gate formed by a metal thin film and 2 6 paper size applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) 38183 -------- f -(Please read the precautions on the back before filling in this page), -a AS B8 C8 D8 6. Patent application gate wiring, gate green film, semiconductor layer, resistive contact layer, source and source wiring The thin-film transistors of the dipole and the printed pair are printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs and Transparency. The shape of the first prime electric film before the thinning is in the middle. The thin element of the nectar element should be bridged to show its gold. The system is matched with the filter of one of the fans, and the middle crystal ones are easy to pass over. When the formed liquid is placed, the aluminum plate is not equipped with the color plate or the special equipment. Please click on the display of the missing base and the lower part of the film to show the display of the molybdenum and the thin part showing the pole edge. In the case of electricity, there is a bridge layer, crystal emblem, tungsten, and polar crystals, which will be described as containing liquid gold, 15 electrohydraulic lines, and the titanium penetrating the liquid or its titanium. The first part of the special method is that some of them are based on the layer load, or the picture load is extremely elegant, and the second is set on the crystal and the film. Recorded as the record giant 14 Yuji gate is reset to repair the item with the edge of the liquid pole, and the connection and the repair and repair to be extremely electric insulation 擞 13 belong to 14 chromium 13 to 13 pole island shown The neighboring electricity is set as the prime electrode, and the terminal electrode is set as the first part. Su, the painting gates are surrounded by pseudo points. The engraving on the island encircles the picture board of the pre-installed Jingdian fan board is Fan Rong Fan's fan Fan Shu Fan Qiancheng's substrate with liquid element is connected to the above. The front part of the Legie is mainly dedicated to the specialty, special secondary, technical and secondary materials. The other shape is in the middle of the island. Please ask the department to melt it. Shendao Shengao is Shen. Shen, which is a kind of polar pole. The electric crystals are reoriented and combined with the film as described. The electrode is like the gold 13 13 {binding (please read the precautions on the back before filling this page) This paper scale is applicable to the Chinese National Standard (CNS) Λ4 specification (210X297 mm) 38183 ^ 〇〇3 ^ i as B8 C8 D8 VI. Patent application scope 19. The repair method of the liquid crystal display device as described in item 18 of the patent application scope The affiliation is in. The emblem is waiting for the neighboring bridge, and it is in the extreme position iyes, the prime picture is the same as the gold painting. The lack of it makes the point middle road have a very short electric part. The middle pole of the bridge should be electrified, and the other pole should be painted. The decoration part of Huan Huan who was repaired by the rehabilitation person is the short crystal part of Shihji Road, which is given by the liquid bridge, and it is contained in the Rongji Yingrong item. Lei Li used the technical secondary school to apply for the film, which is absolutely impossible (please read the precautions on the back and then fill out this page). Packed. This paper is printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economy. (CNS) A4 specification (210X 297mm) 28 3 8 18 3
TW085105967A 1995-05-30 1996-05-21 TW300341B (en)

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JP7131695A JPH08328035A (en) 1995-05-30 1995-05-30 Liquid crystal display device and its production and method for repairing spot defect
JP15486495A JPH095786A (en) 1995-06-21 1995-06-21 Tft array substrate as well as liquid crystal display device formed by using the tft array substrate and production of tft array substrate
JP15486395A JPH095785A (en) 1995-06-21 1995-06-21 Tft array substrate as well as liquid crystal display device formed by using the tft array substrate and production of tft array substrate

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